From: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
To: Rob Clark <robdclark@gmail.com>
Cc: <will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>,
<jgg@ziepe.ca>, <jsnitsel@redhat.com>, <robh@kernel.org>,
<krzysztof.kozlowski@linaro.org>, <quic_c_gdjako@quicinc.com>,
<dmitry.baryshkov@linaro.org>, <iommu@lists.linux.dev>,
<linux-arm-msm@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v16 5/5] iommu/arm-smmu: add ACTLR data and support for qcom_smmu_500
Date: Tue, 29 Oct 2024 18:10:30 +0530 [thread overview]
Message-ID: <1e495126-e398-42fb-b53c-99a07a0e8320@quicinc.com> (raw)
In-Reply-To: <CAF6AEGtOn3+99KMVRvpH=8Qs-g52ajVQyeBkxThSES_dEdVH+Q@mail.gmail.com>
On 10/29/2024 2:46 AM, Rob Clark wrote:
> On Tue, Oct 8, 2024 at 5:55 AM Bibek Kumar Patro
> <quic_bibekkum@quicinc.com> wrote:
>>
>> Add ACTLR data table for qcom_smmu_500 including
>> corresponding data entry and set prefetch value by
>> way of a list of compatible strings.
>>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
>> Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
>> ---
>> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 24 ++++++++++++++++++++++
>> 1 file changed, 24 insertions(+)
>>
>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> index 2d2c1e75632c..dd4fb883ebcd 100644
>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>> @@ -25,8 +25,31 @@
>>
>> #define CPRE (1 << 1)
>> #define CMTLB (1 << 0)
>> +#define PREFETCH_SHIFT 8
>> +#define PREFETCH_DEFAULT 0
>> +#define PREFETCH_SHALLOW (1 << PREFETCH_SHIFT)
>> +#define PREFETCH_MODERATE (2 << PREFETCH_SHIFT)
>> +#define PREFETCH_DEEP (3 << PREFETCH_SHIFT)
>> #define GFX_ACTLR_PRR (1 << 5)
>>
>> +static const struct of_device_id qcom_smmu_actlr_client_of_match[] = {
>> + { .compatible = "qcom,adreno",
>> + .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>> + { .compatible = "qcom,adreno-gmu",
>> + .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>> + { .compatible = "qcom,adreno-smmu",
>> + .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>> + { .compatible = "qcom,fastrpc",
>> + .data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>> + { .compatible = "qcom,sc7280-mdss",
>> + .data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
>> + { .compatible = "qcom,sc7280-venus",
>> + .data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
>> + { .compatible = "qcom,sm8550-mdss",
>> + .data = (const void *) (PREFETCH_DEFAULT | CMTLB) },
>> + { }
>> +};
>
> I guess by now there are some more entries to add
> ("qcom,x1e80100-mdss", for example), but I guess those could be
> followup patches
>
> Reviewed-by: Rob Clark <robdclark@gmail.com>
>
Thanks everyone for valuable inputs, reviews and ack.
regards,
Bibek
>> +
>> static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu)
>> {
>> return container_of(smmu, struct qcom_smmu, smmu);
>> @@ -640,6 +663,7 @@ static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
>> .impl = &qcom_smmu_500_impl,
>> .adreno_impl = &qcom_adreno_smmu_500_impl,
>> .cfg = &qcom_smmu_impl0_cfg,
>> + .client_match = qcom_smmu_actlr_client_of_match,
>> };
>>
>> /*
>> --
>> 2.34.1
>>
next prev parent reply other threads:[~2024-10-29 14:15 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-08 12:54 [PATCH v16 0/5] iommu/arm-smmu: introduction of ACTLR implementation for Qualcomm SoCs Bibek Kumar Patro
2024-10-08 12:54 ` [PATCH v16 1/5] iommu/arm-smmu: re-enable context caching in smmu reset operation Bibek Kumar Patro
2024-10-24 12:52 ` Will Deacon
2024-10-25 14:21 ` Bibek Kumar Patro
2024-10-29 12:47 ` Will Deacon
2024-10-29 13:25 ` Robin Murphy
2024-10-30 11:30 ` Bibek Kumar Patro
2024-11-01 12:10 ` Will Deacon
2024-11-04 6:31 ` Bibek Kumar Patro
2024-11-04 11:10 ` Dmitry Baryshkov
2024-11-05 11:37 ` Will Deacon
2024-11-06 7:40 ` Dmitry Baryshkov
2024-10-28 21:12 ` Rob Clark
2024-10-08 12:54 ` [PATCH v16 2/5] iommu/arm-smmu: refactor qcom_smmu structure to include single pointer Bibek Kumar Patro
2024-10-28 21:13 ` Rob Clark
2024-10-08 12:54 ` [PATCH v16 3/5] iommu/arm-smmu: add support for PRR bit setup Bibek Kumar Patro
2024-10-28 21:13 ` Rob Clark
2024-10-29 13:29 ` Robin Murphy
2024-10-30 13:14 ` Bibek Kumar Patro
2024-10-30 15:23 ` Robin Murphy
2024-10-30 16:58 ` Rob Clark
2024-10-30 20:27 ` Bibek Kumar Patro
2024-10-08 12:54 ` [PATCH v16 4/5] iommu/arm-smmu: introduction of ACTLR for custom prefetcher settings Bibek Kumar Patro
2024-10-09 19:02 ` Dmitry Baryshkov
2024-10-28 21:14 ` Rob Clark
2024-10-08 12:54 ` [PATCH v16 5/5] iommu/arm-smmu: add ACTLR data and support for qcom_smmu_500 Bibek Kumar Patro
2024-10-28 21:16 ` Rob Clark
2024-10-29 12:40 ` Bibek Kumar Patro [this message]
2024-10-29 13:36 ` Robin Murphy
2024-10-23 19:07 ` [PATCH v16 0/5] iommu/arm-smmu: introduction of ACTLR implementation for Qualcomm SoCs Bibek Kumar Patro
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