[PATCH] ARM: mach-davinci: fixed name and parent of pll1 sysclock6

[PATCH] ARM: mach-davinci: fixed name and parent of pll1 sysclock6

[Bas van den Berg]

The name and parent of pll1_sysclk6 should be pll1 and not pll0.
Checked and tested in debugfs on OmapL138.

Signed-off-by: Bas van den Berg <b.van.den.berg.nl@gmail.com>
---
 arch/arm/mach-davinci/da850.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b047f87..0962275 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -168,8 +168,8 @@ static struct clk pll1_sysclk5 = {
 };
 
 static struct clk pll1_sysclk6 = {
-	.name		= "pll0_sysclk6",
-	.parent		= &pll0_clk,
+	.name		= "pll1_sysclk6",
+	.parent		= &pll1_clk,
 	.flags		= CLK_PLL,
 	.div_reg	= PLLDIV6,
 };
-- 
1.7.0.4

[PATCH] ARM: mach-davinci: fixed name and parent of pll1 sysclock6

[Nori, Sekhar]

On Fri, Nov 04, 2011 at 16:30:07, Bas van den Berg wrote:
> The name and parent of pll1_sysclk6 should be pll1 and not pll0.
> Checked and tested in debugfs on OmapL138.
> 
> Signed-off-by: Bas van den Berg <b.van.den.berg.nl@gmail.com>
> ---

Thanks for spotting this. Looking at the technical
reference manual[1], there is a bigger issue here.

PLL1 SYSCLK6 doesn't exist in hardware! Only PLL1_SYSCLK[1-3]
are valid. The right fix would be simply to remove these
erroneous entries.

Would be able to respin the patch?

Thanks,
Sekhar

[1] http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf