* [PATCH 01/15] ARM: shmobile: Add support OF for INTC of shmobile
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 02/15] SH: intc: Add support OF of IRQ Simon Horman
` (13 subsequent siblings)
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
This provides OF support of SH/INTC.
The SH/INTC driver is used by SuperH and ARM/SH-MOBILE.
At the moment, SuperH does not have the plan corresponding to DT.
DT of SH/INTC has taken the form where the table data of the C
is managed by DT, in order to maintain compatibility.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
v2 [Simon Horman]
* Use consistent indentation in drivers/sh/intc/Makefile
* Do not guard functions declarations with an ifdef
* Use CONFIG_OF in place of CONFIG_OF_SH_INTC
v1 [Nobuhiro Iwamatsu]
---
Documentation/devicetree/bindings/sh/intc.txt | 163 +++++++
drivers/sh/intc/Kconfig | 7 +
drivers/sh/intc/Makefile | 1 +
drivers/sh/intc/of_intc.c | 646 +++++++++++++++++++++++++
include/linux/sh_intc.h | 83 ++++
5 files changed, 900 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sh/intc.txt
create mode 100644 drivers/sh/intc/of_intc.c
diff --git a/Documentation/devicetree/bindings/sh/intc.txt b/Documentation/devicetree/bindings/sh/intc.txt
new file mode 100644
index 0000000..ebb2398
--- /dev/null
+++ b/Documentation/devicetree/bindings/sh/intc.txt
@@ -0,0 +1,163 @@
+* Renesas SuperH / SH-MOBILE Interrupt Controller
+
+The SH/INTC driver is used by SuperH and ARM/SH-MOBILE.
+At the moment, SuperH does not have the plan corresponding to DT.
+DT of SH/INTC has taken the form where the table data of the C
+is managed by DT, in order to maintain compatibility.
+
+Main node required properties:
+
+- compatible : should be one of:
+ "renesas,sh_intca"
+ "renesas,sh_intcs"
+ "renesas,sh_intca_irq_pins"
+
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Set already 1.
+- #address-cells : Set already 1.
+- #size-cells : Set already 1.
+- ranges : Non value.
+- reg : Specifies base physical address(s) and size of the INTC
+ registers.
+- intsrc* : This sets up the vector for every device.
+
+- *_registers : There are vector table, mask, priority, ack, and sense
+ register in INTC. In order to hold these data, it is
+ necessary to set up the following contents.
+
+ -- intc_vectors: This needs to have vector_table.
+ This specifies phandle which intsrc* defined.
+
+ -- intc_mask_registers : This specifies the contents of the mask register.
+ This node required properties:
+ * address-cells : Set already 1.
+ * size-cells : Set already 1.
+ * ranges : Non value.
+ * intc_mask* : This has regs and reginfo.
+ ** reg : This specifies the address of mask register. First specifies
+ mask register, and 2nd specifies mask clear register.
+ First cell is address, and 2nd sell is address size. 1 is 8bit.
+ 2 is 16bit, 4 is 32bit.
+ ** reginfo: This specifies phandle of devices.
+
+ -- intc_prio_registers : This sets up the contents of the priority register.
+ This node required properties:
+ * address-cells : Set already 1.
+ * size-cells : Set already 1.
+ * ranges : Non value.
+ * intc_prio*: This has regs and reginfo.
+ ** reg : This specifies the address of priority register. First specifies
+ priority set register, and 2nd specifies priority clear register.
+ If there is not priority clear register, specifies 0x00.
+ First cell is address, and 2nd sell is address size. 1 is 8bit.
+ 2 is 16bit, 4 is 32bit.
+ ** field-width : Bit size is specified for every device.
+ ** reginfo: This specifies phandle of devices.
+
+ -- intc_sense_registers : This sets up the contents of the sense register.
+ This node required properties:
+ * address-cells : Set already 1.
+ * size-cells : Set already 1.
+ * ranges : Non value.
+ * intc_sense*: This has regs and reginfo.
+ ** reg : This specifies the address of sense register.
+ First cell is address, and 2nd sell is address size. 1 is 8bit.
+ 2 is 16bit, 4 is 32bit.
+ ** field-width : Bit size is specified for every device.
+ ** reginfo: This specifies phandle of devices.
+
+-- intc_ack_registers : This sets up the contents of the ACK register.
+ This node required properties:
+ * address-cells : Set already 1.
+ * size-cells : Set already 1.
+ * ranges : Non value.
+ * intc_ack*: This has regs and reginfo.
+ ** reg : This specifies the address of ack register.
+ First cell is address, and 2nd sell is address size. 1 is 8bit.
+ 2 is 16bit, 4 is 32bit.
+ ** reginfo: This specifies phandle of devices.
+
+Optional:
+
+- group_size : If this INTC register has Group, set up this value.
+- intc_group* : This needs to have group, If INTC device have group.
+ This node required properties:
+ * group : This specifies the address phandle of group.
+ For example, when TMU1 of priority regisdter is sharing with TMU1_0,
+ TMU1_1 and TMU1_2, it describes like below.
+
+ TMU1: intc_group2 { group = <&TMU1_0 &TMU1_1 &TMU1_2>; };
+
+ And the phandle is specified as priority regisdter.
+
+ intc_prio11 {
+ reg = <0xffd50030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TMU1 0 0 0>;
+ };
+
+- intc_intevtsa : This set up the contents of INTEVTSA.
+ This node required properties:
+ * vector : This specifies the address phandle of INTCS.
+
+Note:
+- "renesas,sh_intca" needs group_size, intc_group*, intc_vectors,
+ intc_mask_registers and intc_prio_registers.
+- "renesas,sh_intcs" needs group_size, intc_group*, intc_vectors,
+ intc_mask_registers, intc_prio_registers and intc_intevtsa.
+- "renesas,sh_intca_irq_pins" needs intc_vectors, intc_mask_registers,
+ intc_prio_registers, intc_sense_registers and intc_ack_registers.
+
+Example:
+
+ intca: interrupt-controller at 0 {
+ compatible = "renesas,sh_intca";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+
+ reg = <0xe6940000 0x200>, <0xe6950000 0x200>;
+ group_size = <19>;
+
+ DIRC: intsrc1 { vector = <0x0560>; };
+ ATAPI: intsrc2 { vector = <0x05E0>; };
+ ....
+
+ DMAC1_1: intc_group0 { group = <&DMAC1_1_DEI0 &DMAC1_1_DEI1
+ &DMAC1_1_DEI2 &DMAC1_1_DEI3>; };
+ DMAC1_2: intc_group1 { group = <&DMAC1_2_DEI4 &DMAC1_2_DEI5
+ &DMAC1_2_DADERR>; };
+ ....
+ intc_vectors {
+ vector_table = <&DIRC &ATAPI &IIC1_ALI &IIC1_TACKI &IIC1_WAITI,
+ ....
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6940080 1>, <0xe69400c0 1>;
+ reginfo = <&DMAC2_1_DEI3 &DMAC2_1_DEI2 &DMAC2_1_DEI1
+ &DMAC2_1_DEI0 0 0 &AP_ARM_COMMTX &AP_ARM_COMMRX>;
+ };
+ ....
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6940000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC3_1 &DMAC3_2 &CMT2 &ICBS0>;
+ };
+ ....
+ };
+ };
diff --git a/drivers/sh/intc/Kconfig b/drivers/sh/intc/Kconfig
index a305731..23af977 100644
--- a/drivers/sh/intc/Kconfig
+++ b/drivers/sh/intc/Kconfig
@@ -37,3 +37,10 @@ config INTC_MAPPING_DEBUG
between system IRQs and the per-controller id tables.
If in doubt, say N.
+
+config OF_SH_INTC
+ bool "INTC Device tree support"
+ depends on ARCH_SHMOBILE && OF
+ help
+ This enables support OF for INTC of SH.
+ But SH does not work, supports ARM/SH-MOBILE only.
diff --git a/drivers/sh/intc/Makefile b/drivers/sh/intc/Makefile
index 54ec2a0..b53ab7e 100644
--- a/drivers/sh/intc/Makefile
+++ b/drivers/sh/intc/Makefile
@@ -3,3 +3,4 @@ obj-y := access.o chip.o core.o handle.o irqdomain.o virq.o
obj-$(CONFIG_INTC_BALANCING) += balancing.o
obj-$(CONFIG_INTC_USERIMASK) += userimask.o
obj-$(CONFIG_INTC_MAPPING_DEBUG) += virq-debugfs.o
+obj-$(CONFIG_OF) += of_intc.o
diff --git a/drivers/sh/intc/of_intc.c b/drivers/sh/intc/of_intc.c
new file mode 100644
index 0000000..8756880
--- /dev/null
+++ b/drivers/sh/intc/of_intc.c
@@ -0,0 +1,646 @@
+/*
+ * OF helpers for SH intc
+ *
+ * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/string.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/sh_intc.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
+
+static void __init of_sh_intc_get_reg_addrs(struct device_node *np,
+ unsigned long *set_reg, unsigned long *clr_reg,
+ unsigned long *reg_width,
+ unsigned long *field_width)
+{
+ struct resource res;
+
+ if (set_reg) {
+ of_address_to_resource(np, 0, &res);
+ *set_reg = res.start;
+ }
+
+ if (resource_size(&res) && reg_width)
+ *reg_width = resource_size(&res) * 8; /* byte */
+
+ if (clr_reg) {
+ of_address_to_resource(np, 1, &res);
+ *clr_reg = res.start;
+ }
+
+ if (field_width) {
+ u32 width;
+ of_property_read_u32(np, "field-width", &width);
+ *field_width = width;
+ }
+}
+
+static int of_sh_intc_parse_vector(struct device_node *np, uint32_t *vect)
+{
+ return of_property_read_u32(np, "vector", vect);
+}
+
+static int of_sh_intc_parse_group(struct device_node *np,
+ struct intc_group *grp)
+{
+ const __be32 *list, *list_end;
+ int size, ret = 0, count = 0;
+ phandle phandle;
+
+ /* Retrieve the phandle list property */
+ list = of_get_property(np, "group", &size);
+ if (!list)
+ return -ENOENT;
+
+ list_end = list + size / sizeof(*list);
+
+ grp->enum_id = np->phandle;
+ /* Loop over the phandles until all the requested entry is found */
+ while (list < list_end) {
+ /* If phandle is 0, then it is an empty entry with
+ no arguments. */
+ phandle = be32_to_cpup(list);
+ if (phandle)
+ grp->enum_ids[count] = phandle;
+ list++;
+ count++;
+ }
+
+ pr_debug("%d:[", grp->enum_id);
+ for (size = 0 ; size < count ; size++)
+ pr_debug(" %d ", grp->enum_ids[size]);
+
+ pr_debug("]\n");
+
+ return ret;
+}
+
+static int of_sh_intc_parse_vectortbl(struct device_node *np,
+ struct intc_vect **vect, int *tbl_size)
+{
+ const __be32 *list, *list_end;
+ int size, ret = 0, count = 0;
+ struct device_node *node = NULL;
+ phandle phandle;
+
+ /* Retrieve the phandle list property */
+ list = of_get_property(np, "vector_table", &size);
+ if (!list)
+ return -ENOENT;
+
+ *tbl_size = size / sizeof(*list);
+
+ pr_debug("vector table size: %d\n", *tbl_size);
+
+ *vect = kzalloc(sizeof(struct intc_vect) * *tbl_size,
+ GFP_KERNEL);
+ if (!*vect)
+ return -ENOMEM;
+
+ list_end = list + *tbl_size;
+
+ /* Loop over the phandles until all the requested entry is found */
+ while (list < list_end) {
+ /* If phandle is 0, then it is an empty entry with
+ no arguments. */
+ phandle = be32_to_cpup(list);
+ if (phandle) {
+ uint32_t vector_id;
+
+ (*vect)[count].enum_id = phandle;
+ node = of_find_node_by_phandle(phandle);
+
+ ret = of_sh_intc_parse_vector(node, &vector_id);
+ if (ret)
+ return ret;
+
+ (*vect)[count].vect = vector_id;
+ pr_debug("id %d : vector 0x%x\n",
+ (*vect)[count].enum_id, (*vect)[count].vect);
+ } else {
+ ret = -EINVAL;
+ goto error;
+ }
+ list++;
+ count++;
+ }
+ return ret;
+
+error:
+ kfree(*vect);
+
+ return ret;
+}
+
+static int of_sh_intc_parse_reginfo(struct device_node *np,
+ struct intc_mask_reg *mask,
+ struct intc_prio_reg *prio,
+ struct intc_sense_reg *sense)
+{
+ const __be32 *list, *list_end;
+ int size, id, ret = 0, count = 0;
+ phandle phandle;
+
+ /* Retrieve the phandle list property */
+ list = of_get_property(np, "reginfo", &size);
+ if (!list)
+ return -ENOENT;
+
+ list_end = list + size / sizeof(*list);
+
+ /* Loop over the phandles until all the requested entry is found */
+ while (list < list_end) {
+ /* If phandle is 0, then it is an empty entry with
+ no arguments. */
+ phandle = be32_to_cpup(list);
+ if (phandle)
+ id = phandle;
+ else
+ id = 0;
+
+ if (mask)
+ mask->enum_ids[count] = id;
+ if (prio)
+ prio->enum_ids[count] = id;
+ if (sense)
+ sense->enum_ids[count] = id;
+
+ pr_debug("reg: [%d] %d\n", count, id);
+ list++;
+ count++;
+ }
+
+ return ret;
+}
+
+static struct device_node *
+__init of_sh_intc_check_base_node(struct device_node *np,
+ const char *node_name, int *tbl_size)
+{
+ struct device_node *node;
+
+ node = of_find_node_by_name(np, node_name);
+ if (!node) {
+ pr_err("%s table not found\n", node_name);
+ return NULL;
+ }
+
+ pr_debug("%s\n", node->full_name);
+
+ *tbl_size = of_get_child_count(node);
+
+ pr_debug("Size of %s: %d\n", node_name, *tbl_size);
+
+ return node;
+}
+
+static int __init of_sh_intc_get_mask_ack(struct device_node *np,
+ struct intc_mask_reg **masks, int *tbl_size,
+ const char *base_name, const char *reg_name)
+{
+ struct device_node *intc_node, *reg_node;
+ int i, ret;
+ char node_name[13]; /* intc_mask + 999 */
+
+ intc_node = of_sh_intc_check_base_node(np, base_name, tbl_size);
+ if (!intc_node)
+ return -ENOENT;
+
+ *masks = kzalloc(sizeof(struct intc_mask_reg) * *tbl_size, GFP_KERNEL);
+ if (!*masks)
+ return -ENOMEM;
+
+ for (i = 0 ; i < *tbl_size; i++) {
+ memset(node_name, 0, sizeof(node_name));
+ snprintf(node_name, sizeof(node_name), "%s%d", reg_name, i);
+
+ pr_debug("intc node[%d]: name: %s\n", i, node_name);
+
+ reg_node = of_find_node_by_name(intc_node, node_name);
+ if (!reg_node) {
+ pr_warn("%s not found\n", node_name);
+ ret = -EINVAL;
+ goto error;
+ }
+
+ of_sh_intc_get_reg_addrs(reg_node, &(*masks)[i].set_reg,
+ &(*masks)[i].clr_reg,
+ &(*masks)[i].reg_width, NULL);
+
+#ifdef CONFIG_INTC_BALANCING
+ of_property_read_u32(reg_node, "dist_reg", &(*masks)[i].dist_reg);
+#endif
+#ifdef CONFIG_SMP
+ of_property_read_u32(reg_node, "smp", &(*masks)[i].smp);
+#endif
+
+ pr_debug("set reg: 0x%lx clr reg: 0x%lx reg_width: %ld\n",
+ (*masks)[i].set_reg, (*masks)[i].clr_reg,
+ (*masks)[i].reg_width);
+
+ ret = of_sh_intc_parse_reginfo(reg_node, &(*masks)[i], NULL,
+ NULL);
+ if (ret)
+ goto error;
+ }
+
+ return ret;
+
+error:
+ kfree(*masks);
+ return ret;
+}
+
+static int __init of_sh_intc_get_vector(struct device_node *np,
+ struct intc_vect **vectors, int *tbl_size)
+{
+ struct device_node *intc_node;
+
+ /* Get INTCA vector register info */
+ intc_node = of_find_node_by_name(np, "intc_vectors");
+ if (!intc_node) {
+ pr_err("Get INTC vector table not found\n");
+ return -ENOENT;
+ }
+
+ return of_sh_intc_parse_vectortbl(intc_node, vectors, tbl_size);
+}
+
+static int __init of_sh_intc_get_prio(struct device_node *np,
+ struct intc_prio_reg **prios, int *tbl_size)
+{
+ struct device_node *intc_node, *reg_node;
+ int i, ret;
+ char node_name[13]; /* intc_prio + 999 */
+
+ intc_node = of_sh_intc_check_base_node(np, "intc_prio_registers",
+ tbl_size);
+ if (!intc_node)
+ return -ENOENT;
+
+ *prios = kzalloc(sizeof(struct intc_prio_reg) * *tbl_size, GFP_KERNEL);
+ if (!*prios)
+ return -ENOMEM;
+
+ /* Get INTC priority register info */
+ for (i = 0 ; i < *tbl_size; i++) {
+ memset(node_name, 0, sizeof(node_name));
+ snprintf(node_name, sizeof(node_name), "intc_prio%d", i);
+
+ pr_debug("INTC node name: %s\n", node_name);
+
+ reg_node = of_find_node_by_name(intc_node, node_name);
+
+ if (!intc_node) {
+ pr_err("INTC prio register not found\n");
+ ret = -EINVAL;
+ goto error;
+ }
+
+ of_sh_intc_get_reg_addrs(reg_node, &(*prios)[i].set_reg,
+ &(*prios)[i].clr_reg, &(*prios)[i].reg_width,
+ &(*prios)[i].field_width);
+
+ pr_debug("\tset reg: 0x%lx clr reg: 0x%lx\n"
+ , (*prios)[i].set_reg, (*prios)[i].clr_reg);
+ pr_debug("\treg_width: %ld field_width: %ld\n",
+ (*prios)[i].reg_width, (*prios)[i].field_width);
+
+ ret = of_sh_intc_parse_reginfo(reg_node, NULL, &(*prios)[i],
+ NULL);
+ if (ret)
+ goto error;
+ }
+
+ return ret;
+
+error:
+ kfree(*prios);
+ return ret;
+}
+
+static int __init of_sh_intc_get_sense(struct device_node *np,
+ struct intc_sense_reg **senses, int *tbl_size)
+{
+ struct device_node *intc_node, *reg_node;
+ int i, ret;
+ char node_name[14]; /* intc_sense + 999 */
+
+ intc_node = of_sh_intc_check_base_node(np, "intc_sense_registers",
+ tbl_size);
+ if (!intc_node)
+ return -ENOENT;
+
+ *senses = kzalloc(sizeof(struct intc_sense_reg) * *tbl_size,
+ GFP_KERNEL);
+ if (!*senses)
+ return -ENOMEM;
+
+ /* Get INTC priority register info */
+ for (i = 0 ; i < *tbl_size; i++) {
+ memset(node_name, 0, sizeof(node_name));
+ snprintf(node_name, sizeof(node_name), "intc_sense%d", i);
+
+ pr_debug("INTC node name: %s\n", node_name);
+
+ reg_node = of_find_node_by_name(intc_node, node_name);
+
+ if (!intc_node) {
+ pr_err("INTC senses register not found\n");
+ ret = -EINVAL;
+ goto error;
+ }
+
+ of_sh_intc_get_reg_addrs(reg_node, &(*senses)[i].reg, NULL,
+ &(*senses)[i].reg_width,
+ &(*senses)[i].field_width);
+
+ pr_debug("\tset reg: 0x%lx\n", (*senses)[i].reg);
+ pr_debug("\treg_width: %ld field_width: %ld\n",
+ (*senses)[i].reg_width,
+ (*senses)[i].field_width);
+
+ ret = of_sh_intc_parse_reginfo(reg_node, NULL, NULL,
+ &(*senses)[i]);
+ if (ret)
+ goto error;
+ }
+
+ return ret;
+
+error:
+ kfree(*senses);
+ return ret;
+}
+
+static int __init of_sh_intc_get_ack(struct device_node *np,
+ struct intc_mask_reg **masks, int *tbl_size)
+{
+ return of_sh_intc_get_mask_ack(np, masks, tbl_size,
+ "intc_ack_registers", "intc_ack");
+}
+
+static int __init of_sh_intc_get_mask(struct device_node *np,
+ struct intc_mask_reg **masks, int *tbl_size)
+{
+ return of_sh_intc_get_mask_ack(np, masks, tbl_size,
+ "intc_mask_registers", "intc_mask");
+}
+
+static int __init of_sh_intc_get_group(struct device_node *np,
+ struct intc_group **groups, int *tbl_size)
+{
+ int i, ret, size;
+ const __be32 *list;
+ struct device_node *grp_node;
+ char node_name[15]; /* intc_group@999 */
+
+ /* Get size of group */
+ if (of_property_read_u32(np, "group_size", tbl_size)) {
+ pr_debug("%s size infomation not found\n", node_name);
+ return -ENOENT;
+ }
+
+ pr_debug("Group size %d\n", *tbl_size);
+ pr_debug("%s\n", np->full_name);
+
+ *groups = kzalloc(sizeof(struct intc_group) * *tbl_size, GFP_KERNEL);
+ if (!*groups)
+ return -ENOMEM;
+
+ /* Get INTCA node info */
+ for (i = 0 ; i < *tbl_size; i++) {
+ memset(node_name, 0, sizeof(node_name));
+ snprintf(node_name, sizeof(node_name), "intc_group%d", i);
+
+ pr_debug("intc group[%d]: name: %s\n", i, node_name);
+
+ grp_node = of_find_node_by_name(np, node_name);
+ if (!grp_node) {
+ pr_warn("%s not found\n", node_name);
+ ret = -EINVAL;
+ goto error;
+ }
+
+ list = of_get_property(np, node_name, &size);
+ ret = of_sh_intc_parse_group(grp_node, &(*groups)[i]);
+ if (ret) {
+ pr_err("intc group not found\n");
+ goto error;
+ }
+ }
+
+ return ret;
+
+error:
+ kfree(*groups);
+ return ret;
+}
+
+int __init of_sh_intc_get_intevtsa_vect(struct device_node *np,
+ unsigned short *vect)
+{
+ int size;
+ const __be32 *list;
+ struct device_node *node;
+ phandle phandle;
+
+ node = of_find_node_by_name(np, "intc_intevtsa");
+ if (!node) {
+ pr_err("intc_intevtsa table not found\n");
+ return -ENOENT;
+ }
+
+ /* Retrieve the phandle list property */
+ list = of_get_property(node, "vector", &size);
+ if (!list)
+ return -ENOENT;
+
+ phandle = be32_to_cpup(list);
+ if (phandle) {
+ uint32_t tmp;
+ struct device_node *vect_node =
+ of_find_node_by_phandle(phandle);
+
+ if (!of_sh_intc_parse_vector(vect_node, &tmp))
+ *vect = tmp;
+ else
+ return -ENOENT;
+ } else {
+ pr_debug("intc_intevtsa data not found\n");
+ return -ENOENT;
+ }
+ return 0;
+}
+
+static int of_sh_intc_get_force_flags(struct device_node *np,
+ const char *node_name)
+{
+ int size;
+ const __be32 *list = of_get_property(np, node_name, &size);
+ if (list)
+ return be32_to_cpup(list);
+
+ return 0;
+}
+
+void __init of_sh_intc_get_force_enable(struct device_node *np,
+ struct intc_desc *d)
+{
+ d->force_enable =
+ of_sh_intc_get_force_flags(np, "force_enable");
+}
+
+void __init of_sh_intc_get_force_disable(struct device_node *np,
+ struct intc_desc *d)
+{
+ d->force_disable =
+ of_sh_intc_get_force_flags(np, "force_disable");
+}
+
+void __init of_sh_intc_get_skip_syscore_suspend(struct device_node *np,
+ struct intc_desc *d)
+{
+ if (of_find_property(np, "skip_syscore_suspend", NULL))
+ d->skip_syscore_suspend = true;
+ else
+ d->skip_syscore_suspend = false;
+}
+
+int __init of_sh_intc_get_meminfo(struct device_node *np,
+ struct resource *res, int res_no)
+{
+ int ret = 0, i;
+
+ for (i = 0 ; i < res_no ; i++) {
+ ret = of_address_to_resource(np, i, &res[i]);
+ if (ret) {
+ pr_err("could not determine device base address\n");
+ return ret;
+ }
+
+ pr_debug("%s: Address 0x%x, size %d\n",
+ __func__, res[i].start, resource_size(&res[i]));
+ }
+
+ return ret;
+}
+
+int __init of_sh_intc_get_pint(struct device_node *np, struct intc_desc *d)
+{
+ /* pint uses vector, mask and sence. */
+ int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
+ &d->hw.nr_vectors);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_mask(np, &d->hw.mask_regs,
+ &d->hw.nr_mask_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_sense(np, &d->hw.sense_regs,
+ &d->hw.nr_sense_regs);
+ /* INTC may not need Sence register. */
+ if (ret != -ENOENT)
+ return ret;
+
+ d->of_node = np;
+
+ return 0;
+}
+
+int __init of_sh_intc_get_intc(struct device_node *np, struct intc_desc *d)
+{
+ int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
+ &d->hw.nr_vectors);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_group(np, &d->hw.groups,
+ &d->hw.nr_groups);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_mask(np, &d->hw.mask_regs,
+ &d->hw.nr_mask_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_prio(np, &d->hw.prio_regs,
+ &d->hw.nr_prio_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_sense(np, &d->hw.sense_regs,
+ &d->hw.nr_sense_regs);
+ /* INTC may not need Sence register. */
+ if (ret != -ENOENT)
+ return ret;
+
+ ret = of_sh_intc_get_ack(np, &d->hw.ack_regs,
+ &d->hw.nr_ack_regs);
+ /* INTC may not need Ack register. */
+ if (ret != -ENOENT)
+ return ret;
+
+ d->of_node = np;
+
+ return 0;
+}
+
+int __init of_sh_intc_get_intc_pins(struct device_node *np,
+ struct intc_desc *d)
+{
+ int ret = of_sh_intc_get_vector(np, &d->hw.vectors,
+ &d->hw.nr_vectors);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_mask(np, &d->hw.mask_regs,
+ &d->hw.nr_mask_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_prio(np, &d->hw.prio_regs,
+ &d->hw.nr_prio_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_sense(np, &d->hw.sense_regs,
+ &d->hw.nr_sense_regs);
+ if (ret)
+ return ret;
+
+ ret = of_sh_intc_get_ack(np, &d->hw.ack_regs,
+ &d->hw.nr_ack_regs);
+ if (ret)
+ return ret;
+
+ d->of_node = np;
+
+ return 0;
+}
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
index 3238328..b0e7925 100644
--- a/include/linux/sh_intc.h
+++ b/include/linux/sh_intc.h
@@ -2,6 +2,10 @@
#define __SH_INTC_H
#include <linux/ioport.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/of_address.h>
#ifdef CONFIG_SUPERH
#define INTC_NR_IRQS 512
@@ -146,4 +150,83 @@ static inline int register_intc_userimask(unsigned long addr)
}
#endif
+/*
+ * of_sh_initc_get_intc() - Get INTC table.
+ * @np: device node to get INTC from
+ * @d: a pointer of intc table
+ *
+ * Return: one of the errno value on the error condition
+ */
+int of_sh_intc_get_intc(struct device_node *np, struct intc_desc *d);
+
+/*
+ * of_sh_initc_get_intc_pins() - Get INTC Pins table.
+ * @np: device node to get INTC from
+ * @d: a pointer of intc pins table
+ *
+ * Return: one of the errno value on the error condition
+ */
+int of_sh_intc_get_intc_pins(struct device_node *np, struct intc_desc *d);
+
+/*
+ * of_sh_intc_get_meminfo() - Get and set INTC register of memory.
+ * @np: device node to get INTC from
+ * @res_mem: a pointer of resource
+ * @res_no: resource number
+ *
+ * Return: one of the errno value on the error condition
+ */
+int of_sh_intc_get_meminfo(struct device_node *np,
+ struct resource *res_mem, int resno);
+
+/*
+ * of_sh_intc_get_force_enable - Get and set force_enable vector in
+ * struct intc_desc.
+ * @np: device node to get INTC from
+ * @d: a pointer of struct intc_desc
+ *
+ * Return: none
+ */
+void of_sh_intc_get_force_enable(struct device_node *np,
+ struct intc_desc *d);
+
+/*
+ * of_sh_intc_get_force_disable - Get and set force_disable vector in
+ * struct intc_desc.
+ * @np: device node to get INTC from
+ * @d: a pointer of struct intc_desc
+ *
+ * Return: none
+ */
+void of_sh_intc_get_force_disable(struct device_node *np,
+ struct intc_desc *d);
+
+/*
+ * of_sh_intc_get_skip_syscore_suspend - Get and set skip_syscore_suspend
+ * flag in struct intc_desc.
+ * @np: device node to get INTC from
+ * @d: a pointer of struct intc_desc
+ *
+ * Return: none
+ */
+void of_sh_intc_get_skip_syscore_suspend(struct device_node *np,
+ struct intc_desc *d);
+
+/*
+ * of_sh_intc_get_intevtsa_vect - Get using vector by intevtsa
+ * @np: device node to get INTC from
+ * @vect:a pointer of value for vector
+ *
+ * Return: one of the errno value on the error condition
+ */
+int of_sh_intc_get_intevtsa_vect(struct device_node *np, unsigned short *vect);
+/*
+ * of_sh_initc_get_intc_pint() - Get INTC Pint table.
+ * @np: device node to get INTC from
+ * @d: a pointer of intc pint table
+ *
+ * Return: one of the errno value on the error condition
+ */
+int of_sh_intc_get_pint(struct device_node *np, struct intc_desc *d);
+
#endif /* __SH_INTC_H */
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 02/15] SH: intc: Add support OF of IRQ
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
2012-11-07 8:50 ` [PATCH 01/15] ARM: shmobile: Add support OF for INTC of shmobile Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 03/15] ARM: shmobile: Add support OF of INTC for r8a7740 Simon Horman
` (12 subsequent siblings)
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Add information of device node to struct intc_desc.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
v2 [Simon Horman]
* fix typo in changelog, clean up whitespace
v1 [Nobuhiro Iwamatsu]
---
drivers/sh/intc/core.c | 2 +-
drivers/sh/intc/internals.h | 3 ++-
drivers/sh/intc/irqdomain.c | 6 +++---
include/linux/sh_intc.h | 1 +
4 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/sh/intc/core.c b/drivers/sh/intc/core.c
index 8f32a13..3963af3 100644
--- a/drivers/sh/intc/core.c
+++ b/drivers/sh/intc/core.c
@@ -311,7 +311,7 @@ int __init register_intc_controller(struct intc_desc *desc)
BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
- intc_irq_domain_init(d, hw);
+ intc_irq_domain_init(d, hw, desc->of_node);
/* register the vectors one by one */
for (i = 0; i < hw->nr_vectors; i++) {
diff --git a/drivers/sh/intc/internals.h b/drivers/sh/intc/internals.h
index 7dff08e..e6f64bf 100644
--- a/drivers/sh/intc/internals.h
+++ b/drivers/sh/intc/internals.h
@@ -190,7 +190,8 @@ void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d,
intc_enum enum_id, int enable);
/* irqdomain.c */
-void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw);
+void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw,
+ struct device_node *of_node);
/* virq.c */
void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d);
diff --git a/drivers/sh/intc/irqdomain.c b/drivers/sh/intc/irqdomain.c
index 3968f1c..22ab7af 100644
--- a/drivers/sh/intc/irqdomain.c
+++ b/drivers/sh/intc/irqdomain.c
@@ -42,7 +42,7 @@ static const struct irq_domain_ops intc_evt_ops = {
};
void __init intc_irq_domain_init(struct intc_desc_int *d,
- struct intc_hw_desc *hw)
+ struct intc_hw_desc *hw, struct device_node *np)
{
unsigned int irq_base, irq_end;
@@ -59,10 +59,10 @@ void __init intc_irq_domain_init(struct intc_desc_int *d,
* tree penalty for linear cases with non-zero hwirq bases.
*/
if (irq_base == 0 && irq_end == (irq_base + hw->nr_vectors - 1))
- d->domain = irq_domain_add_linear(NULL, hw->nr_vectors,
+ d->domain = irq_domain_add_linear(np, hw->nr_vectors,
&intc_evt_ops, NULL);
else
- d->domain = irq_domain_add_tree(NULL, &intc_evt_ops, NULL);
+ d->domain = irq_domain_add_tree(np, &intc_evt_ops, NULL);
BUG_ON(!d->domain);
}
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h
index b0e7925..6603da6 100644
--- a/include/linux/sh_intc.h
+++ b/include/linux/sh_intc.h
@@ -118,6 +118,7 @@ struct intc_desc {
intc_enum force_disable;
bool skip_syscore_suspend;
struct intc_hw_desc hw;
+ struct device_node *of_node;
};
#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 03/15] ARM: shmobile: Add support OF of INTC for r8a7740
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
2012-11-07 8:50 ` [PATCH 01/15] ARM: shmobile: Add support OF for INTC of shmobile Simon Horman
2012-11-07 8:50 ` [PATCH 02/15] SH: intc: Add support OF of IRQ Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 04/15] ARM: shmobile: Add support OF of INTC for sh73a0 Simon Horman
` (11 subsequent siblings)
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
This CPU has three interrupt controllers (INTCA, INTCS and INTCA IRQ pins).
This supports these.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
v2 [Simon Horman]
* Use #ifdef instead of #if defined
* Use CONFIG_OF in place of CONFIG_OF_SH_INTC
* Allow OF and non OF code to be compiled in the same binary and
provide r8a7740_init_irq_of() as a way to initialise INTC
using DT while r8a7740_init_irq() still initialises INTC
using the previous code paths. This is because we would
like to be able to use a single configuration to compile a kernel
for multiple boards and not all r8a7740 boards have DT support yet.
v1 [Nobuhiro Iwamatsu]
---
arch/arm/mach-shmobile/include/mach/common.h | 1 +
arch/arm/mach-shmobile/intc-r8a7740.c | 136 +++++++++++++++++++++++++-
2 files changed, 132 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index d47e215..8402b5d 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -59,6 +59,7 @@ extern struct clk sh73a0_extal2_clk;
extern struct clk sh73a0_extcki_clk;
extern struct clk sh73a0_extalr_clk;
+extern void r8a7740_init_irq_of(void);
extern void r8a7740_init_irq(void);
extern void r8a7740_map_io(void);
extern void r8a7740_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/intc-r8a7740.c b/arch/arm/mach-shmobile/intc-r8a7740.c
index 9a69a31..878fdc6 100644
--- a/arch/arm/mach-shmobile/intc-r8a7740.c
+++ b/arch/arm/mach-shmobile/intc-r8a7740.c
@@ -1,8 +1,9 @@
/*
* R8A7740 processor support
*
- * Copyright (C) 2011 Renesas Solutions Corp.
+ * Copyright (C) 2011, 2012 Renesas Solutions Corp.
* Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
+ * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu@renesas.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -29,6 +30,105 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#ifdef CONFIG_OF
+
+static struct intc_desc intca_desc __initdata;
+static struct resource intca_resources[2] __initdata;
+static struct intc_desc intcs_desc __initdata;
+static struct resource intcs_resources[2] __initdata;
+static struct intc_desc intca_irq_pins_desc __initdata;
+static struct resource intca_pins_resources[1] __initdata;
+static unsigned short intevtsa_vect;
+
+static int r8a7740_intca_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret;
+
+ if (WARN_ON(!np))
+ return -ENODEV;
+
+ ret = of_sh_intc_get_meminfo(np,
+ intca_resources, ARRAY_SIZE(intcs_resources));
+ if (ret)
+ goto error;
+
+ intca_desc.resource = intca_resources;
+ intca_desc.num_resources = ARRAY_SIZE(intca_resources);
+
+ ret = of_sh_intc_get_intc(np, &intca_desc);
+ if (ret)
+ goto error;
+
+ intca_desc.name = "r8a7740-intca";
+error:
+ return ret;
+}
+
+static int r8a7740_intcs_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret;
+
+ if (WARN_ON(!np))
+ return -ENODEV;
+
+ ret = of_sh_intc_get_meminfo(np,
+ intcs_resources, ARRAY_SIZE(intcs_resources));
+ if (ret)
+ goto error;
+
+ intcs_desc.resource = intcs_resources;
+ intcs_desc.num_resources = ARRAY_SIZE(intcs_resources);
+
+ ret = of_sh_intc_get_intc(np, &intcs_desc);
+ if (ret)
+ goto error;
+
+ of_sh_intc_get_intevtsa_vect(np, &intevtsa_vect);
+
+ intcs_desc.name = "r8a7740-intcs";
+
+error:
+ return ret;
+}
+
+static int r8a7740_intca_pins_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret;
+
+ if (WARN_ON(!np))
+ return -ENODEV;
+
+ ret = of_sh_intc_get_meminfo(np, intca_pins_resources,
+ ARRAY_SIZE(intca_pins_resources));
+ if (ret)
+ goto error;
+
+ intca_irq_pins_desc.resource = intca_pins_resources;
+ intca_irq_pins_desc.num_resources = ARRAY_SIZE(intca_pins_resources);
+
+ ret = of_sh_intc_get_intc_pins(np, &intca_irq_pins_desc);
+ if (ret)
+ goto error;
+
+ intca_irq_pins_desc.name = "r8a7740-intca-irq-pins";
+
+error:
+ return ret;
+}
+
+static const struct of_device_id irq_of_match[] __initconst = {
+ { .compatible = "renesas,sh_intcs", .data = r8a7740_intcs_of_init },
+ { .compatible = "renesas,sh_intca_irq_pins",
+ .data = r8a7740_intca_pins_of_init },
+ { .compatible = "renesas,sh_intca", .data = r8a7740_intca_of_init },
+ { /*sentinel*/ }
+};
+
+#endif /* CONFIG_OF */
+
/*
* INTCA
*/
@@ -623,15 +723,41 @@ static void intcs_demux(unsigned int irq, struct irq_desc *desc)
generic_handle_irq(intcs_evt2irq(evtcodeas));
}
-void __init r8a7740_init_irq(void)
+static void __init r8a7740_init_irq__(bool of)
{
- void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
+ void __iomem *intevtsa;
+
+#ifdef CONFIG_OF
+ if (of)
+ of_irq_init(irq_of_match);
+#endif
register_intc_controller(&intca_desc);
register_intc_controller(&intca_irq_pins_desc);
register_intc_controller(&intcs_desc);
/* demux using INTEVTSA */
- irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);
- irq_set_chained_handler(evt2irq(0xf80), intcs_demux);
+ intevtsa = ioremap_nocache(intcs_resources[0].start + 0x100, PAGE_SIZE);
+#ifdef CONFIG_OF
+ if (of) {
+ irq_set_handler_data(evt2irq(intevtsa_vect), (void *)intevtsa);
+ irq_set_chained_handler(evt2irq(intevtsa_vect), intcs_demux);
+ } else
+#endif
+ {
+ irq_set_handler_data(evt2irq(0xf80), (void *)intevtsa);
+ irq_set_chained_handler(evt2irq(0xf80), intcs_demux);
+ }
+}
+
+#ifdef CONFIG_OF
+void __init r8a7740_init_irq_of(void)
+{
+ r8a7740_init_irq__(true);
+}
+#endif
+
+void __init r8a7740_init_irq(void)
+{
+ r8a7740_init_irq__(false);
}
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 04/15] ARM: shmobile: Add support OF of INTC for sh73a0
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (2 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 03/15] ARM: shmobile: Add support OF of INTC for r8a7740 Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 05/15] ARM: shmobile: Add support OF of INTC for sh7372 Simon Horman
` (10 subsequent siblings)
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
This CPU has four interrupt controllers (INTCS, INTCA pins, pint0 and pint1).
This supports these.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
v2 [Simon Horman]
* Use #ifdef instead of #if and #if defined
* Use CONFIG_OF in place of CONFIG_OF_SH_INTC
* Allow OF and non OF code to be compiled in the same binary and
provide sh73a0_init_irq_of() as a way to initialise INTC
using DT while sh73a0_init_irq() still initialises INTC
using the previous code paths. This is because we would
like to be able to use a single configuration to compile a kernel
for multiple boards and not all sh73a0 boards have DT support yet.
v1 [Nobuhiro Iwamatsu]
---
arch/arm/mach-shmobile/include/mach/common.h | 1 +
arch/arm/mach-shmobile/intc-sh73a0.c | 239 +++++++++++++++++++++-----
2 files changed, 201 insertions(+), 39 deletions(-)
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 8402b5d..7696a96 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -48,6 +48,7 @@ extern int sh7372_do_idle_sysc(unsigned long sleep_mode);
extern struct clk sh7372_extal1_clk;
extern struct clk sh7372_extal2_clk;
+extern void sh73a0_init_irq_of(void);
extern void sh73a0_init_irq(void);
extern void sh73a0_map_io(void);
extern void sh73a0_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index f0c5e51..ee62349 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -30,6 +30,137 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#define RELOC_BASE 0x1200
+#ifdef CONFIG_OF
+
+static struct intc_desc intcs_desc __initdata;
+static struct resource intcs_resources[3] __initdata;
+static struct intc_desc intca_irq_pins_desc __initdata;
+static struct resource intca_irq_pins_resources[1] __initdata;
+static struct intc_desc intc_pint0_desc __initdata;
+static struct resource intc_pint0_resources[1] __initdata;
+static struct intc_desc intc_pint1_desc __initdata;
+static struct resource intc_pint1_resources[1] __initdata;
+static unsigned short intevtsa_vect;
+
+static int sh73a0_intcs_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret;
+
+ if (WARN_ON(!np))
+ return -ENODEV;
+
+ ret = of_sh_intc_get_meminfo(np,
+ intcs_resources, ARRAY_SIZE(intcs_resources));
+ if (ret)
+ goto error;
+
+ intcs_desc.resource = intcs_resources;
+ intcs_desc.num_resources = ARRAY_SIZE(intcs_resources);
+
+ ret = of_sh_intc_get_intc(np, &intcs_desc);
+ if (ret)
+ goto error;
+
+ of_sh_intc_get_intevtsa_vect(np, &intevtsa_vect);
+
+ intcs_desc.name = "sh73a0-intcs";
+
+error:
+ return ret;
+}
+
+static int sh73a0_intca_pins_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret;
+
+ if (WARN_ON(!np))
+ return -ENODEV;
+
+ ret = of_sh_intc_get_meminfo(np, intca_irq_pins_resources,
+ ARRAY_SIZE(intca_irq_pins_resources));
+ if (ret)
+ goto error;
+
+ intca_irq_pins_desc.resource = intca_irq_pins_resources;
+ intca_irq_pins_desc.num_resources
+ = ARRAY_SIZE(intca_irq_pins_resources);
+
+ ret = of_sh_intc_get_intc_pins(np, &intca_irq_pins_desc);
+ if (ret)
+ goto error;
+
+ intca_irq_pins_desc.name = "sh73a0-intca-irq-pins";
+
+error:
+ return ret;
+}
+
+static int sh73a0_intc_pint0_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret;
+
+ if (WARN_ON(!np))
+ return -ENODEV;
+
+ ret = of_sh_intc_get_meminfo(np, intc_pint0_resources,
+ ARRAY_SIZE(intc_pint0_resources));
+ if (ret)
+ goto error;
+
+ intc_pint0_desc.resource = intc_pint0_resources;
+ intc_pint0_desc.num_resources = ARRAY_SIZE(intc_pint0_resources);
+
+ ret = of_sh_intc_get_pint(np, &intc_pint0_desc);
+ if (ret)
+ goto error;
+
+ intc_pint0_desc.name = "sh73a0-pint0";
+
+error:
+ return ret;
+}
+
+static int sh73a0_intc_pint1_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret;
+
+ if (WARN_ON(!np))
+ return -ENODEV;
+
+ ret = of_sh_intc_get_meminfo(np, intc_pint1_resources,
+ ARRAY_SIZE(intc_pint1_resources));
+ if (ret)
+ goto error;
+
+ intc_pint1_desc.resource = intc_pint1_resources;
+ intc_pint1_desc.num_resources = ARRAY_SIZE(intc_pint1_resources);
+
+ ret = of_sh_intc_get_pint(np, &intc_pint1_desc);
+ if (ret)
+ goto error;
+
+ intc_pint1_desc.name = "sh73a0-pint1";
+
+error:
+ return ret;
+}
+
+static const struct of_device_id irq_of_match[] __initconst = {
+ { .compatible = "renesas,sh_intcs", .data = sh73a0_intcs_of_init },
+ { .compatible = "renesas,sh_intca_irq_pins",
+ .data = sh73a0_intca_pins_of_init },
+ { .compatible = "renesas,sh_pint0", .data = sh73a0_intc_pint0_of_init },
+ { .compatible = "renesas,sh_pint1", .data = sh73a0_intc_pint1_of_init },
+ { /*sentinel*/ }
+};
+
+#endif /* CONFIG_OF */
+
enum {
UNUSED = 0,
@@ -243,6 +374,42 @@ static struct intc_desc intcs_desc __initdata = {
intcs_prio_registers, NULL, NULL),
};
+/* IRQ PINS */
+
+/* INTCA IRQ pins at INTCS + RELOC_BASE to make space for GIC+INTC handling */
+#define INTCS_VECT_RELOC(n, vect) INTCS_VECT((n), (vect) + RELOC_BASE)
+
+INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,
+ INTCS_VECT_RELOC, "sh73a0-intca-irq-pins");
+
+/* PINT */
+#define PINTER0_PHYS 0xe69000a0
+#define PINTER1_PHYS 0xe69000a4
+#define PINTER0_VIRT IOMEM(0xe69000a0)
+#define PINTER1_VIRT IOMEM(0xe69000a4)
+#define PINTRR0 IOMEM(0xe69000d0)
+#define PINTRR1 IOMEM(0xe69000d4)
+
+#define PINT0A_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq))
+#define PINT0B_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 8))
+#define PINT0C_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 16))
+#define PINT0D_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 24))
+#define PINT1E_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT1_IRQ(irq))
+
+INTC_PINT(intc_pint0, PINTER0_PHYS, 0xe69000b0, "sh73a0-pint0", \
+ INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
+ INTC_PINT_V(A, PINT0A_IRQ), INTC_PINT_V(B, PINT0B_IRQ), \
+ INTC_PINT_V(C, PINT0C_IRQ), INTC_PINT_V(D, PINT0D_IRQ), \
+ INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
+ INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D));
+
+INTC_PINT(intc_pint1, PINTER1_PHYS, 0xe69000c0, "sh73a0-pint1", \
+ INTC_PINT_E(E), INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, \
+ INTC_PINT_V(E, PINT1E_IRQ), INTC_PINT_V_NONE, \
+ INTC_PINT_V_NONE, INTC_PINT_V_NONE, \
+ INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E(E), \
+ INTC_PINT_E(E), INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E_NONE);
+
static struct irqaction sh73a0_intcs_cascade;
static irqreturn_t sh73a0_intcs_demux(int irq, void *dev_id)
@@ -259,14 +426,6 @@ static int sh73a0_set_wake(struct irq_data *data, unsigned int on)
return 0; /* always allow wakeup */
}
-#define RELOC_BASE 0x1200
-
-/* INTCA IRQ pins at INTCS + RELOC_BASE to make space for GIC+INTC handling */
-#define INTCS_VECT_RELOC(n, vect) INTCS_VECT((n), (vect) + RELOC_BASE)
-
-INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,
- INTCS_VECT_RELOC, "sh73a0-intca-irq-pins");
-
static int to_gic_irq(struct irq_data *data)
{
unsigned int vect = irq2evt(data->irq) - INTCS_VECT_BASE;
@@ -366,33 +525,6 @@ static irqreturn_t sh73a0_irq_pin_demux(int irq, void *dev_id)
static struct irqaction sh73a0_irq_pin_cascade[32];
-#define PINTER0_PHYS 0xe69000a0
-#define PINTER1_PHYS 0xe69000a4
-#define PINTER0_VIRT IOMEM(0xe69000a0)
-#define PINTER1_VIRT IOMEM(0xe69000a4)
-#define PINTRR0 IOMEM(0xe69000d0)
-#define PINTRR1 IOMEM(0xe69000d4)
-
-#define PINT0A_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq))
-#define PINT0B_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 8))
-#define PINT0C_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 16))
-#define PINT0D_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT0_IRQ(irq + 24))
-#define PINT1E_IRQ(n, irq) INTC_IRQ((n), SH73A0_PINT1_IRQ(irq))
-
-INTC_PINT(intc_pint0, PINTER0_PHYS, 0xe69000b0, "sh73a0-pint0", \
- INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
- INTC_PINT_V(A, PINT0A_IRQ), INTC_PINT_V(B, PINT0B_IRQ), \
- INTC_PINT_V(C, PINT0C_IRQ), INTC_PINT_V(D, PINT0D_IRQ), \
- INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D), \
- INTC_PINT_E(A), INTC_PINT_E(B), INTC_PINT_E(C), INTC_PINT_E(D));
-
-INTC_PINT(intc_pint1, PINTER1_PHYS, 0xe69000c0, "sh73a0-pint1", \
- INTC_PINT_E(E), INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, INTC_PINT_E_EMPTY, \
- INTC_PINT_V(E, PINT1E_IRQ), INTC_PINT_V_NONE, \
- INTC_PINT_V_NONE, INTC_PINT_V_NONE, \
- INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E(E), \
- INTC_PINT_E(E), INTC_PINT_E_NONE, INTC_PINT_E_NONE, INTC_PINT_E_NONE);
-
static struct irqaction sh73a0_pint0_cascade;
static struct irqaction sh73a0_pint1_cascade;
@@ -411,31 +543,48 @@ static void pint_demux(void __iomem *rr, void __iomem *er, int base_irq)
static irqreturn_t sh73a0_pint0_demux(int irq, void *dev_id)
{
- pint_demux(PINTRR0, PINTER0_VIRT, SH73A0_PINT0_IRQ(0));
+ pint_demux(IOMEM(intca_irq_pins_resources[0].start + 0xd0),
+ IOMEM(intca_irq_pins_resources[0].start + 0xa0),
+ SH73A0_PINT0_IRQ(0));
return IRQ_HANDLED;
}
static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id)
{
- pint_demux(PINTRR1, PINTER1_VIRT, SH73A0_PINT1_IRQ(0));
+ pint_demux(IOMEM(intca_irq_pins_resources[0].start + 0xd4),
+ IOMEM(intca_irq_pins_resources[0].start + 0xa4),
+ SH73A0_PINT1_IRQ(0));
return IRQ_HANDLED;
}
-void __init sh73a0_init_irq(void)
+static void __init sh73a0_init_irq__(bool of)
{
void __iomem *gic_dist_base = IOMEM(0xf0001000);
void __iomem *gic_cpu_base = IOMEM(0xf0000100);
- void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
+ void __iomem *intevtsa;
int k, n;
gic_init(0, 29, gic_dist_base, gic_cpu_base);
gic_arch_extn.irq_set_wake = sh73a0_set_wake;
+#ifdef CONFIG_OF
+ if (of)
+ of_irq_init(irq_of_match);
+#endif
+
register_intc_controller(&intcs_desc);
register_intc_controller(&intca_irq_pins_desc);
register_intc_controller(&intc_pint0_desc);
register_intc_controller(&intc_pint1_desc);
+#ifdef CONFIG_OF
+ if (of)
+ intevtsa = ioremap_nocache(intcs_resources[0].start + 0x100,
+ PAGE_SIZE);
+ else
+#endif
+ intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
+
/* demux using INTEVTSA */
sh73a0_intcs_cascade.name = "INTCS cascade";
sh73a0_intcs_cascade.handler = sh73a0_intcs_demux;
@@ -464,3 +613,15 @@ void __init sh73a0_init_irq(void)
sh73a0_pint1_cascade.handler = sh73a0_pint1_demux;
setup_irq(gic_spi(34), &sh73a0_pint1_cascade);
}
+
+#ifdef CONFIG_OF
+void __init sh73a0_init_irq_of(void)
+{
+ sh73a0_init_irq__(true);
+}
+#endif
+
+void __init sh73a0_init_irq(void)
+{
+ sh73a0_init_irq__(false);
+}
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 05/15] ARM: shmobile: Add support OF of INTC for sh7372
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (3 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 04/15] ARM: shmobile: Add support OF of INTC for sh73a0 Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 06/15] ARM: shmobile: Add DT table of INTC for sh73a0 Simon Horman
` (9 subsequent siblings)
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
This CPU has four interrupt controllers (INTCA, INTCS, pins-High and pins-Low).
This supports these.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
v2 [Simon Horman]
* Don't add trailing blank line
* Use #ifdef instead of #if defined
* Use CONFIG_OF in place of CONFIG_OF_SH_INTC
* Allow OF and non OF code to be compiled in the same binary and
provide sh7372_init_irq_of() as a way to initialise INTC
using DT while sh7372_init_irq() still initialises INTC
using the previous code paths. This is because we would
like to be able to use a single configuration to compile a kernel
for multiple boards and not all sh7372 boards have DT support yet.
v1 [Nobuhiro Iwamatsu]
---
arch/arm/mach-shmobile/include/mach/common.h | 1 +
arch/arm/mach-shmobile/intc-sh7372.c | 210 +++++++++++++++++++++++---
2 files changed, 190 insertions(+), 21 deletions(-)
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 7696a96..f44a36b 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -36,6 +36,7 @@ extern void sh7377_pinmux_init(void);
extern struct clk sh7377_extalc1_clk;
extern struct clk sh7377_extal2_clk;
+extern void sh7372_init_irq_of(void);
extern void sh7372_init_irq(void);
extern void sh7372_map_io(void);
extern void sh7372_add_early_devices(void);
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index a91caad..27bd6d5 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -28,6 +28,137 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
+#ifdef CONFIG_OF
+
+static struct intc_desc intca_desc __initdata;
+static struct resource intca_resources[2] __initdata;
+static struct intc_desc intcs_desc __initdata;
+static struct resource intcs_resources[2] __initdata;
+static struct intc_desc intca_irq_pins_lo_desc __initdata;
+static struct resource intca_pins_lo_resources[1] __initdata;
+static struct intc_desc intca_irq_pins_hi_desc __initdata;
+static struct resource intca_pins_hi_resources[1] __initdata;
+static unsigned short intevtsa_vect;
+
+static int sh7372_intca_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret;
+
+ if (WARN_ON(!np))
+ return -ENODEV;
+
+ ret = of_sh_intc_get_meminfo(np,
+ intca_resources, ARRAY_SIZE(intcs_resources));
+ if (ret)
+ goto error;
+
+ intca_desc.resource = intca_resources;
+ intca_desc.num_resources = ARRAY_SIZE(intca_resources);
+
+ ret = of_sh_intc_get_intc(np, &intca_desc);
+ if (ret)
+ goto error;
+
+ intca_desc.name = "sh7372-intca";
+error:
+ return ret;
+}
+
+static int sh7372_intcs_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret;
+
+ if (WARN_ON(!np))
+ return -ENODEV;
+
+ ret = of_sh_intc_get_meminfo(np,
+ intcs_resources, ARRAY_SIZE(intcs_resources));
+ if (ret)
+ goto error;
+
+ intcs_desc.resource = intcs_resources;
+ intcs_desc.num_resources = ARRAY_SIZE(intcs_resources);
+
+ ret = of_sh_intc_get_intc(np, &intcs_desc);
+ if (ret)
+ goto error;
+
+ of_sh_intc_get_intevtsa_vect(np, &intevtsa_vect);
+
+ intcs_desc.name = "sh7372-intcs";
+
+error:
+ return ret;
+}
+
+static int sh7372_intca_pins_lo_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret;
+
+ if (WARN_ON(!np))
+ return -ENODEV;
+
+ ret = of_sh_intc_get_meminfo(np, intca_pins_lo_resources,
+ ARRAY_SIZE(intca_pins_lo_resources));
+ if (ret)
+ goto error;
+
+ intca_irq_pins_lo_desc.resource = intca_pins_lo_resources;
+ intca_irq_pins_lo_desc.num_resources
+ = ARRAY_SIZE(intca_pins_lo_resources);
+
+ ret = of_sh_intc_get_intc_pins(np, &intca_irq_pins_lo_desc);
+ if (ret)
+ goto error;
+
+ intca_irq_pins_lo_desc.name = "sh7372-intca-irq-lo";
+
+error:
+ return ret;
+}
+
+static int sh7372_intca_pins_hi_of_init(struct device_node *np,
+ struct device_node *parent)
+{
+ int ret;
+
+ if (WARN_ON(!np))
+ return -ENODEV;
+
+ ret = of_sh_intc_get_meminfo(np, intca_pins_hi_resources,
+ ARRAY_SIZE(intca_pins_hi_resources));
+ if (ret)
+ goto error;
+
+ intca_irq_pins_hi_desc.resource = intca_pins_hi_resources;
+ intca_irq_pins_hi_desc.num_resources
+ = ARRAY_SIZE(intca_pins_hi_resources);
+
+ ret = of_sh_intc_get_intc_pins(np, &intca_irq_pins_hi_desc);
+ if (ret)
+ goto error;
+
+ intca_irq_pins_hi_desc.name = "sh7372-intca-irq-hi";
+
+error:
+ return ret;
+}
+
+static const struct of_device_id irq_of_match[] __initconst = {
+ { .compatible = "renesas,sh_intcs", .data = sh7372_intcs_of_init },
+ { .compatible = "renesas,sh_intca_irq_pins_lo",
+ .data = sh7372_intca_pins_lo_of_init },
+ { .compatible = "renesas,sh_intca_irq_pins_hi",
+ .data = sh7372_intca_pins_hi_of_init },
+ { .compatible = "renesas,sh_intca", .data = sh7372_intca_of_init },
+ { /*sentinel*/ }
+};
+
+#endif /* CONFIG_OF */
+
enum {
UNUSED_INTCA = 0,
@@ -551,23 +682,51 @@ static void intcs_demux(unsigned int irq, struct irq_desc *desc)
static void __iomem *intcs_ffd2;
static void __iomem *intcs_ffd5;
+static void __iomem *intca_e694;
+static void __iomem *intca_e695;
-void __init sh7372_init_irq(void)
+static void __init sh7372_init_irq__(bool of)
{
void __iomem *intevtsa;
int n;
- intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE);
- intevtsa = intcs_ffd2 + 0x100;
- intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE);
+#ifdef CONFIG_OF
+ if (of)
+ of_irq_init(irq_of_match);
+#endif
register_intc_controller(&intca_desc);
register_intc_controller(&intca_irq_pins_lo_desc);
register_intc_controller(&intca_irq_pins_hi_desc);
register_intc_controller(&intcs_desc);
- /* setup dummy cascade chip for INTCS */
- n = evt2irq(0xf80);
+#ifdef CONFIG_OF
+ if (of) {
+ intca_e694 = IOMEM(intca_resources[0].start);
+ intca_e695 = IOMEM(intca_resources[1].start);
+
+ intcs_ffd2 = ioremap_nocache(intcs_resources[0].start,
+ PAGE_SIZE);
+ intevtsa = intcs_ffd2 + 0x100;
+ intcs_ffd5 = ioremap_nocache(intcs_resources[1].start,
+ PAGE_SIZE);
+
+ /* setup dummy cascade chip for INTCS */
+ n = evt2irq(intevtsa_vect);
+ } else
+#endif
+ {
+ intca_e694 = IOMEM(0xe6940000);
+ intca_e695 = IOMEM(0xe6950000);
+
+ intcs_ffd2 = ioremap_nocache(0xffd20000, PAGE_SIZE);
+ intevtsa = intcs_ffd2 + 0x100;
+ intcs_ffd5 = ioremap_nocache(0xffd50000, PAGE_SIZE);
+
+ /* setup dummy cascade chip for INTCS */
+ n = evt2irq(0xf80);
+ }
+
irq_alloc_desc_at(n, numa_node_id());
irq_set_chip_and_handler_name(n, &dummy_irq_chip,
handle_level_irq, "level");
@@ -581,6 +740,18 @@ void __init sh7372_init_irq(void)
iowrite16(0, intcs_ffd2 + 0x104);
}
+#ifdef CONFIG_OF
+void __init sh7372_init_irq_of(void)
+{
+ sh7372_init_irq__(true);
+}
+#endif
+
+void __init sh7372_init_irq(void)
+{
+ sh7372_init_irq__(false);
+}
+
static unsigned short ffd2[0x200];
static unsigned short ffd5[0x100];
@@ -624,9 +795,6 @@ void sh7372_intcs_resume(void)
__raw_writeb(ffd5[k], intcs_ffd5 + k);
}
-#define E694_BASE IOMEM(0xe6940000)
-#define E695_BASE IOMEM(0xe6950000)
-
static unsigned short e694[0x200];
static unsigned short e695[0x200];
@@ -635,22 +803,22 @@ void sh7372_intca_suspend(void)
int k;
for (k = 0x00; k <= 0x38; k += 4)
- e694[k] = __raw_readw(E694_BASE + k);
+ e694[k] = __raw_readw(intca_e694 + k);
for (k = 0x80; k <= 0xb4; k += 4)
- e694[k] = __raw_readb(E694_BASE + k);
+ e694[k] = __raw_readb(intca_e694 + k);
for (k = 0x180; k <= 0x1b4; k += 4)
- e694[k] = __raw_readb(E694_BASE + k);
+ e694[k] = __raw_readb(intca_e694 + k);
for (k = 0x00; k <= 0x50; k += 4)
- e695[k] = __raw_readw(E695_BASE + k);
+ e695[k] = __raw_readw(intca_e695 + k);
for (k = 0x80; k <= 0xa8; k += 4)
- e695[k] = __raw_readb(E695_BASE + k);
+ e695[k] = __raw_readb(intca_e695 + k);
for (k = 0x180; k <= 0x1a8; k += 4)
- e695[k] = __raw_readb(E695_BASE + k);
+ e695[k] = __raw_readb(intca_e695+ k);
}
void sh7372_intca_resume(void)
@@ -658,20 +826,20 @@ void sh7372_intca_resume(void)
int k;
for (k = 0x00; k <= 0x38; k += 4)
- __raw_writew(e694[k], E694_BASE + k);
+ __raw_writew(e694[k], intca_e694 + k);
for (k = 0x80; k <= 0xb4; k += 4)
- __raw_writeb(e694[k], E694_BASE + k);
+ __raw_writeb(e694[k], intca_e694 + k);
for (k = 0x180; k <= 0x1b4; k += 4)
- __raw_writeb(e694[k], E694_BASE + k);
+ __raw_writeb(e694[k], intca_e694 + k);
for (k = 0x00; k <= 0x50; k += 4)
- __raw_writew(e695[k], E695_BASE + k);
+ __raw_writew(e695[k], intca_e695 + k);
for (k = 0x80; k <= 0xa8; k += 4)
- __raw_writeb(e695[k], E695_BASE + k);
+ __raw_writeb(e695[k], intca_e695 + k);
for (k = 0x180; k <= 0x1a8; k += 4)
- __raw_writeb(e695[k], E695_BASE + k);
+ __raw_writeb(e695[k], intca_e695 + k);
}
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 06/15] ARM: shmobile: Add DT table of INTC for sh73a0
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (4 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 05/15] ARM: shmobile: Add support OF of INTC for sh7372 Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 10:54 ` Tetsuyuki Kobayashi
2012-11-07 8:50 ` [PATCH 07/15] ARM: shmobile: Add DT table of INTC for sh7372 Simon Horman
` (8 subsequent siblings)
14 siblings, 1 reply; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/boot/dts/sh73a0.dtsi | 810 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 810 insertions(+)
create mode 100644 arch/arm/boot/dts/sh73a0.dtsi
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
new file mode 100644
index 0000000..b0c55e1
--- /dev/null
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -0,0 +1,810 @@
+/*
+ * Device Tree Source for the SH73A0
+ *
+ * Copyright (C) 2012 Renesas Solutions Corp.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "skeleton.dtsi"
+
+/ {
+ compatible = "renesas,sh73a0";
+
+ cpus {
+ cpu at 0 {
+ compatible = "arm,cortex-a8";
+ };
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intcs: interrupt-controller at 0 {
+ compatible = "renesas,sh_intcs";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+ group_size = <8>;
+
+ reg = <0xffd20000 0x200>,
+ <0xffd50000 0x200>,
+ <0xffd60000 0x200>;
+
+ PINTCS_PINT1: intsrc1{ vector = <0x3a00>; };
+ PINTCS_PINT2: intsrc2{ vector = <0x3a20>; };
+ RTDMAC_0_DEI0: intsrc3{ vector = <0x3c00>; };
+ RTDMAC_0_DEI1: intsrc4{ vector = <0x3c20>; };
+ RTDMAC_0_DEI2: intsrc5{ vector = <0x3c40>; };
+ RTDMAC_0_DEI3: intsrc6{ vector = <0x3c60>; };
+ CEU: intsrc7{ vector = <0x3c80>; };
+ MFI: intsrc8{ vector = <0x3d00>; };
+ BBIF2: intsrc9{ vector = <0x3d60>; };
+ VPU: intsrc10{ vector = <0x3d80>; };
+ TSIF1: intsrc11{ vector = <0x3da0>; };
+ _3DG_SGX543: intsrc12{ vector = <0x3de0>; };
+ _2DDMAC_2DDM0: intsrc13{ vector = <0x3e00>; };
+ RTDMAC_1_DEI4: intsrc14{ vector = <0x3f80>; };
+ RTDMAC_1_DEI5: intsrc15{ vector = <0x3fa0>; };
+ RTDMAC_1_DADERR: intsrc16{ vector = <0x3fc0>; };
+ KEYSC_KEY: intsrc17{ vector = <0x3fe0>; };
+ VINT: intsrc18{ vector = <0x4080>; };
+ MSIOF: intsrc19{ vector = <0x4120>; };
+ TMU0_TUNI00: intsrc20{ vector = <0x4280>; };
+ TMU0_TUNI01: intsrc21{ vector = <0x42a0>; };
+ TMU0_TUNI02: intsrc22{ vector = <0x42c0>; };
+ CMT0: intsrc23{ vector = <0x4300>; };
+ TSIF0: intsrc24{ vector = <0x4320>; };
+ CMT2: intsrc25{ vector = <0x4340>; };
+ LMB: intsrc26{ vector = <0x4360>; };
+ MSUG: intsrc27{ vector = <0x4380>; };
+ MSU_MSU: intsrc28{ vector = <0x43a0>; };
+ MSU_MSU2: intsrc29{ vector = <0x43c0>; };
+ CTI: intsrc30{ vector = <0x3800>; };
+ RWDT0: intsrc31{ vector = <0x3840>; };
+ ICB: intsrc32{ vector = <0x3880>; };
+ PEP: intsrc33{ vector = <0x38a0>; };
+ ASA: intsrc34{ vector = <0x38c0>; };
+ JPU_JPEG: intsrc35{ vector = <0x3960>; };
+ LCDC: intsrc36{ vector = <0x3980>; };
+ LCRC: intsrc37{ vector = <0x39a0>; };
+ RTDMAC_2_DEI6: intsrc38{ vector = <0x4700>; };
+ RTDMAC_2_DEI7: intsrc39{ vector = <0x4720>; };
+ RTDMAC_2_DEI8: intsrc40{ vector = <0x4740>; };
+ RTDMAC_2_DEI9: intsrc41{ vector = <0x4760>; };
+ RTDMAC_3_DEI10: intsrc42{ vector = <0x4780>; };
+ RTDMAC_3_DEI11: intsrc43{ vector = <0x47a0>; };
+ FRC: intsrc44{ vector = <0x4b00>; };
+ GCU: intsrc45{ vector = <0x4b60>; };
+ LCDC1: intsrc46{ vector = <0x4b80>; };
+ CSIRX: intsrc47{ vector = <0x4ba0>; };
+ DSITX0_DSITX00: intsrc48{ vector = <0x4bc0>; };
+ DSITX0_DSITX01: intsrc49{ vector = <0x4be0>; };
+ SPU2_SPU0: intsrc50{ vector = <0x4c00>; };
+ SPU2_SPU1: intsrc51{ vector = <0x4c20>; };
+ FSI: intsrc52{ vector = <0x4c40>; };
+ TMU1_TUNI10: intsrc53{ vector = <0x4d00>; };
+ TMU1_TUNI11: intsrc54{ vector = <0x4d20>; };
+ TMU1_TUNI12: intsrc55{ vector = <0x4d40>; };
+ TSIF2: intsrc56{ vector = <0x4d60>; };
+ CMT4: intsrc57{ vector = <0x4d80>; };
+ MFIS2: intsrc58{ vector = <0x4e00>; };
+ CPORTS2R: intsrc59{ vector = <0x4e20>; };
+ TSG: intsrc60{ vector = <0x4ee0>; };
+ DMASCH1: intsrc61{ vector = <0x4f00>; };
+ SCUW: intsrc62{ vector = <0x4f40>; };
+ VIO60: intsrc63{ vector = <0x4f60>; };
+ VIO61: intsrc64{ vector = <0x4f80>; };
+ CEU21: intsrc65{ vector = <0x4fa0>; };
+ CSI21: intsrc66{ vector = <0x4fe0>; };
+ DSITX1_DSITX10: intsrc67{ vector = <0x5000>; };
+ DSITX1_DSITX11: intsrc68{ vector = <0x5020>; };
+ DISP: intsrc69{ vector = <0x5040>; };
+ DSRV: intsrc70{ vector = <0x5060>; };
+ EMUX2_EMUX20I: intsrc71{ vector = <0x5080>; };
+ EMUX2_EMUX21I: intsrc72{ vector = <0x50a0>; };
+ MSTIF0_MST00I: intsrc73{ vector = <0x50c0>; };
+ MSTIF0_MST01I: intsrc74{ vector = <0x50e0>; };
+ MSTIF1_MST10I: intsrc75{ vector = <0x5100>; };
+ MSTIF1_MST11I: intsrc76{ vector = <0x5120>; };
+ SPUV: intsrc77 { vector = <0x5700>; };
+
+ /* group */
+ RTDMAC_0: intc_group0 {
+ group = <&RTDMAC_0_DEI0 &RTDMAC_0_DEI1
+ &RTDMAC_0_DEI2 &RTDMAC_0_DEI3>;
+ };
+
+ RTDMAC_1: intc_group1 {
+ group = <&RTDMAC_1_DEI4 &RTDMAC_1_DEI5
+ &RTDMAC_1_DADERR>;
+ };
+
+ RTDMAC_2: intc_group2 {
+ group = <&RTDMAC_2_DEI6 &RTDMAC_2_DEI7
+ &RTDMAC_2_DEI8 &RTDMAC_2_DEI9>;
+ };
+
+ RTDMAC_3: intc_group3 {
+ group = <&RTDMAC_3_DEI10 &RTDMAC_3_DEI11>;
+ };
+
+ TMU1: intc_group4 {
+ group = <&TMU1_TUNI12 &TMU1_TUNI11 &TMU1_TUNI10>;
+ };
+
+ DSITX0: intc_group5 {
+ group = <&DSITX0_DSITX00 &DSITX0_DSITX01>;
+ };
+ SPU2: intc_group6 {
+ group = <&SPU2_SPU0 &SPU2_SPU1>;
+ };
+ MSU: intc_group7 {
+ group = <&MSU_MSU &MSU_MSU2>;
+ };
+
+ intc_vectors {
+ vector_table = <&PINTCS_PINT1 &PINTCS_PINT2 &RTDMAC_0_DEI0
+ &RTDMAC_0_DEI1 &RTDMAC_0_DEI2 &RTDMAC_0_DEI3
+ &CEU &MFI &BBIF2 &VPU &TSIF1 &_3DG_SGX543
+ &_2DDMAC_2DDM0 &RTDMAC_1_DEI4 &RTDMAC_1_DEI5
+ &RTDMAC_1_DADERR &KEYSC_KEY &VINT &MSIOF
+ &TMU0_TUNI00 &TMU0_TUNI01 &TMU0_TUNI02
+ &CMT0 &TSIF0 &CMT2 &LMB &MSUG &MSU_MSU &MSU_MSU2
+ &CTI &RWDT0 &ICB &PEP &ASA &JPU_JPEG
+ &LCDC &LCRC
+ &RTDMAC_2_DEI6 &RTDMAC_2_DEI7 &RTDMAC_2_DEI8
+ &RTDMAC_2_DEI9 &RTDMAC_3_DEI10 &RTDMAC_3_DEI11
+ &FRC &GCU &LCDC1 &CSIRX &DSITX0_DSITX00
+ &DSITX0_DSITX01 &SPU2_SPU0 &SPU2_SPU1 &FSI
+ &TMU1_TUNI10 &TMU1_TUNI11 &TMU1_TUNI12 &TSIF2
+ &CMT4 &MFIS2 &CPORTS2R &TSG &DMASCH1 &SCUW &VIO60
+ &VIO61 &CEU21 &CSI21
+ &DSITX1_DSITX10 &DSITX1_DSITX11 &DISP &DSRV
+ &EMUX2_EMUX20I &EMUX2_EMUX21I &MSTIF0_MST00I
+ &MSTIF0_MST01I &MSTIF1_MST10I &MSTIF1_MST11I
+ &SPUV>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xffd20184 1>, <0xffd201c4 1>;
+ reginfo = <0 0 0 &CEU 0 0 0 0>;
+ };
+
+ intc_mask1 {
+ reg = <0xffd20188 1>, <0xffd201c8 1>;
+ reginfo = <0 0 0 &VPU &BBIF2 0 0 &MFI>;
+ };
+
+ intc_mask2 {
+ reg = <0xffd2018c 1>, <0xffd201cc 1>;
+ reginfo = <0 0 0 &_2DDMAC_2DDM0 0 &ASA &PEP &ICB>;
+ };
+
+ intc_mask3 {
+ reg = <0xffd20190 1>, <0xffd201d0 1>;
+ reginfo = <0 0 0 &CTI &JPU_JPEG 0 &LCRC &LCDC>;
+ };
+
+ intc_mask4 {
+ reg = <0xffd20194 1>, <0xffd201d4 1>;
+ reginfo = <&KEYSC_KEY &RTDMAC_1_DADERR &RTDMAC_1_DEI5
+ &RTDMAC_1_DEI4 &RTDMAC_0_DEI3 &RTDMAC_0_DEI2
+ &RTDMAC_0_DEI1 &RTDMAC_0_DEI0>;
+ };
+
+ intc_mask5 {
+ reg = <0xffd20198 1>, <0xffd201d8 1>;
+ reginfo = <0 0 &MSIOF 0 &_3DG_SGX543 0 0 0>;
+ };
+
+ intc_mask6 {
+ reg = <0xffd2019c 1>, <0xffd201dc 1>;
+ reginfo = <0 &TMU0_TUNI02 &TMU0_TUNI01 &TMU0_TUNI00
+ 0 0 0 0>;
+ };
+
+ intc_mask7 {
+ reg = <0xffd201a0 1>, <0xffd201e0 1>;
+ reginfo = <0 0 0 0 0 &MSU_MSU &MSU_MSU2 &MSUG>;
+ };
+
+ intc_mask8 {
+ reg = <0xffd201a4 1>, <0xffd201e4 1>;
+ reginfo = <0 &RWDT0 &CMT2 &CMT0 0 0 0 0>;
+ };
+
+ intc_mask9 {
+ reg = <0xffd201ac 1>, <0xffd201ec 1>;
+ reginfo = <0 0 0 0 0 &TSIF1 &LMB &TSIF0>;
+ };
+
+ intc_mask10 {
+ reg = <0xffd201b0 1>, <0xffd201f0 1>;
+ reginfo = <0 0 0 0 0 0 &PINTCS_PINT2 &PINTCS_PINT1>;
+ };
+
+ intc_mask11 {
+ reg = <0xffd50180 1>, <0xffd501c0 1>;
+ reginfo = <&RTDMAC_2_DEI6 &RTDMAC_2_DEI7 &RTDMAC_2_DEI8
+ &RTDMAC_2_DEI9 &RTDMAC_3_DEI10 &RTDMAC_3_DEI11 0 0>;
+ };
+
+ intc_mask12 {
+ reg = <0xffd50190 1>, <0xffd501d0 1>;
+ reginfo = <&FRC 0 0 &GCU &LCDC1 &CSIRX &DSITX0_DSITX00
+ &DSITX0_DSITX01>;
+ };
+
+ intc_mask13 {
+ reg = <0xffd50194 1>, <0xffd501d4 1>;
+ reginfo = <&SPU2_SPU0 &SPU2_SPU1 &FSI 0 0 0 0 0>;
+ };
+
+ intc_mask14 {
+ reg = <0xffd50198 1>, <0xffd501d8 1>;
+ reginfo = <&TMU1_TUNI10 &TMU1_TUNI11 &TMU1_TUNI12 0
+ &TSIF2 &CMT4 0 0>;
+ };
+
+ intc_mask15 {
+ reg = <0xffd5019c 1>, <0xffd501dc 1>;
+ reginfo = <&MFIS2 &CPORTS2R 0 0 0 0 0 &TSG>;
+ };
+
+ intc_mask16 {
+ reg = <0xffd501a0 1>, <0xffd501e0 1>;
+ reginfo = <&DMASCH1 0 &SCUW &VIO60 &VIO61 &CEU21 0 &CSI21>;
+ };
+
+ intc_mask17 {
+ reg = <0xffd501a4 1>, <0xffd501e4 1>;
+ reginfo = <&DSITX1_DSITX10 &DSITX1_DSITX11 &DISP &DSRV
+ &EMUX2_EMUX20I &EMUX2_EMUX21I &MSTIF0_MST00I
+ &MSTIF0_MST01I>;
+ };
+
+ intc_mask18 {
+ reg = <0xffd501a8 1>, <0xffd501e8 1>;
+ reginfo = <&MSTIF0_MST00I &MSTIF0_MST01I 0 0 0 0 0 0>;
+ };
+
+ intc_mask19 {
+ reg = <0xffd60180 1>, <0xffd601c0 1>;
+ reginfo = <&SPUV 0 0 0 0 0 0 0>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xffd20000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&CTI 0 &_2DDMAC_2DDM0 &ICB>;
+ };
+
+ intc_prio1 {
+ reg = <0xffd20004 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&JPU_JPEG &LCDC 0 &LCRC>;
+ };
+
+ intc_prio2 {
+ reg = <0xffd20008 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&BBIF2 0 0 0>;
+ };
+
+ intc_prio3 {
+ reg = <0xffd2000c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&PINTCS_PINT1 &PINTCS_PINT2 0 0>;
+ };
+
+ intc_prio4 {
+ reg = <0xffd20010 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&RTDMAC_0 &CEU &MFI &VPU>;
+ };
+
+ intc_prio5 {
+ reg = <0xffd20014 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&KEYSC_KEY &RTDMAC_1 &CMT2 &CMT0>;
+ };
+
+ intc_prio6 {
+ reg = <0xffd20018 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TMU0_TUNI00 &TMU0_TUNI01 &TMU0_TUNI02 &TSIF1>;
+ };
+
+ intc_prio7 {
+ reg = <0xffd2001c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&VINT 0 0 0>;
+ };
+
+ intc_prio8 {
+ reg = <0xffd20020 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &MSIOF &TSIF0 0>;
+ };
+
+ intc_prio9 {
+ reg = <0xffd20024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &_3DG_SGX543 &MSUG &MSU>;
+ };
+
+ intc_prio10 {
+ reg = <0xffd20028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &ASA &LMB &PEP>;
+ };
+
+ intc_prio11 {
+ reg = <0xffd20030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 0 &RWDT0>;
+ };
+
+ intc_prio12 {
+ reg = <0xffd50000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&RTDMAC_2 0 0 0>;
+ };
+
+ intc_prio13 {
+ reg = <0xffd50004 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&RTDMAC_3 0 0 0>;
+ };
+
+ intc_prio14 {
+ reg = <0xffd50020 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&FRC 0 0 0>;
+ };
+
+ intc_prio15 {
+ reg = <0xffd50024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&LCDC1 &CSIRX &DSITX0 0>;
+ };
+
+ intc_prio16 {
+ reg = <0xffd50028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SPU2 0 &FSI 0>;
+ };
+
+ intc_prio17 {
+ reg = <0xffd50030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TMU1 0 0 &TSIF2>;
+ };
+
+ intc_prio18 {
+ reg = <0xffd50034 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&CMT4 0 0 0>;
+ };
+
+ intc_prio19 {
+ reg = <0xffd50038 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MFIS2 &CPORTS2R 0 0>;
+ };
+
+ intc_prio20 {
+ reg = <0xffd50040 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMASCH1 0 &SCUW &VIO60>;
+ };
+
+ intc_prio21 {
+ reg = <0xffd50044 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&VIO61 &CEU21 0 &CSI21>;
+ };
+
+ intc_prio22 {
+ reg = <0xffd50048 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DSITX1_DSITX10 &DSITX1_DSITX11
+ &DISP &DSRV>;
+ };
+
+ intc_prio23 {
+ reg = <0xffd5004c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&EMUX2_EMUX20I &EMUX2_EMUX21I
+ &MSTIF0_MST00I &MSTIF0_MST01I>;
+ };
+
+ intc_prio24 {
+ reg = <0xffd50050 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MSTIF1_MST10I &MSTIF1_MST11I 0 0>;
+ };
+
+ intc_prio25 {
+ reg = <0xffd60000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SPUV 0 0 0>;
+ };
+ };
+ };
+
+ intca_irq_pins: interrupt-controller at 1 {
+ compatible = "renesas,sh_intca_irq_pins";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ reg = <0xe6900000 0x6c>;
+
+ IRQ0: intsrc1 { vector = <0x4800>; };
+ IRQ1: intsrc2 { vector = <0x4820>; };
+ IRQ2: intsrc3 { vector = <0x4840>; };
+ IRQ3: intsrc4 { vector = <0x4860>; };
+ IRQ4: intsrc5 { vector = <0x4880>; };
+ IRQ5: intsrc6 { vector = <0x48a0>; };
+ IRQ6: intsrc7 { vector = <0x48c0>; };
+ IRQ7: intsrc8 { vector = <0x48e0>; };
+ IRQ8: intsrc9 { vector = <0x4900>; };
+ IRQ9: intsrc10 { vector = <0x4920>; };
+ IRQ10: intsrc11 { vector = <0x4940>; };
+ IRQ11: intsrc12 { vector = <0x4960>; };
+ IRQ12: intsrc13 { vector = <0x4980>; };
+ IRQ13: intsrc14 { vector = <0x49a0>; };
+ IRQ14: intsrc15 { vector = <0x49c0>; };
+ IRQ15: intsrc16 { vector = <0x49e0>; };
+ IRQ16: intsrc17 { vector = <0x7800>; };
+ IRQ17: intsrc18 { vector = <0x7820>; };
+ IRQ18: intsrc19 { vector = <0x7840>; };
+ IRQ19: intsrc20 { vector = <0x7860>; };
+ IRQ20: intsrc21 { vector = <0x7880>; };
+ IRQ21: intsrc22 { vector = <0x78a0>; };
+ IRQ22: intsrc23 { vector = <0x78c0>; };
+ IRQ23: intsrc24 { vector = <0x78e0>; };
+ IRQ24: intsrc25 { vector = <0x7900>; };
+ IRQ25: intsrc26 { vector = <0x7920>; };
+ IRQ26: intsrc27 { vector = <0x7940>; };
+ IRQ27: intsrc28 { vector = <0x7960>; };
+ IRQ28: intsrc29 { vector = <0x7980>; };
+ IRQ29: intsrc30 { vector = <0x79a0>; };
+ IRQ30: intsrc31 { vector = <0x79c0>; };
+ IRQ31: intsrc32 { vector = <0x79e0>; };
+
+ intc_vectors {
+ vector_table = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5
+ &IRQ6 &IRQ7 &IRQ8 &IRQ9 &IRQ10
+ &IRQ11 &IRQ12 &IRQ13 &IRQ14 &IRQ15
+ &IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20
+ &IRQ21 &IRQ22 &IRQ23 &IRQ24 &IRQ25
+ &IRQ26 &IRQ27 &IRQ28 &IRQ29 &IRQ30
+ &IRQ31>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6900040 1>, <0xe6900060 1>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4
+ &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_mask1 {
+ reg = <0xe6900044 1>, <0xe6900064 1>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_mask2 {
+ reg = <0xe6900048 1>, <0xe6900068 1>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_mask3 {
+ reg = <0xe690004C 1>, <0xe690006C 1>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6900010 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_prio1 {
+ reg = <0xe6900014 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_prio2 {
+ reg = <0xe6900018 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_prio3 {
+ reg = <0xe690001C 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_sense_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_sense0 {
+ reg = <0xe6900000 4>;
+ field-width = <4>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_sense1 {
+ reg = <0xe6900004 4>;
+ field-width = <4>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_sense2 {
+ reg = <0xe6900008 4>;
+ field-width = <4>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_sense3 {
+ reg = <0xe690000C 4>;
+ field-width = <4>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_ack_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_ack0 {
+ reg = <0xe6900020 1>, <0x0 0>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_ack1 {
+ reg = <0xe6900024 1>, <0x0 0>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_ack2 {
+ reg = <0xe6900028 1>, <0x0 0>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_ack3 {
+ reg = <0xe690002C 1>, <0x0 0>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+ };
+
+ intc_pint0: interrupt-controller at 2 {
+ compatible = "renesas,sh_pint0";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ reg = <0xe69000a0 0x20>;
+
+ PINTA0: intsrc1 { vector = <0x5980>; };
+ PINTA1: intsrc2 { vector = <0x59a0>; };
+ PINTA2: intsrc3 { vector = <0x59c0>; };
+ PINTA3: intsrc4 { vector = <0x59e0>; };
+ PINTA4: intsrc5 { vector = <0x5a00>; };
+ PINTA5: intsrc6 { vector = <0x5a20>; };
+ PINTA6: intsrc7 { vector = <0x5a40>; };
+ PINTA7: intsrc8 { vector = <0x5a60>; };
+ PINTB0: intsrc9 { vector = <0x5a80>; };
+ PINTB1: intsrc10 { vector = <0x5aa0>; };
+ PINTB2: intsrc11 { vector = <0x5ac0>; };
+ PINTB3: intsrc12 { vector = <0x5ae0>; };
+ PINTB4: intsrc13 { vector = <0x5b00>; };
+ PINTB5: intsrc14 { vector = <0x5b20>; };
+ PINTB6: intsrc15 { vector = <0x5b40>; };
+ PINTB7: intsrc16 { vector = <0x5b60>; };
+ PINTC0: intsrc17 { vector = <0x5b80>; };
+ PINTC1: intsrc18 { vector = <0x5ba0>; };
+ PINTC2: intsrc19 { vector = <0x5bc0>; };
+ PINTC3: intsrc20 { vector = <0x5be0>; };
+ PINTC4: intsrc21 { vector = <0x5c00>; };
+ PINTC5: intsrc22 { vector = <0x5c20>; };
+ PINTC6: intsrc23 { vector = <0x5c40>; };
+ PINTC7: intsrc24 { vector = <0x5c60>; };
+ PINTD0: intsrc25 { vector = <0x5c80>; };
+ PINTD1: intsrc26 { vector = <0x5ca0>; };
+ PINTD2: intsrc27 { vector = <0x5cc0>; };
+ PINTD3: intsrc28 { vector = <0x5ce0>; };
+ PINTD4: intsrc29 { vector = <0x5d00>; };
+ PINTD5: intsrc30 { vector = <0x5d20>; };
+ PINTD6: intsrc31 { vector = <0x5d40>; };
+ PINTD7: intsrc32 { vector = <0x5d60>; };
+
+ intc_vectors {
+ vector_table = <&PINTA0 &PINTA1 &PINTA2
+ &PINTA3 &PINTA4 &PINTA5 &PINTA6
+ &PINTA7 &PINTB0 &PINTB1 &PINTB2
+ &PINTB3 &PINTB4 &PINTB5 &PINTB6
+ &PINTB7 &PINTC0 &PINTC1 &PINTC2
+ &PINTC3 &PINTC4 &PINTC5 &PINTC6
+ &PINTC7 &PINTD0 &PINTD1 &PINTD2
+ &PINTD3 &PINTD4 &PINTD5 &PINTD6
+ &PINTD7>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe69000a0 4>, <0x0 0>; /* FIXME */
+ reginfo = <&PINTA0 &PINTA1 &PINTA2
+ &PINTA3 &PINTA4 &PINTA5 &PINTA6
+ &PINTA7 &PINTB0 &PINTB1 &PINTB2
+ &PINTB3 &PINTB4 &PINTB5 &PINTB6
+ &PINTB7 &PINTC0 &PINTC1 &PINTC2
+ &PINTC3 &PINTC4 &PINTC5 &PINTC6
+ &PINTC7 &PINTD0 &PINTD1 &PINTD2
+ &PINTD3 &PINTD4 &PINTD5 &PINTD6
+ &PINTD7>;
+ };
+ };
+
+ intc_sense_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_sense0 {
+ reg = <0xe69000b0 2>, <0x0 0>;
+ field-width = <2>;
+ reginfo = <&PINTA0 &PINTA1 &PINTA2 &PINTA3
+ &PINTA4 &PINTA5 &PINTA6 &PINTA7>;
+ };
+
+ intc_sense1 {
+ reg = <0xe69000b4 2>, <0x0 0>;
+ field-width = <2>;
+ reginfo = <&PINTB0 &PINTB1 &PINTB2 &PINTB3
+ &PINTB4 &PINTB5 &PINTB6 &PINTB7>;
+ };
+
+ intc_sense2 {
+ reg = <0xe69000b8 2>, <0x0 0>;
+ field-width = <2>;
+ reginfo = <&PINTC0 &PINTC1 &PINTC2 &PINTC3
+ &PINTC4 &PINTC5 &PINTC6 &PINTC7>;
+ };
+
+ intc_sense3 {
+ reg = <0xe69000bc 2>, <0x0 0>;
+ field-width = <2>;
+ reginfo = <&PINTD0 &PINTD1 &PINTD2 &PINTD3
+ &PINTD4 &PINTD5 &PINTD6 &PINTD7>;
+ };
+ };
+ };
+
+ intc_pint1: interrupt-controller at 3 {
+ compatible = "renesas,sh_pint1";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+
+ reg = <0xe69000a4 0x20>;
+
+ PINTE0: intsrc1 { vector = <0x5d80>; };
+ PINTE1: intsrc2 { vector = <0x5da0>; };
+ PINTE2: intsrc3 { vector = <0x5dc0>; };
+ PINTE3: intsrc4 { vector = <0x5de0>; };
+ PINTE4: intsrc5 { vector = <0x5e00>; };
+ PINTE5: intsrc6 { vector = <0x5e20>; };
+ PINTE6: intsrc7 { vector = <0x5e40>; };
+ PINTE7: intsrc8 { vector = <0x5e60>; };
+
+ intc_vectors {
+ vector_table = <&PINTE0 &PINTE1 &PINTE2
+ &PINTE3 &PINTE4 &PINTE5 &PINTE6
+ &PINTE7>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe69000a4 4>, <0x0 0>; /* FIXME */
+ reginfo = <&PINTE0 &PINTE1 &PINTE2 &PINTE3
+ &PINTE4 &PINTE5 &PINTE6 &PINTE7>;
+ };
+ };
+
+ intc_sense_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_sense0 {
+ reg = <0xe69000c0 2>, <0x0 0>;
+ field-width = <2>;
+ reginfo = <&PINTE0 &PINTE1 &PINTE2 &PINTE3
+ &PINTE4 &PINTE5 &PINTE6 &PINTE7>;
+ };
+
+ intc_sense1 {
+ reg = <0xe69000c4 2>, <0x0 0>;
+ field-width = <2>;
+ reginfo = <0 0 0 0 0 0 0 0>;
+ };
+
+ intc_sense2 {
+ reg = <0xe69000c8 2>, <0x0 0>;
+ field-width = <2>;
+ reginfo = <0 0 0 0 0 0 0 0>;
+ };
+
+ intc_sense3 {
+ reg = <0xe69000cc 2>, <0x0 0>;
+ field-width = <2>;
+ reginfo = <0 0 0 0 0 0 0 0>;
+ };
+ };
+ };
+ };
+};
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 06/15] ARM: shmobile: Add DT table of INTC for sh73a0
2012-11-07 8:50 ` [PATCH 06/15] ARM: shmobile: Add DT table of INTC for sh73a0 Simon Horman
@ 2012-11-07 10:54 ` Tetsuyuki Kobayashi
2012-11-08 0:48 ` Simon Horman
2012-11-08 0:55 ` Nobuhiro Iwamatsu
0 siblings, 2 replies; 19+ messages in thread
From: Tetsuyuki Kobayashi @ 2012-11-07 10:54 UTC (permalink / raw)
To: linux-arm-kernel
Hello, Iwamatsu-san, Simon-san
(2012/11/07 17:50), Simon Horman wrote:
> From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
>
> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
> Signed-off-by: Simon Horman <horms@verge.net.au>
> ---
> arch/arm/boot/dts/sh73a0.dtsi | 810 +++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 810 insertions(+)
> create mode 100644 arch/arm/boot/dts/sh73a0.dtsi
>
> diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
> new file mode 100644
> index 0000000..b0c55e1
> --- /dev/null
> +++ b/arch/arm/boot/dts/sh73a0.dtsi
> @@ -0,0 +1,810 @@
> +/*
> + * Device Tree Source for the SH73A0
> + *
> + * Copyright (C) 2012 Renesas Solutions Corp.
> + *
> + * This file is licensed under the terms of the GNU General Public License
> + * version 2. This program is licensed "as is" without any warranty of any
> + * kind, whether express or implied.
> + */
> +
> +/include/ "skeleton.dtsi"
> +
> +/ {
> + compatible = "renesas,sh73a0";
> +
> + cpus {
> + cpu at 0 {
> + compatible = "arm,cortex-a8";
> + };
> + };
SH73A0 is dual core cortex-a9.
^ permalink raw reply [flat|nested] 19+ messages in thread* [PATCH 06/15] ARM: shmobile: Add DT table of INTC for sh73a0
2012-11-07 10:54 ` Tetsuyuki Kobayashi
@ 2012-11-08 0:48 ` Simon Horman
2012-11-08 0:55 ` Nobuhiro Iwamatsu
1 sibling, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-08 0:48 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Nov 07, 2012 at 07:54:58PM +0900, Tetsuyuki Kobayashi wrote:
> Hello, Iwamatsu-san, Simon-san
>
> (2012/11/07 17:50), Simon Horman wrote:
> > From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
> >
> > Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
> > Signed-off-by: Simon Horman <horms@verge.net.au>
> > ---
> > arch/arm/boot/dts/sh73a0.dtsi | 810 +++++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 810 insertions(+)
> > create mode 100644 arch/arm/boot/dts/sh73a0.dtsi
> >
> > diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
> > new file mode 100644
> > index 0000000..b0c55e1
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/sh73a0.dtsi
> > @@ -0,0 +1,810 @@
> > +/*
> > + * Device Tree Source for the SH73A0
> > + *
> > + * Copyright (C) 2012 Renesas Solutions Corp.
> > + *
> > + * This file is licensed under the terms of the GNU General Public License
> > + * version 2. This program is licensed "as is" without any warranty of any
> > + * kind, whether express or implied.
> > + */
> > +
> > +/include/ "skeleton.dtsi"
> > +
> > +/ {
> > + compatible = "renesas,sh73a0";
> > +
> > + cpus {
> > + cpu at 0 {
> > + compatible = "arm,cortex-a8";
> > + };
> > + };
>
> SH73A0 is dual core cortex-a9.
Thanks, I have changed the patch to use "arm,cortex-a9"
^ permalink raw reply [flat|nested] 19+ messages in thread* [PATCH 06/15] ARM: shmobile: Add DT table of INTC for sh73a0
2012-11-07 10:54 ` Tetsuyuki Kobayashi
2012-11-08 0:48 ` Simon Horman
@ 2012-11-08 0:55 ` Nobuhiro Iwamatsu
1 sibling, 0 replies; 19+ messages in thread
From: Nobuhiro Iwamatsu @ 2012-11-08 0:55 UTC (permalink / raw)
To: linux-arm-kernel
Hi,
Tetsuyuki Kobayashi ????????:
> Hello, Iwamatsu-san, Simon-san
>
> (2012/11/07 17:50), Simon Horman wrote:
>> From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
>>
>> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
>> Signed-off-by: Simon Horman <horms@verge.net.au>
>> ---
>> arch/arm/boot/dts/sh73a0.dtsi | 810 +++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 810 insertions(+)
>> create mode 100644 arch/arm/boot/dts/sh73a0.dtsi
>>
>> diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
>> new file mode 100644
>> index 0000000..b0c55e1
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/sh73a0.dtsi
>> @@ -0,0 +1,810 @@
>> +/*
>> + * Device Tree Source for the SH73A0
>> + *
>> + * Copyright (C) 2012 Renesas Solutions Corp.
>> + *
>> + * This file is licensed under the terms of the GNU General Public License
>> + * version 2. This program is licensed "as is" without any warranty of any
>> + * kind, whether express or implied.
>> + */
>> +
>> +/include/ "skeleton.dtsi"
>> +
>> +/ {
>> + compatible = "renesas,sh73a0";
>> +
>> + cpus {
>> + cpu at 0 {
>> + compatible = "arm,cortex-a8";
>> + };
>> + };
>
> SH73A0 is dual core cortex-a9.
>
Thanks, I will fix.
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 07/15] ARM: shmobile: Add DT table of INTC for sh7372
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (5 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 06/15] ARM: shmobile: Add DT table of INTC for sh73a0 Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 08/15] ARM: shmobile: Add DT table of INTC for r8a7740 Simon Horman
` (7 subsequent siblings)
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
[horms at verge.net.au use only tabs for indentation]
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/boot/dts/sh7372.dtsi | 1138 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 1138 insertions(+)
diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi
index 677fc60..1dd5dde 100644
--- a/arch/arm/boot/dts/sh7372.dtsi
+++ b/arch/arm/boot/dts/sh7372.dtsi
@@ -18,4 +18,1142 @@
compatible = "arm,cortex-a8";
};
};
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intca: interrupt-controller at 0 {
+ compatible = "renesas,sh_intca";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+ group_size = <15>;
+
+ reg = <0xe6940000 0x200>, <0xe6950000 0x200>;
+
+ DIRC: intsrc1 { vector = <0x0560>; };
+ CRYPT_STD: intsrc2 { vector = <0x0700>; };
+ IIC1_ALI1: intsrc3 { vector = <0x0780>; };
+ IIC1_TACKI1:intsrc4 { vector = <0x07a0>; };
+ IIC1_WAITI1:intsrc5 { vector = <0x07c0>; };
+ IIC1_DTEI1: intsrc6 { vector = <0x07e0>; };
+ AP_ARM_IRQPMU: intsrc7 { vector = <0x0800>; };
+ AP_ARM_COMMTX: intsrc8 { vector = <0x0840>; };
+ AP_ARM_COMMRX: intsrc9 { vector = <0x0860>; };
+ MFI_MFIM: intsrc10 { vector = <0x0900>; };
+ MFI_MFIS: intsrc11 { vector = <0x0920>; };
+ BBIF1: intsrc12 { vector = <0x0940>; };
+ BBIF2: intsrc13 { vector = <0x0960>; };
+ USBHSDMAC0_USHDMI: intsrc14 { vector = <0x0a00>; };
+ _3DG_SGX540: intsrc15 { vector = <0x0a60>; };
+ CMT1_CMT10: intsrc16 { vector = <0x0b00>; };
+ CMT1_CMT11: intsrc17 { vector = <0x0b20>; };
+ CMT1_CMT12: intsrc18 { vector = <0x0b40>; };
+ CMT1_CMT13: intsrc19 { vector = <0x0b60>; };
+ CMT2: intsrc20 { vector = <0x0b80>; };
+ CMT3: intsrc21 { vector = <0x0ba0>; };
+ KEYSC_KEY: intsrc22 { vector = <0x0be0>; };
+ SCIFA0: intsrc23 { vector = <0x0c00>; };
+ SCIFA1: intsrc24 { vector = <0x0c20>; };
+ SCIFA2: intsrc25 { vector = <0x0c40>; };
+ SCIFA3: intsrc26 { vector = <0x0c60>; };
+ MSIOF2: intsrc27 { vector = <0x0c80>; };
+ MSIOF1: intsrc28 { vector = <0x0d00>; };
+ SCIFA4: intsrc29 { vector = <0x0d20>; };
+ SCIFA5: intsrc30 { vector = <0x0d40>; };
+ SCIFB: intsrc31 { vector = <0x0d60>; };
+ FLCTL_FLSTEI: intsrc32 { vector = <0x0d80>; };
+ FLCTL_FLTENDI: intsrc33 { vector = <0x0da0>; };
+ FLCTL_FLTREQ0I: intsrc34 { vector = <0x0dc0>; };
+ FLCTL_FLTREQ1I: intsrc35 { vector = <0x0de0>; };
+ SDHI0_SDHI0I0: intsrc36 { vector = <0x0e00>; };
+ SDHI0_SDHI0I1: intsrc37 { vector = <0x0e20>; };
+ SDHI0_SDHI0I2: intsrc38 { vector = <0x0e40>; };
+ SDHI0_SDHI0I3: intsrc39 { vector = <0x0e60>; };
+ SDHI1_SDHI1I0: intsrc40 { vector = <0x0e80>; };
+ SDHI1_SDHI1I1: intsrc41 { vector = <0x0ea0>; };
+ SDHI1_SDHI1I2: intsrc42 { vector = <0x0ec0>; };
+ IRREM: intsrc43 { vector = <0x0f60>; };
+ IRDA: intsrc44 { vector = <0x0480>; };
+ TPU0: intsrc45 { vector = <0x04a0>; };
+ TTI20: intsrc46 { vector = <0x1100>; };
+ DDM: intsrc47 { vector = <0x1140>; };
+ SDHI2_SDHI2I0: intsrc48 { vector = <0x1200>; };
+ SDHI2_SDHI2I1: intsrc49 { vector = <0x1220>; };
+ SDHI2_SDHI2I2: intsrc50 { vector = <0x1240>; };
+ SDHI2_SDHI2I3: intsrc51 { vector = <0x1260>; };
+ RWDT0: intsrc52 { vector = <0x1280>; };
+ DMAC1_1_DEI0: intsrc53 { vector = <0x2000>; };
+ DMAC1_1_DEI1: intsrc54 { vector = <0x2020>; };
+ DMAC1_1_DEI2: intsrc55 { vector = <0x2040>; };
+ DMAC1_1_DEI3: intsrc56 { vector = <0x2060>; };
+ DMAC1_2_DEI4: intsrc57 { vector = <0x2080>; };
+ DMAC1_2_DEI5: intsrc58 { vector = <0x20a0>; };
+ DMAC1_2_DADERR: intsrc59 { vector = <0x20c0>; };
+ DMAC2_1_DEI0: intsrc60 { vector = <0x2100>; };
+ DMAC2_1_DEI1: intsrc61 { vector = <0x2120>; };
+ DMAC2_1_DEI2: intsrc62 { vector = <0x2140>; };
+ DMAC2_1_DEI3: intsrc63 { vector = <0x2160>; };
+ DMAC2_2_DEI4: intsrc64 { vector = <0x2180>; };
+ DMAC2_2_DEI5: intsrc65 { vector = <0x21a0>; };
+ DMAC2_2_DADERR: intsrc66 { vector = <0x21c0>; };
+ DMAC3_1_DEI0: intsrc67 { vector = <0x2200>; };
+ DMAC3_1_DEI1: intsrc68 { vector = <0x2220>; };
+ DMAC3_1_DEI2: intsrc69 { vector = <0x2240>; };
+ DMAC3_1_DEI3: intsrc70 { vector = <0x2260>; };
+ DMAC3_2_DEI4: intsrc71 { vector = <0x2280>; };
+ DMAC3_2_DEI5: intsrc72 { vector = <0x22a0>; };
+ DMAC3_2_DADERR: intsrc73 { vector = <0x22c0>; };
+ SHWYSTAT_RT: intsrc74 { vector = <0x1300>; };
+ SHWYSTAT_HS: intsrc75 { vector = <0x1320>; };
+ SHWYSTAT_COM: intsrc76 { vector = <0x1340>; };
+ HDMI: intsrc77 { vector = <0x17e0>; };
+ SPU2_SPU0: intsrc78 { vector = <0x1800>; };
+ SPU2_SPU1: intsrc79 { vector = <0x1820>; };
+ FSI: intsrc80 { vector = <0x1840>; };
+ FMSI: intsrc81 { vector = <0x1860>; };
+ MIPI_HSI: intsrc82 { vector = <0x18e0>; };
+ IPMMU_IPMMUD: intsrc83 { vector = <0x1920>; };
+ CEC_1: intsrc84 { vector = <0x1940>; };
+ CEC_2: intsrc85 { vector = <0x1960>; };
+ AP_ARM_CTIIRQ: intsrc86 { vector = <0x1980>; };
+ AP_ARM_DMAEXTERRIRQ: intsrc87 { vector = <0x19a0>; };
+ AP_ARM_DMAIRQ: intsrc88 { vector = <0x19c0>; };
+ AP_ARM_DMASIRQ: intsrc89 { vector = <0x19e0>; };
+ MFIS2: intsrc90 { vector = <0x1a00>; };
+ CPORTR2S: intsrc91 { vector = <0x1a20>; };
+ CMT14: intsrc92 { vector = <0x1a40>; };
+ CMT15: intsrc93 { vector = <0x1a60>; };
+ MMC_MMC_ERR: intsrc94 { vector = <0x1ac0>; };
+ MMC_MMC_NOR: intsrc95 { vector = <0x1ae0>; };
+ IIC4_ALI4: intsrc96 { vector = <0x1b00>; };
+ IIC4_TACKI4: intsrc97 { vector = <0x1b20>; };
+ IIC4_WAITI4: intsrc98 { vector = <0x1b40>; };
+ IIC4_DTEI4: intsrc99 { vector = <0x1b60>; };
+ IIC3_ALI3: intsrc100 { vector = <0x1b80>; };
+ IIC3_TACKI3: intsrc101 { vector = <0x1ba0>; };
+ IIC3_WAITI3: intsrc102 { vector = <0x1bc0>; };
+ IIC3_DTEI3: intsrc103 { vector = <0x1be0>; };
+ USB0_USB0I1: intsrc104 { vector = <0x1c80>; };
+ USB0_USB0I0: intsrc105 { vector = <0x1ca0>; };
+ USB1_USB1I1: intsrc106 { vector = <0x1cc0>; };
+ USB1_USB1I0: intsrc107 { vector = <0x1ce0>; };
+ USBHSDMAC1_USHDMI: intsrc108 { vector = <0x1d00>; };
+
+ DMAC1_1: intc_group0 {
+ group = <&DMAC1_1_DEI0 &DMAC1_1_DEI1
+ &DMAC1_1_DEI2 &DMAC1_1_DEI3>;
+ };
+
+ DMAC1_2: intc_group1 {
+ group = <&DMAC1_2_DEI4 &DMAC1_2_DEI5
+ &DMAC1_2_DADERR>;
+ };
+
+ DMAC2_1: intc_group2 {
+ group = <&DMAC2_1_DEI0 &DMAC2_1_DEI1
+ &DMAC2_1_DEI2 &DMAC2_1_DEI3>;
+ };
+
+ DMAC2_2: intc_group3 {
+ group = <&DMAC2_2_DEI4 &DMAC2_2_DEI5
+ &DMAC2_2_DADERR>;
+ };
+
+ DMAC3_1: intc_group4 {
+ group = <&DMAC3_1_DEI0 &DMAC3_1_DEI1
+ &DMAC3_1_DEI2 &DMAC3_1_DEI3>;
+ };
+
+ DMAC3_2: intc_group5 {
+ group = <&DMAC3_2_DEI4 &DMAC3_2_DEI5
+ &DMAC3_2_DADERR>;
+ };
+
+ AP_ARM1: intc_group6 {
+ group = <&AP_ARM_IRQPMU &AP_ARM_COMMTX
+ &AP_ARM_COMMRX>;
+ };
+
+ AP_ARM2: intc_group7 {
+ group = <&AP_ARM_CTIIRQ &AP_ARM_DMAEXTERRIRQ
+ &AP_ARM_DMAIRQ &AP_ARM_DMASIRQ>;
+ };
+
+ SPU2: intc_group8 {
+ group = <&SPU2_SPU0 &SPU2_SPU1>;
+ };
+
+ FLCTL: intc_group9 {
+ group = <&FLCTL_FLSTEI &FLCTL_FLTENDI
+ &FLCTL_FLTREQ0I &FLCTL_FLTREQ1I>;
+ };
+
+ IIC1: intc_group10 {
+ group = <&IIC1_ALI1 &IIC1_TACKI1 &IIC1_WAITI1
+ &IIC1_DTEI1>;
+ };
+
+ SDHI0: intc_group11 {
+ group = <&SDHI0_SDHI0I0 &SDHI0_SDHI0I1
+ &SDHI0_SDHI0I2 &SDHI0_SDHI0I3>;
+ };
+
+ SDHI1: intc_group12 {
+ group = <&SDHI1_SDHI1I0 &SDHI1_SDHI1I1
+ &SDHI1_SDHI1I2>;
+ };
+
+ SDHI2: intc_group13 {
+ group = <&SDHI2_SDHI2I0 &SDHI2_SDHI2I1
+ &SDHI2_SDHI2I2 &SDHI2_SDHI2I3>;
+ };
+
+ SHWYSTAT: intc_group14 {
+ group = <&SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM>;
+ };
+
+ intc_vectors {
+ vector_table = <&DIRC &CRYPT_STD
+ &IIC1_ALI1 &IIC1_TACKI1 &IIC1_WAITI1 &IIC1_DTEI1
+ &AP_ARM_IRQPMU &AP_ARM_COMMTX &AP_ARM_COMMRX
+ &MFI_MFIM &MFI_MFIS &BBIF1 &BBIF2
+ &USBHSDMAC0_USHDMI
+ &_3DG_SGX540
+ &CMT1_CMT10 &CMT1_CMT11 &CMT1_CMT12
+ &CMT1_CMT13 &CMT2 &CMT3
+ &KEYSC_KEY
+ &SCIFA0 &SCIFA1 &SCIFA2 &SCIFA3
+ &MSIOF2 &MSIOF1
+ &SCIFA4 &SCIFA5 &SCIFB
+ &FLCTL_FLSTEI &FLCTL_FLTENDI &FLCTL_FLTREQ0I
+ &FLCTL_FLTREQ1I
+ &SDHI0_SDHI0I0 &SDHI0_SDHI0I1 &SDHI0_SDHI0I2
+ &SDHI0_SDHI0I3
+ &SDHI1_SDHI1I0 &SDHI1_SDHI1I1 &SDHI1_SDHI1I2
+ &IRREM &IRDA &TPU0 &TTI20 &DDM
+ &SDHI2_SDHI2I0 &SDHI2_SDHI2I1 &SDHI2_SDHI2I2
+ &SDHI2_SDHI2I3
+ &RWDT0
+ &DMAC1_1_DEI0 &DMAC1_1_DEI1 &DMAC1_1_DEI2
+ &DMAC1_1_DEI3
+ &DMAC1_2_DEI4 &DMAC1_2_DEI5 &DMAC1_2_DADERR
+ &DMAC2_1_DEI0 &DMAC2_1_DEI1 &DMAC2_1_DEI2
+ &DMAC2_1_DEI3
+ &DMAC2_2_DEI4 &DMAC2_2_DEI5 &DMAC2_2_DADERR
+ &DMAC3_1_DEI0 &DMAC3_1_DEI1 &DMAC3_1_DEI2
+ &DMAC3_1_DEI3
+ &DMAC3_2_DEI4 &DMAC3_2_DEI5 &DMAC3_2_DADERR
+ &SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM
+ &HDMI
+ &SPU2_SPU0 &SPU2_SPU1
+ &FSI &FMSI
+ &MIPI_HSI
+ &IPMMU_IPMMUD
+ &CEC_1 &CEC_2
+ &AP_ARM_CTIIRQ &AP_ARM_DMAEXTERRIRQ &AP_ARM_DMAIRQ
+ &AP_ARM_DMASIRQ
+ &MFIS2
+ &CPORTR2S
+ &CMT14 &CMT15
+ &MMC_MMC_ERR &MMC_MMC_NOR
+ &IIC4_ALI4 &IIC4_TACKI4 &IIC4_WAITI4 &IIC4_DTEI4
+ &IIC3_ALI3 &IIC3_TACKI3 &IIC3_WAITI3 &IIC3_DTEI3
+ &USB0_USB0I1 &USB0_USB0I0
+ &USB1_USB1I1 &USB1_USB1I0
+ &USBHSDMAC1_USHDMI>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6940080 1>, <0xe69400c0 1>;
+ reginfo = <&DMAC2_1_DEI3 &DMAC2_1_DEI2 &DMAC2_1_DEI1
+ &DMAC2_1_DEI0 &AP_ARM_IRQPMU 0 &AP_ARM_COMMTX
+ &AP_ARM_COMMRX>;
+ };
+
+ intc_mask1 {
+ reg = <0xe6940084 1>, <0xe69400c4 1>;
+ reginfo = <0 &CRYPT_STD &DIRC 0 &DMAC1_1_DEI3 &DMAC1_1_DEI2
+ &DMAC1_1_DEI1 &DMAC1_1_DEI0>;
+ };
+
+ intc_mask2 {
+ reg = <0xe6940088 1>, <0xe69400c8 1>;
+ reginfo = <0 0 0 0 &BBIF1 &BBIF2 &MFI_MFIS &MFI_MFIM>;
+ };
+
+ intc_mask3 {
+ reg = <0xe694008c 1>, <0xe69400cc 1>;
+ reginfo = <&DMAC3_1_DEI3 &DMAC3_1_DEI2 &DMAC3_1_DEI1
+ &DMAC3_1_DEI0 &DMAC3_2_DADERR &DMAC3_2_DEI5
+ &DMAC3_2_DEI4 &IRDA>;
+ };
+
+ intc_mask4 {
+ reg = <0xe6940090 1>, <0xe69400d0 1>;
+ reginfo = <&DDM 0 0 0 0 0 0 0>;
+ };
+
+ intc_mask5 {
+ reg = <0xe6940094 1>, <0xe69400d4 1>;
+ reginfo = <&KEYSC_KEY &DMAC1_2_DADERR &DMAC1_2_DEI5
+ &DMAC1_2_DEI4 &SCIFA3 &SCIFA2 &SCIFA1 &SCIFA0>;
+ };
+
+ intc_mask6 {
+ reg = <0xe6940098 1>, <0xe69400d8 1>;
+ reginfo = <&SCIFB &SCIFA5 &SCIFA4 &MSIOF1 0 0 &MSIOF2 0>;
+ };
+
+ intc_mask7 {
+ reg = <0xe694009c 1>, <0xe69400dc 1>;
+ reginfo = <&SDHI0_SDHI0I3 &SDHI0_SDHI0I2 &SDHI0_SDHI0I1
+ &SDHI0_SDHI0I0 &FLCTL_FLTREQ1I &FLCTL_FLTREQ0I
+ &FLCTL_FLTENDI &FLCTL_FLSTEI>;
+ };
+
+ intc_mask8 {
+ reg = <0xe69400a0 1>, <0xe69400e0 1>;
+ reginfo = <0 &SDHI1_SDHI1I2 &SDHI1_SDHI1I1 &SDHI1_SDHI1I0
+ &TTI20 &USBHSDMAC0_USHDMI 0 0>;
+ };
+
+ intc_mask9 {
+ reg = <0xe69400a4 1>, <0xe69400e4 1>;
+ reginfo = <&CMT1_CMT13 &CMT1_CMT12 &CMT1_CMT11 &CMT1_CMT10
+ &CMT2 0 0 &_3DG_SGX540>;
+ };
+
+ intc_mask10 {
+ reg = <0xe69400a8 1>, <0xe69400e8 1>;
+ reginfo = <0 &DMAC2_2_DADERR &DMAC2_2_DEI5 &DMAC2_2_DEI4
+ 0 0 0 0>;
+ };
+
+ intc_mask11 {
+ reg = <0xe69400ac 1>, <0xe69400ec 1>;
+ reginfo = <&IIC1_DTEI1 &IIC1_WAITI1 &IIC1_TACKI1
+ &IIC1_ALI1 0 0 &IRREM 0>;
+ };
+
+ intc_mask12 {
+ reg = <0xe69400b0 1>, <0xe69400f0 1>;
+ reginfo = <0 0 &TPU0 0 0 0 0 0>;
+ };
+
+ intc_mask13 {
+ reg = <0xe69400b4 1>, <0xe69400f4 1>;
+ reginfo = <&SDHI2_SDHI2I3 &SDHI2_SDHI2I2 &SDHI2_SDHI2I1
+ &SDHI2_SDHI2I0 0 &CMT3 0 &RWDT0>;
+ };
+
+ intc_mask14 {
+ reg = <0xe6950080 1>, <0xe69500c0 1>;
+ reginfo = <&SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM
+ 0 0 0 0 0>;
+ };
+
+ intc_mask15 {
+ reg = <0xe6950090 1>, <0xe69500d0 1>;
+ reginfo = <0 0 0 0 0 0 0 &HDMI>;
+ };
+
+ intc_mask16 {
+ reg = <0xe6950094 1>, <0xe69500d4 1>;
+ reginfo = <&SPU2_SPU0 &SPU2_SPU1 &FSI &FMSI
+ 0 0 0 &MIPI_HSI>;
+ };
+
+ intc_mask17 {
+ reg = <0xe6950098 1>, <0xe69500d8 1>;
+ reginfo = <0 &IPMMU_IPMMUD &CEC_1 &CEC_2
+ &AP_ARM_CTIIRQ &AP_ARM_DMAEXTERRIRQ
+ &AP_ARM_DMAIRQ &AP_ARM_DMASIRQ>;
+ };
+
+ intc_mask18 {
+ reg = <0xe695009c 1>, <0xe69500dc 1>;
+ reginfo = <&MFIS2 &CPORTR2S &CMT14 &CMT15
+ 0 0 &MMC_MMC_ERR &MMC_MMC_NOR>;
+ };
+
+ intc_mask19 {
+ reg = <0xe69500a0 1>, <0xe69500e0 1>;
+ reginfo = <&IIC4_ALI4 &IIC4_TACKI4 &IIC4_WAITI4
+ &IIC4_DTEI4 &IIC3_ALI3 &IIC3_TACKI3
+ &IIC3_WAITI3 &IIC3_DTEI3>;
+ };
+
+ intc_mask20 {
+ reg = <0xe69500a4 1>, <0xe69500e4 1>;
+ reginfo = <0 0 0 0 &USB0_USB0I1 &USB0_USB0I0
+ &USB1_USB1I1 &USB1_USB1I0>;
+ };
+
+ intc_mask21 {
+ reg = <0xe69500a8 1>, <0xe69500e8 1>;
+ reginfo = <&USBHSDMAC1_USHDMI 0 0 0 0 0 0 0>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6940000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC3_1 &DMAC3_2 &CMT2 0>;
+ };
+
+ intc_prio1 {
+ reg = <0xe6940004 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRDA 0 &BBIF1 &BBIF2>;
+ };
+
+ intc_prio2 {
+ reg = <0xe6940008 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &CRYPT_STD &CMT1_CMT11 &AP_ARM1>;
+ };
+
+ intc_prio3 {
+ reg = <0xe694000c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &CMT1_CMT12 0>;
+ };
+
+ intc_prio4 {
+ reg = <0xe6940010 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC1_1 &MFI_MFIS &MFI_MFIM 0>;
+ };
+
+ intc_prio5 {
+ reg = <0xe6940014 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&KEYSC_KEY &DMAC1_2 &_3DG_SGX540 &CMT1_CMT10>;
+ };
+
+ intc_prio6 {
+ reg = <0xe6940018 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SCIFA0 &SCIFA1 &SCIFA2 &SCIFA3>;
+ };
+
+ intc_prio7 {
+ reg = <0xe694001c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MSIOF2 &USBHSDMAC0_USHDMI &FLCTL &SDHI0>;
+ };
+
+ intc_prio8 {
+ reg = <0xe6940020 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MSIOF1 &SCIFA4 0 &IIC1>;
+ };
+
+ intc_prio9 {
+ reg = <0xe6940024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC2_1 &DMAC2_2 0 &TTI20>;
+ };
+
+ intc_prio10 {
+ reg = <0xe6940028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &CMT1_CMT13 &IRREM &SDHI1>;
+ };
+
+ intc_prio11 {
+ reg = <0xe694002c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TPU0 0 0 0>;
+ };
+
+ intc_prio12 {
+ reg = <0xe6940030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &CMT3 0 &RWDT0>;
+ };
+
+ intc_prio13 {
+ reg = <0xe6940034 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SCIFB &SCIFA5 0 &DDM>;
+ };
+
+ intc_prio14 {
+ reg = <0xe6940038 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &DIRC &SDHI2>;
+ };
+
+ intc_prio15 {
+ reg = <0xe6950000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SHWYSTAT 0 0 0>;
+ };
+
+ intc_prio16 {
+ reg = <0xe6950024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 0 &HDMI>;
+ };
+
+ intc_prio17 {
+ reg = <0xe6950028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SPU2 0 &FSI &FMSI>;
+ };
+
+ intc_prio18 {
+ reg = <0xe695002c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 0 &MIPI_HSI>;
+ };
+
+ intc_prio19 {
+ reg = <0xe6950030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IPMMU_IPMMUD 0 &CEC_1 &CEC_2>;
+ };
+
+ intc_prio20 {
+ reg = <0xe6950034 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&AP_ARM2 0 0 0>;
+ };
+
+ intc_prio21 {
+ reg = <0xe6950038 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MFIS2 &CPORTR2S &CMT14 &CMT15>;
+ };
+
+ intc_prio22 {
+ reg = <0xe695003c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &MMC_MMC_ERR &MMC_MMC_NOR>;
+ };
+
+ intc_prio23 {
+ reg = <0xe6950040 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IIC4_ALI4 &IIC4_TACKI4 &IIC4_WAITI4 &IIC4_DTEI4>;
+ };
+
+ intc_prio24 {
+ reg = <0xe6950044 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IIC3_ALI3 &IIC3_TACKI3 &IIC3_WAITI3 &IIC3_DTEI3>;
+ };
+
+ intc_prio25 {
+ reg = <0xe6950048 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 0 0>;
+ };
+
+ intc_prio26 {
+ reg = <0xe695004c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&USB0_USB0I1 &USB0_USB0I0 &USB1_USB1I1 &USB1_USB1I0>;
+ };
+
+ intc_prio27 {
+ reg = <0xe6950050 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&USBHSDMAC1_USHDMI 0 0 0>;
+ };
+
+ };
+ };
+
+ intcs: interrupt-controller at 1 {
+ compatible = "renesas,sh_intcs";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+ group_size = <11>;
+
+ reg = <0xffd20000 0x200>,
+ <0xffd50000 0x200>;
+
+ VEU_VEU0: intsrc1 { vector = <0x3b00>; };
+ VEU_VEU1: intsrc2 { vector = <0x3b20>; };
+ VEU_VEU2: intsrc3 { vector = <0x3b40>; };
+ VEU_VEU3: intsrc4 { vector = <0x3b60>; };
+ RTDMAC_1_DEI0: intsrc5 { vector = <0x3c00>; };
+ RTDMAC_1_DEI1: intsrc6 { vector = <0x3c20>; };
+ RTDMAC_1_DEI2: intsrc7 { vector = <0x3c40>; };
+ RTDMAC_1_DEI3: intsrc8 { vector = <0x3c60>; };
+ CEU: intsrc9 { vector = <0x3c80>; };
+ BEU_BEU0: intsrc10 { vector = <0x3ca0>; };
+ BEU_BEU1: intsrc11 { vector = <0x3cc0>; };
+ BEU_BEU2: intsrc12 { vector = <0x3ce0>; };
+ VPU: intsrc13 { vector = <0x3d80>; };
+ TSIF1: intsrc14 { vector = <0x3da0>; };
+ _2DDMAC: intsrc15 { vector = <0x3e00>; };
+ IIC2_ALI2: intsrc16 { vector = <0x3e80>; };
+ IIC2_TACKI2: intsrc17 { vector = <0x3ea0>; };
+ IIC2_WAITI2: intsrc18 { vector = <0x3ec0>; };
+ IIC2_DTEI2: intsrc19 { vector = <0x3ee0>; };
+ IPMMU_IPMMUR: intsrc20 { vector = <0x3f00>; };
+ IPMMU_IPMMUR2: intsrc21 { vector = <0x3f20>; };
+ RTDMAC_2_DEI4: intsrc22 { vector = <0x3f80>; };
+ RTDMAC_2_DEI5: intsrc23 { vector = <0x3fa0>; };
+ RTDMAC_2_DADERR: intsrc24 { vector = <0x3fc0>; };
+ MSIOF: intsrc25 { vector = <0x04120>; };
+ IIC0_ALI0: intsrc26 { vector = <0x4200>; };
+ IIC0_TACKI0: intsrc27 { vector = <0x4220>; };
+ IIC0_WAITI0: intsrc28 { vector = <0x4240>; };
+ IIC0_DTEI0: intsrc29 { vector = <0x4260>; };
+ TMU_TUNI0: intsrc30 { vector = <0x4280>; };
+ TMU_TUNI1: intsrc31 { vector = <0x42a0>; };
+ TMU_TUNI2: intsrc32 { vector = <0x42c0>; };
+ CMT0: intsrc33 { vector = <0x4300>; };
+ TSIF0: intsrc34 { vector = <0x4320>; };
+ LMB: intsrc35 { vector = <0x4360>; };
+ CTI: intsrc36 { vector = <0x3800>; };
+ ICB: intsrc37 { vector = <0x3880>; };
+ JPU_JPEG: intsrc38 { vector = <0x3960>; };
+ LCDC: intsrc39 { vector = <0x3980>; };
+ LCRC: intsrc40 { vector = <0x39a0>; };
+ RTDMAC2_1_DEI0: intsrc41 { vector = <0x4700>; };
+ RTDMAC2_1_DEI1: intsrc42 { vector = <0x4720>; };
+ RTDMAC2_1_DEI2: intsrc43 { vector = <0x4740>; };
+ RTDMAC2_1_DEI3: intsrc44 { vector = <0x4760>; };
+ RTDMAC2_2_DEI4: intsrc45 { vector = <0x4780>; };
+ RTDMAC2_2_DEI5: intsrc46 { vector = <0x47a0>; };
+ RTDMAC2_2_DADERR: intsrc47 { vector = <0x47c0>; };
+ ISP: intsrc48 { vector = <0x4b20>; };
+ LCDC1: intsrc49 { vector = <0x4b80>; };
+ CSIRX: intsrc50 { vector = <0x4ba0>; };
+ DSITX_DSITX0: intsrc51 { vector = <0x4bc0>; };
+ DSITX_DSITX1: intsrc52 { vector = <0x4be0>; };
+ TMU1_TUNI0: intsrc53 { vector = <0x4d00>; };
+ TMU1_TUNI1: intsrc54 { vector = <0x4d20>; };
+ TMU1_TUNI2: intsrc55 { vector = <0x4d40>; };
+ CMT4: intsrc56 { vector = <0x4d80>; };
+ DSITX1_DSITX1_0: intsrc57 { vector = <0x4da0>; };
+ DSITX1_DSITX1_1: intsrc58 { vector = <0x4dc0>; };
+ MFIS2_INTCS: intsrc59 { vector = <0x4e00>; };
+ CPORTS2R: intsrc60 { vector = <0x4e20>; };
+ JPU6E: intsrc61 { vector = <0x4e80>; };
+ ENABLED_INTCS: intsrc62 { vector = <0x0>; };
+ INTCS: intsrc63 { vector = <0xf80>; };
+
+ RTDMAC_1: intc_group0 {
+ group = <&RTDMAC_1_DEI0 &RTDMAC_1_DEI1
+ &RTDMAC_1_DEI2 &RTDMAC_1_DEI3>;
+ };
+
+ RTDMAC_2: intc_group1 {
+ group = <&RTDMAC_2_DEI4 &RTDMAC_2_DEI5
+ &RTDMAC_2_DADERR>;
+ };
+
+ VEU: intc_group2 {
+ group = <&VEU_VEU0 &VEU_VEU1 &VEU_VEU2
+ &VEU_VEU3>;
+ };
+
+ BEU: intc_group3 {
+ group = <&BEU_BEU0 &BEU_BEU1 &BEU_BEU2>;
+ };
+
+ IIC0: intc_group4 {
+ group = <&IIC0_ALI0 &IIC0_TACKI0 &IIC0_WAITI0
+ &IIC0_DTEI0>;
+ };
+
+ IPMMU: intc_group5 {
+ group = <&IPMMU_IPMMUR &IPMMU_IPMMUR2>;
+ };
+
+ IIC2: intc_group6 {
+ group = <&IIC2_ALI2 &IIC2_TACKI2 &IIC2_WAITI2
+ &IIC2_DTEI2>;
+ };
+
+ RTDMAC2_1: intc_group7 {
+ group = <&RTDMAC2_1_DEI0 &RTDMAC2_1_DEI1
+ &RTDMAC2_1_DEI2 &RTDMAC2_1_DEI3>;
+ };
+
+ RTDMAC2_2: intc_group8 {
+ group = <&RTDMAC2_2_DEI4 &RTDMAC2_2_DEI5
+ &RTDMAC2_2_DADERR>;
+ };
+
+ TMU1: intc_group9 {
+ group = <&TMU1_TUNI2 &TMU1_TUNI1 &TMU1_TUNI0>;
+ };
+
+ DSITX: intc_group10 {
+ group = <&DSITX_DSITX0 &DSITX_DSITX1>;
+ };
+
+ intc_vectors {
+ vector_table = <&VEU_VEU0 &VEU_VEU1 &VEU_VEU2 &VEU_VEU3
+ &RTDMAC_1_DEI0 &RTDMAC_1_DEI1 &RTDMAC_1_DEI2
+ &RTDMAC_1_DEI3 &CEU &BEU_BEU0 &BEU_BEU1 &BEU_BEU2
+ &VPU &TSIF1 &_2DDMAC &IIC2_ALI2 &IIC2_TACKI2
+ &IIC2_WAITI2 &IIC2_DTEI2 &IPMMU_IPMMUR
+ &IPMMU_IPMMUR2 &RTDMAC_2_DEI4 &RTDMAC_2_DEI5
+ &RTDMAC_2_DADERR &MSIOF &IIC0_ALI0 &IIC0_TACKI0
+ &IIC0_WAITI0 &IIC0_DTEI0 &TMU_TUNI0 &TMU_TUNI1
+ &TMU_TUNI2 &CMT0 &TSIF0 &LMB &CTI &ICB &JPU_JPEG
+ &LCDC &LCRC &RTDMAC2_1_DEI0 &RTDMAC2_1_DEI1
+ &RTDMAC2_1_DEI2 &RTDMAC2_1_DEI3 &RTDMAC2_2_DEI4
+ &RTDMAC2_2_DEI5 &RTDMAC2_2_DADERR &ISP &LCDC1
+ &CSIRX &DSITX_DSITX0 &DSITX_DSITX1 &TMU1_TUNI0
+ &TMU1_TUNI1 &TMU1_TUNI2 &CMT4 &DSITX1_DSITX1_0
+ &DSITX1_DSITX1_1 &MFIS2_INTCS &CPORTS2R &JPU6E>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xffd20184 1>, <0xffd201c4 1>;
+ reginfo = <&BEU_BEU2 &BEU_BEU1 &BEU_BEU0
+ &CEU &VEU_VEU3 &VEU_VEU2 &VEU_VEU1
+ &VEU_VEU0>;
+ };
+
+ intc_mask1 {
+ reg = <0xffd20188 1>, <0xffd201c8 1>;
+ reginfo = <0 0 0 &VPU 0 0 0 0>;
+ };
+
+ intc_mask2 {
+ reg = <0xffd2018c 1>, <0xffd201cc 1>;
+ reginfo = <0 0 0 &_2DDMAC 0 0 0 &ICB>;
+ };
+
+ intc_mask3 {
+ reg = <0xffd20190 1>, <0xffd201d0 1>;
+ reginfo = <0 0 0 &CTI &JPU_JPEG 0 &LCRC &LCDC>;
+ };
+
+ intc_mask4 {
+ reg = <0xffd20194 1>, <0xffd201d4 1>;
+ reginfo = <0 &RTDMAC_2_DADERR &RTDMAC_2_DEI5
+ &RTDMAC_2_DEI4 &RTDMAC_1_DEI3
+ &RTDMAC_1_DEI2 &RTDMAC_1_DEI1
+ &RTDMAC_1_DEI0>;
+ };
+
+ intc_mask5 {
+ reg = <0xffd20198 1>, <0xffd201d8 1>;
+ reginfo = <0 0 &MSIOF 0 0 0 0 0>;
+ };
+
+ intc_mask6 {
+ reg = <0xffd2019c 1>, <0xffd201dc 1>;
+ reginfo = <0 &TMU_TUNI2 &TMU_TUNI1 &TMU_TUNI0
+ 0 0 0 0>;
+ };
+
+ intc_mask7 {
+ reg = <0xffd201a4 1>, <0xffd201e4 1>;
+ reginfo = <0 0 0 &CMT0 &IIC2_DTEI2 &IIC2_WAITI2
+ &IIC2_TACKI2 &IIC2_ALI2>;
+ };
+
+ intc_mask8 {
+ reg = <0xffd201a8 1>, <0xffd201e8 1>;
+ reginfo = <0 0 &IPMMU_IPMMUR2 &IPMMU_IPMMUR
+ 0 0 0 0>;
+ };
+
+ intc_mask9 {
+ reg = <0xffd201ac 1>, <0xffd201ec 1>;
+ reginfo = <&IIC0_DTEI0 &IIC0_WAITI0 &IIC0_TACKI0
+ &IIC0_ALI0 0 &TSIF1 &LMB &TSIF0>;
+ };
+
+ intc_mask10 {
+ reg = <0xffd50180 1>, <0xffd501c0 1>;
+ reginfo = <0 &RTDMAC2_2_DADERR &RTDMAC2_2_DEI5
+ &RTDMAC2_2_DEI4 &RTDMAC2_1_DEI3
+ &RTDMAC2_1_DEI2 &RTDMAC2_1_DEI1
+ &RTDMAC2_1_DEI0>;
+ };
+
+ intc_mask11 {
+ reg = <0xffd50190 1>, <0xffd501d0 1>;
+ reginfo = <0 &ISP 0 0 &LCDC1 &CSIRX &DSITX_DSITX0
+ &DSITX_DSITX1>;
+ };
+
+ intc_mask12 {
+ reg = <0xffd50198 1>, <0xffd501d8 1>;
+ reginfo = <0 &TMU1_TUNI2 &TMU1_TUNI1 &TMU1_TUNI0
+ &CMT4 &DSITX1_DSITX1_0 &DSITX1_DSITX1_1 0>;
+ };
+
+ intc_mask13 {
+ reg = <0xffd5019c 1>, <0xffd501dc 1>;
+ reginfo = <&MFIS2_INTCS &CPORTS2R 0 0 &JPU6E 0 0 0>;
+ };
+ };
+
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xffd20000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&CTI 0 &_2DDMAC &ICB>;
+ };
+
+ intc_prio1 {
+ reg = <0xffd20004 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&JPU_JPEG &LCDC 0 &LCRC>;
+ };
+
+ intc_prio2 {
+ reg = <0xffd20010 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&RTDMAC_1 &CEU 0 &VPU>;
+ };
+
+ intc_prio3 {
+ reg = <0xffd20014 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &RTDMAC_2 0 &CMT0>;
+ };
+
+ intc_prio4 {
+ reg = <0xffd20018 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TMU_TUNI0 &TMU_TUNI1 &TMU_TUNI2 &TSIF1>;
+ };
+
+ intc_prio5 {
+ reg = <0xffd2001c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &VEU &BEU>;
+ };
+
+ intc_prio6 {
+ reg = <0xffd20020 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &MSIOF &TSIF0 &IIC0>;
+ };
+
+ intc_prio7 {
+ reg = <0xffd20028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &LMB 0>;
+ };
+
+ intc_prio8 {
+ reg = <0xffd2002c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IPMMU 0 0 0>;
+ };
+
+ intc_prio9 {
+ reg = <0xffd20030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IIC2 0 0 0>;
+ };
+
+ intc_prio10 {
+ reg = <0xffd50000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&RTDMAC2_1 0 0 0>;
+ };
+
+ intc_prio11 {
+ reg = <0xffd50004 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&RTDMAC2_2 0 0 0>;
+ };
+
+ intc_prio12 {
+ reg = <0xffd50020 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &ISP 0 0>;
+ };
+
+ intc_prio13 {
+ reg = <0xffd50024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&LCDC1 &CSIRX &DSITX 0>;
+ };
+
+ intc_prio14 {
+ reg = <0xffd50030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TMU1 0 0 0>;
+ };
+
+ intc_prio15 {
+ reg = <0xffd50034 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&CMT4 &DSITX1_DSITX1_0 &DSITX1_DSITX1_1 0>;
+ };
+
+ intc_prio16 {
+ reg = <0xffd50038 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&ENABLED_INTCS &CPORTS2R 0 0>;
+ };
+
+ intc_prio17 {
+ reg = <0xffd5003c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&JPU6E 0 0 0>;
+ };
+ };
+
+ intc_intevtsa {
+ vector = <&INTCS>;
+ };
+
+ };
+
+ intca_irq_pins_lo: interrupt-controller at 2 {
+ compatible = "renesas,sh_intca_irq_pins_lo";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ reg = <0xe6900000 0x70>;
+
+ IRQ0: intsrc1 { vector = <0x200>; };
+ IRQ1: intsrc2 { vector = <0x220>; };
+ IRQ2: intsrc3 { vector = <0x240>; };
+ IRQ3: intsrc4 { vector = <0x260>; };
+ IRQ4: intsrc5 { vector = <0x280>; };
+ IRQ5: intsrc6 { vector = <0x2a0>; };
+ IRQ6: intsrc7 { vector = <0x2c0>; };
+ IRQ7: intsrc8 { vector = <0x2e0>; };
+ IRQ8: intsrc9 { vector = <0x300>; };
+ IRQ9: intsrc10 { vector = <0x320>; };
+ IRQ10: intsrc11 { vector = <0x340>; };
+ IRQ11: intsrc12 { vector = <0x360>; };
+ IRQ12: intsrc13 { vector = <0x380>; };
+ IRQ13: intsrc14 { vector = <0x3a0>; };
+ IRQ14: intsrc15 { vector = <0x3c0>; };
+ IRQ15: intsrc16 { vector = <0x3e0>; };
+
+ intc_vectors {
+ vector_table = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5
+ &IRQ6 &IRQ7 &IRQ8 &IRQ9 &IRQ10
+ &IRQ11 &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6900040 1>, <0xe6900060 1>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4
+ &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_mask1 {
+ reg = <0xe6900044 1>, <0xe6900064 1>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6900010 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4
+ &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_prio1 {
+ reg = <0xe6900014 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+ };
+
+ intc_sense_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_sense0 {
+ reg = <0xe6900000 4>;
+ field-width = <4>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4
+ &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_sense1 {
+ reg = <0xe6900004 4>;
+ field-width = <4>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+ };
+
+ intc_ack_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_ack0 {
+ reg = <0xe6900020 1>, <0x0 0>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4
+ &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_ack1 {
+ reg = <0xe6900024 1>, <0x0 0>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+ };
+ };
+
+ intca_irq_pins_hi: interrupt-controller at 3 {
+ compatible = "renesas,sh_intca_irq_pins_hi";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ reg = <0xe6900008 0x70>;
+
+ IRQ16: intsrc1 { vector = <0x3200>; };
+ IRQ17: intsrc2 { vector = <0x3220>; };
+ IRQ18: intsrc3 { vector = <0x3240>; };
+ IRQ19: intsrc4 { vector = <0x3260>; };
+ IRQ20: intsrc5 { vector = <0x3280>; };
+ IRQ21: intsrc6 { vector = <0x32a0>; };
+ IRQ22: intsrc7 { vector = <0x32c0>; };
+ IRQ23: intsrc8 { vector = <0x32e0>; };
+ IRQ24: intsrc9 { vector = <0x3300>; };
+ IRQ25: intsrc10 { vector = <0x3320>; };
+ IRQ26: intsrc11 { vector = <0x3340>; };
+ IRQ27: intsrc12 { vector = <0x3360>; };
+ IRQ28: intsrc13 { vector = <0x3380>; };
+ IRQ29: intsrc14 { vector = <0x33a0>; };
+ IRQ30: intsrc15 { vector = <0x33c0>; };
+ IRQ31: intsrc16 { vector = <0x33e0>; };
+
+ intc_vectors {
+ vector_table = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20 &IRQ21
+ &IRQ22 &IRQ23 &IRQ24 &IRQ25 &IRQ26
+ &IRQ27 &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6900048 1>, <0xe6900068 1>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20
+ &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_mask1 {
+ reg = <0xe690004c 1>, <0xe690006c 1>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6900018 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20
+ &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_prio1 {
+ reg = <0xe690001c 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_sense_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_sense0 {
+ reg = <0xe6900008 4>;
+ field-width = <4>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20
+ &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_sense1 {
+ reg = <0xe690000c 4>;
+ field-width = <4>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_ack_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_ack0 {
+ reg = <0xe6900028 1>, <0x0 0>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20
+ &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_ack1 {
+ reg = <0xe690002c 1>, <0x0 0>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+ };
+ };
};
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 08/15] ARM: shmobile: Add DT table of INTC for r8a7740
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (6 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 07/15] ARM: shmobile: Add DT table of INTC for sh7372 Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 09/15] ARM: shmobile: Include DTSI of r8a7740 to armadillo800eva Simon Horman
` (6 subsequent siblings)
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
[horms at verge.net.au: Removed trailing whitespace]
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/boot/dts/r8a7740.dtsi | 965 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 964 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 798fa35..deb66f7 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -1,5 +1,5 @@
/*
- * Device Tree Source for the r8a7740 SoC
+ * Device Tree Source for Renesas r8a7740
*
* Copyright (C) 2012 Renesas Solutions Corp.
*
@@ -18,4 +18,967 @@
compatible = "arm,cortex-a9";
};
};
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intca: interrupt-controller at 0 {
+ compatible = "renesas,sh_intca";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <1>;
+ ranges;
+
+ reg = <0xe6940000 0x200>, <0xe6950000 0x200>;
+ group_size = <19>;
+
+ DIRC: intsrc1 { vector = <0x0560>; };
+ ATAPI: intsrc2 { vector = <0x05E0>; };
+ IIC1_ALI: intsrc3 { vector = <0x0780>; };
+ IIC1_TACKI: intsrc4 { vector = <0x07A0>; };
+ IIC1_WAITI: intsrc5 { vector = <0x07C0>; };
+ IIC1_DTEI: intsrc6 { vector = <0x07E0>; };
+ AP_ARM_COMMTX: intsrc7 { vector = <0x0840>; };
+ AP_ARM_COMMRX: intsrc8 { vector = <0x0860>; };
+ MFI: intsrc9 { vector = <0x0900>; };
+ MFIS: intsrc10 { vector = <0x0920>; };
+ BBIF1: intsrc11 { vector = <0x0940>; };
+ BBIF2: intsrc12 { vector = <0x0960>; };
+ USBHSDMAC: intsrc13 { vector = <0x0A00>; };
+ USBF_OUL_SOF: intsrc14 { vector = <0x0A20>; };
+ USBF_IXL_INT: intsrc15 { vector = <0x0A40>; };
+ SGX540: intsrc16 { vector = <0x0A60>; };
+ CMT1_0: intsrc17 { vector = <0x0B00>; };
+ CMT1_1: intsrc18 { vector = <0x0B20>; };
+ CMT1_2: intsrc19 { vector = <0x0B40>; };
+ CMT1_3: intsrc20 { vector = <0x0B60>; };
+ CMT2: intsrc21 { vector = <0x0B80>; };
+ CMT3: intsrc22 { vector = <0x0BA0>; };
+ KEYSC: intsrc23 { vector = <0x0BE0>; };
+ SCIFA0: intsrc24 { vector = <0x0C00>; };
+ SCIFA1: intsrc25 { vector = <0x0C20>; };
+ SCIFA2: intsrc26 { vector = <0x0C40>; };
+ SCIFA3: intsrc27 { vector = <0x0C60>; };
+ MSIOF2: intsrc28 { vector = <0x0C80>; };
+ MSIOF1: intsrc29 { vector = <0x0D00>; };
+ SCIFA4: intsrc30 { vector = <0x0D20>; };
+ SCIFA5: intsrc31 { vector = <0x0D40>; };
+ SCIFB: intsrc32 { vector = <0x0D60>; };
+ FLCTL_FLSTEI: intsrc33 { vector = <0x0D80>; };
+ FLCTL_FLTENDI: intsrc34 { vector = <0x0DA0>; };
+ FLCTL_FLTREQ0I: intsrc35 { vector = <0x0DC0>; };
+ FLCTL_FLTREQ1I: intsrc36 { vector = <0x0DE0>; };
+ SDHI0_0: intsrc37 { vector = <0x0E00>; };
+ SDHI0_1: intsrc38 { vector = <0x0E20>; };
+ SDHI0_2: intsrc39 { vector = <0x0E40>; };
+ SDHI0_3: intsrc40 { vector = <0x0E60>; };
+ SDHI1_0: intsrc41 { vector = <0x0E80>; };
+ SDHI1_1: intsrc42 { vector = <0x0EA0>; };
+ SDHI1_2: intsrc43 { vector = <0x0EC0>; };
+ SDHI1_3: intsrc44 { vector = <0x0EE0>; };
+ AP_ARM_L2CINT: intsrc45 { vector = <0x0FA0>; };
+ IRDA: intsrc46 { vector = <0x0480>; };
+ TPU0: intsrc47 { vector = <0x04A0>; };
+ SCIFA6: intsrc48 { vector = <0x04C0>; };
+ SCIFA7: intsrc49 { vector = <0x04E0>; };
+ GETHER: intsrc50 { vector = <0x0500>; };
+ ICBS0: intsrc51 { vector = <0x0540>; };
+ DDM: intsrc52 { vector = <0x1140>; };
+ SDHI2_0: intsrc53 { vector = <0x1200>; };
+ SDHI2_1: intsrc54 { vector = <0x1220>; };
+ SDHI2_2: intsrc55 { vector = <0x1240>; };
+ SDHI2_3: intsrc56 { vector = <0x1260>; };
+ RWDT0: intsrc57 { vector = <0x1280>; };
+ DMAC1_1_DEI0: intsrc58 { vector = <0x2000>; };
+ DMAC1_1_DEI1: intsrc59 { vector = <0x2020>; };
+ DMAC1_1_DEI2: intsrc60 { vector = <0x2040>; };
+ DMAC1_1_DEI3: intsrc61 { vector = <0x2060>; };
+ DMAC1_2_DEI4: intsrc62 { vector = <0x2080>; };
+ DMAC1_2_DEI5: intsrc63 { vector = <0x20A0>; };
+ DMAC1_2_DADERR: intsrc64 { vector = <0x20C0>; };
+ DMAC2_1_DEI0: intsrc65 { vector = <0x2100>; };
+ DMAC2_1_DEI1: intsrc66 { vector = <0x2120>; };
+ DMAC2_1_DEI2: intsrc67 { vector = <0x2140>; };
+ DMAC2_1_DEI3: intsrc68 { vector = <0x2160>; };
+ DMAC2_2_DEI4: intsrc69 { vector = <0x2180>; };
+ DMAC2_2_DEI5: intsrc70 { vector = <0x21A0>; };
+ DMAC2_2_DADERR: intsrc71 { vector = <0x21C0>; };
+ DMAC3_1_DEI0: intsrc72 { vector = <0x2200>; };
+ DMAC3_1_DEI1: intsrc73 { vector = <0x2220>; };
+ DMAC3_1_DEI2: intsrc74 { vector = <0x2240>; };
+ DMAC3_1_DEI3: intsrc75 { vector = <0x2260>; };
+ DMAC3_2_DEI4: intsrc76 { vector = <0x2280>; };
+ DMAC3_2_DEI5: intsrc77 { vector = <0x22A0>; };
+ DMAC3_2_DADERR: intsrc78 { vector = <0x22C0>; };
+ SHWYSTAT_RT: intsrc79 { vector = <0x1300>; };
+ SHWYSTAT_HS: intsrc80 { vector = <0x1320>; };
+ SHWYSTAT_COM: intsrc81 { vector = <0x1340>; };
+ HDMI: intsrc82 { vector = <0x1700>; };
+ USBH_INT: intsrc83 { vector = <0x1540>; };
+ USBH_OHCI: intsrc84 { vector = <0x1560>; };
+ USBH_EHCI: intsrc85 { vector = <0x1580>; };
+ USBH_PME: intsrc86 { vector = <0x15A0>; };
+ USBH_BIND: intsrc87 { vector = <0x15C0>; };
+ RSPI_OVRF: intsrc88 { vector = <0x1780>; };
+ RSPI_SPTEF: intsrc89 { vector = <0x17A0>; };
+ RSPI_SPRF: intsrc90 { vector = <0x17C0>; };
+ SPU2_0: intsrc91 { vector = <0x1800>; };
+ SPU2_1: intsrc92 { vector = <0x1820>; };
+ FSI: intsrc93 { vector = <0x1840>; };
+ FMSI: intsrc94 { vector = <0x1860>; };
+ HDMI_SSS: intsrc95 { vector = <0x18A0>; };
+ HDMI_KEY: intsrc96 { vector = <0x18C0>; };
+ IPMMU: intsrc97 { vector = <0x1920>; };
+ AP_ARM_CTIIRQ: intsrc98 { vector = <0x1980>; };
+ AP_ARM_PMURQ: intsrc99 { vector = <0x19A0>; };
+ MFIS2: intsrc100 { vector = <0x1A00>; };
+ CPORTR2S: intsrc101 { vector = <0x1A20>; };
+ CMT14: intsrc102 { vector = <0x1A40>; };
+ CMT15: intsrc103 { vector = <0x1A60>; };
+ MMCIF_0: intsrc104 { vector = <0x1AA0>; };
+ MMCIF_1: intsrc105 { vector = <0x1AC0>; };
+ MMCIF_2: intsrc106 { vector = <0x1AE0>; };
+ SIM_ERI: intsrc107 { vector = <0x1C00>; };
+ SIM_RXI: intsrc108 { vector = <0x1C20>; };
+ SIM_TXI: intsrc109 { vector = <0x1C40>; };
+ SIM_TEI: intsrc110 { vector = <0x1C60>; };
+ STPRO_0: intsrc111 { vector = <0x1C80>; };
+ STPRO_1: intsrc112 { vector = <0x1CA0>; };
+ STPRO_2: intsrc113 { vector = <0x1CC0>; };
+ STPRO_3: intsrc114 { vector = <0x1CE0>; };
+ STPRO_4: intsrc115 { vector = <0x1D00>; };
+
+ DMAC1_1: intc_group0 {
+ group = <&DMAC1_1_DEI0 &DMAC1_1_DEI1
+ &DMAC1_1_DEI2 &DMAC1_1_DEI3>;
+ };
+
+ DMAC1_2: intc_group1 {
+ group = <&DMAC1_2_DEI4 &DMAC1_2_DEI5
+ &DMAC1_2_DADERR>;
+ };
+
+ DMAC2_1: intc_group2 {
+ group = <&DMAC2_1_DEI0 &DMAC2_1_DEI1
+ &DMAC2_1_DEI2 &DMAC2_1_DEI3>;
+ };
+
+ DMAC2_2: intc_group3 {
+ group = <&DMAC2_2_DEI4 &DMAC2_2_DEI5
+ &DMAC2_2_DADERR>;
+ };
+
+ DMAC3_1: intc_group4 {
+ group = <&DMAC3_1_DEI0 &DMAC3_1_DEI1
+ &DMAC3_1_DEI2 &DMAC3_1_DEI3>;
+ };
+
+ DMAC3_2: intc_group5 {
+ group = <&DMAC3_2_DEI4 &DMAC3_2_DEI5
+ &DMAC3_2_DADERR>;
+ };
+
+ AP_ARM1: intc_group6 {
+ group = <&AP_ARM_COMMTX &AP_ARM_COMMRX>;
+ };
+
+ AP_ARM2: intc_group7 {
+ group = <&AP_ARM_CTIIRQ &AP_ARM_PMURQ>;
+ };
+
+ USBF: intc_group8 {
+ group = <&USBF_OUL_SOF &USBF_IXL_INT>;
+ };
+
+ SDHI0: intc_group9 {
+ group = <&SDHI0_0 &SDHI0_1 &SDHI0_2 &SDHI0_3>;
+ };
+
+ SDHI1: intc_group10 {
+ group = <&SDHI1_0 &SDHI1_1 &SDHI1_2 &SDHI1_3>;
+ };
+
+ SDHI2: intc_group11 {
+ group = <&SDHI2_0 &SDHI2_1 &SDHI2_2 &SDHI2_3>;
+ };
+
+ SHWYSTAT: intc_group12 {
+ group = <&SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM>;
+ };
+
+ USBH1: intc_group13 {
+ group = <&USBH_INT &USBH_OHCI>;
+ };
+
+ USBH2: intc_group14 {
+ group = <&USBH_EHCI &USBH_PME &USBH_BIND>;
+ };
+
+ RSPI: intc_group15 {
+ group = <&RSPI_OVRF &RSPI_SPTEF &RSPI_SPRF>;
+ };
+
+ SPU2: intc_group16 {
+ group = <&SPU2_0 &SPU2_1>;
+ };
+
+ FLCTL: intc_group17 {
+ group = <&FLCTL_FLSTEI &FLCTL_FLTENDI &FLCTL_FLTREQ0I
+ &FLCTL_FLTREQ1I>;
+ };
+
+ IIC1: intc_group18 {
+ group = <&IIC1_ALI &IIC1_TACKI &IIC1_WAITI &IIC1_DTEI>;
+ };
+
+ intc_vectors {
+ vector_table = <&DIRC &ATAPI &IIC1_ALI &IIC1_TACKI &IIC1_WAITI
+ &IIC1_DTEI &AP_ARM_COMMTX &AP_ARM_COMMRX &MFI &MFIS &BBIF1
+ &BBIF2 &USBHSDMAC &USBF_OUL_SOF &USBF_IXL_INT &SGX540 &CMT1_0
+ &CMT1_1 &CMT1_2 &CMT1_3 &CMT2 &CMT3 &KEYSC &SCIFA0 &SCIFA1
+ &SCIFA2 &SCIFA3 &MSIOF2 &MSIOF1 &SCIFA4 &SCIFA5 &SCIFB
+ &FLCTL_FLSTEI &FLCTL_FLTENDI &FLCTL_FLTREQ0I &FLCTL_FLTREQ1I
+ &SDHI0_0 &SDHI0_1 &SDHI0_2 &SDHI0_3
+ &SDHI1_0 &SDHI1_1 &SDHI1_2 &SDHI1_3
+ &AP_ARM_L2CINT &IRDA &TPU0 &SCIFA6 &SCIFA7
+ &GETHER &ICBS0 &DDM &SDHI2_0 &SDHI2_1 &SDHI2_2 &SDHI2_3
+ &RWDT0
+ &DMAC1_1_DEI0 &DMAC1_1_DEI1 &DMAC1_1_DEI2 &DMAC1_1_DEI3
+ &DMAC1_2_DEI4 &DMAC1_2_DEI5 &DMAC1_2_DADERR
+ &DMAC2_1_DEI0 &DMAC2_1_DEI1 &DMAC2_1_DEI2 &DMAC2_1_DEI3
+ &DMAC2_2_DEI4 &DMAC2_2_DEI5 &DMAC2_2_DADERR
+ &DMAC3_1_DEI0 &DMAC3_1_DEI1 &DMAC3_1_DEI2 &DMAC3_1_DEI3
+ &DMAC3_2_DEI4 &DMAC3_2_DEI5 &DMAC3_2_DADERR
+ &SHWYSTAT_RT &SHWYSTAT_HS &SHWYSTAT_COM
+ &USBH_INT &USBH_OHCI &USBH_EHCI &USBH_PME &USBH_BIND
+ &HDMI
+ &RSPI_OVRF &RSPI_SPTEF &RSPI_SPRF
+ &SPU2_0 &SPU2_1 &FSI &FMSI &HDMI_SSS &HDMI_KEY
+ &IPMMU &AP_ARM_CTIIRQ &AP_ARM_PMURQ &MFIS2
+ &CPORTR2S
+ &CMT14 &CMT15 &MMCIF_0 &MMCIF_1 &MMCIF_2
+ &SIM_ERI &SIM_RXI &SIM_TXI &SIM_TEI
+ &STPRO_0 &STPRO_1 &STPRO_2 &STPRO_3 &STPRO_4>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6940080 1>, <0xe69400c0 1>;
+ reginfo = <&DMAC2_1_DEI3 &DMAC2_1_DEI2 &DMAC2_1_DEI1
+ &DMAC2_1_DEI0 0 0 &AP_ARM_COMMTX &AP_ARM_COMMRX>;
+ };
+
+ intc_mask1 {
+ reg = <0xe6940084 1>, <0xe69400c4 1>;
+ reginfo = <&ATAPI 0 &DIRC 0 &DMAC1_1_DEI3 &DMAC1_1_DEI2
+ &DMAC1_1_DEI1 &DMAC1_1_DEI0>;
+ };
+
+ intc_mask2 {
+ reg = <0xe6940088 1>, <0xe69400c8 1>;
+ reginfo = <0 0 0 0 &BBIF1 &BBIF2 &MFIS &MFI>;
+ };
+
+ intc_mask3 {
+ reg = <0xe694008c 1>, <0xe69400cc 1>;
+ reginfo = <&DMAC3_1_DEI3 &DMAC3_1_DEI2 &DMAC3_1_DEI1
+ &DMAC3_1_DEI0 &DMAC3_2_DADERR &DMAC3_2_DEI5
+ &DMAC3_2_DEI4 &IRDA>;
+ };
+
+ intc_mask4 {
+ reg = <0xe6940090 1>, <0xe69400d0 1>;
+ reginfo = <&DDM 0 0 0 0 0 0 0>;
+ };
+
+ intc_mask5 {
+ reg = <0xe6940094 1>, <0xe69400d4 1>;
+ reginfo = <&KEYSC &DMAC1_2_DADERR &DMAC1_2_DEI5 &DMAC1_2_DEI4
+ &SCIFA3 &SCIFA2 &SCIFA1 &SCIFA0>;
+ };
+
+ intc_mask6 {
+ reg = <0xe6940098 1>, <0xe69400d8 1>;
+ reginfo = <&SCIFB &SCIFA5 &SCIFA4 &MSIOF1 0 0 &MSIOF2 0>;
+ };
+
+ intc_mask7 {
+ reg = <0xe694009c 1>, <0xe69400dc 1>;
+ reginfo = <&SDHI0_3 &SDHI0_2 &SDHI0_1 &SDHI0_0 &FLCTL_FLTREQ1I
+ &FLCTL_FLTREQ0I &FLCTL_FLTENDI &FLCTL_FLSTEI>;
+ };
+
+ intc_mask8 {
+ reg = <0xe69400a0 1>, <0xe69400e0 1>;
+ reginfo = <&SDHI1_3 &SDHI1_2 &SDHI1_1 &SDHI1_0 0
+ &USBHSDMAC 0 &AP_ARM_L2CINT>;
+ };
+
+ intc_mask9 {
+ reg = <0xe69400a4 1>, <0xe69400e4 1>;
+ reginfo = <&CMT1_3 &CMT1_2 &CMT1_1
+ &CMT1_0 &CMT2 &USBF_IXL_INT &USBF_OUL_SOF &SGX540>;
+ };
+
+ intc_mask10 {
+ reg = <0xe69400a8 1>, <0xe69400e8 1>;
+ reginfo = <0 &DMAC2_2_DADERR &DMAC2_2_DEI5 &DMAC2_2_DEI4
+ 0 0 0 0>;
+ };
+
+ intc_mask11 {
+ reg = <0xe69400ac 1>, <0xe69400ec 1>;
+ reginfo = <&IIC1_DTEI &IIC1_WAITI
+ &IIC1_TACKI &IIC1_ALI &ICBS0 0 0 0>;
+ };
+
+ intc_mask12 {
+ reg = <0xe69400b0 1>, <0xe69400f0 1>;
+ reginfo = <0 0 &TPU0 &SCIFA6 &SCIFA7 &GETHER 0 0>;
+ };
+
+ intc_mask13 {
+ reg = <0xe69400b4 1>, <0xe69400f4 1>;
+ reginfo = <&SDHI2_3 &SDHI2_2 &SDHI2_1
+ &SDHI2_0 0 &CMT3 0 &RWDT0>;
+ };
+
+ intc_mask14 {
+ reg = <0xe6950080 1>, <0xe69500c0 1>;
+ reginfo = <&SHWYSTAT_RT &SHWYSTAT_HS
+ &SHWYSTAT_COM 0 0 0 0 0>;
+ };
+
+ intc_mask15 {
+ reg = <0xe6950088 1>, <0xe69500c8 1>;
+ reginfo = <0 0 &USBH_INT &USBH_OHCI
+ &USBH_EHCI &USBH_PME &USBH_BIND 0>;
+ };
+
+ intc_mask16 {
+ reg = <0xe6950090 1>, <0xe69500d0 1>;
+ reginfo = <&HDMI 0 0 0 &RSPI_OVRF
+ &RSPI_SPTEF &RSPI_SPRF 0>;
+ };
+
+ intc_mask17 {
+ reg = <0xe6950094 1>, <0xe69500d4 1>;
+ reginfo = <&SPU2_0 &SPU2_1 &FSI &FMSI 0
+ &HDMI_SSS &HDMI_KEY 0>;
+ };
+
+ intc_mask18 {
+ reg = <0xe6950098 1>, <0xe69500d8 1>;
+ reginfo = <0 &IPMMU 0 0 &AP_ARM_CTIIRQ
+ &AP_ARM_PMURQ 0 0>;
+ };
+
+ intc_mask19 {
+ reg = <0xe695009c 1>, <0xe69500dc 1>;
+ reginfo = <&MFIS2 &CPORTR2S &CMT14 &CMT15
+ 0 &MMCIF_0 &MMCIF_1 &MMCIF_2>;
+ };
+
+ intc_mask20 {
+ reg = <0xe69500a4 1>, <0xe69500e4 1>;
+ reginfo = <&SIM_ERI &SIM_RXI &SIM_TXI
+ &SIM_TEI &STPRO_0 &STPRO_1 &STPRO_2 &STPRO_3>;
+ };
+
+ intc_mask21 {
+ reg = <0xe69500a8 1>, <0xe69500e8 1>;
+ reginfo = <&STPRO_4 0 0 0 0 0 0 0>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6940000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC3_1 &DMAC3_2 &CMT2 &ICBS0>;
+ };
+
+ intc_prio1 {
+ reg = <0xe6940004 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo =<&IRDA 0 &BBIF1 &BBIF2>;
+ };
+
+ intc_prio2 {
+ reg = <0xe6940008 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&ATAPI 0 &CMT1_1 &AP_ARM1>;
+ };
+
+ intc_prio3 {
+ reg = <0xe694000c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &CMT1_2 0>;
+ };
+
+ intc_prio4 {
+ reg = <0xe6940010 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC1_1 &MFIS &MFI &USBF>;
+ };
+
+ intc_prio5 {
+ reg = <0xe6940014 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&KEYSC &DMAC1_2 &SGX540 &CMT1_0>;
+ };
+
+ intc_prio6 {
+ reg = <0xe6940018 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SCIFA0 &SCIFA1 &SCIFA2 &SCIFA3>;
+ };
+
+ intc_prio7 {
+ reg = <0xe694001c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MSIOF2 &USBHSDMAC &FLCTL &SDHI0>;
+ };
+
+ intc_prio8 {
+ reg = <0xe6940020 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MSIOF1 &SCIFA4 0 &IIC1>;
+ };
+
+ intc_prio9 {
+ reg = <0xe6940024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&DMAC2_1 &DMAC2_2 &AP_ARM_L2CINT 0>;
+ };
+
+ intc_prio10 {
+ reg = <0xe6940028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &CMT1_3 0 &SDHI1>;
+ };
+
+ intc_prio11 {
+ reg = <0xe694002c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TPU0 &SCIFA6 &SCIFA7 &GETHER>;
+ };
+
+ intc_prio12 {
+ reg = <0xe6940030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &CMT3 0 &RWDT0>;
+ };
+
+ intc_prio13 {
+ reg = <0xe6940034 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SCIFB &SCIFA5 0 &DDM>;
+ };
+
+ intc_prio14 {
+ reg = <0xe6940038 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &DIRC &SDHI2>;
+ };
+
+ intc_prio15 {
+ reg = <0xe6950000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SHWYSTAT 0 0 0>;
+ };
+
+ intc_prio16 {
+ reg = <0xe6950010 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&USBH1 0 0 0>;
+ };
+
+ intc_prio17 {
+ reg = <0xe6950014 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&USBH2 0 0 0>;
+ };
+
+ intc_prio18 {
+ reg = <0xe6950020 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&HDMI 0 0 0>;
+ };
+
+ intc_prio19 {
+ reg = <0xe6950024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&RSPI 0 0 0>;
+ };
+
+ intc_prio20 {
+ reg = <0xe6950028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SPU2 0 &FSI &FMSI>;
+ };
+
+ intc_prio21 {
+ reg = <0xe695002c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &HDMI_SSS &HDMI_KEY 0>;
+ };
+
+ intc_prio22 {
+ reg = <0xe6950030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IPMMU 0 0 0>;
+ };
+
+ intc_prio23 {
+ reg = <0xe6950034 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&AP_ARM2 0 0 0>;
+ };
+
+ intc_prio24 {
+ reg = <0xe6950038 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&MFIS2 &CPORTR2S &CMT14 &CMT15>;
+ };
+
+ intc_prio25 {
+ reg = <0xe695003c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &MMCIF_0 &MMCIF_1 &MMCIF_2>;
+ };
+
+ intc_prio26 {
+ reg = <0xe6950048 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&SIM_ERI &SIM_RXI &SIM_TXI &SIM_TEI>;
+ };
+
+ intc_prio27 {
+ reg = <0xe695004c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&STPRO_0 &STPRO_1 &STPRO_2 &STPRO_3>;
+ };
+
+ intc_prio28 {
+ reg = <0xe6950050 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&STPRO_4 0 0 0>;
+ };
+ };
+ };
+
+ intca_irq_pins: interrupt-controller at 1{
+ compatible = "renesas,sh_intca_irq_pins";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ reg = <0xe6900000 0x6c>;
+
+ IRQ0: intsrc1 { vector = <0x200>; };
+ IRQ1: intsrc2 { vector = <0x220>; };
+ IRQ2: intsrc3 { vector = <0x240>; };
+ IRQ3: intsrc4 { vector = <0x260>; };
+ IRQ4: intsrc5 { vector = <0x280>; };
+ IRQ5: intsrc6 { vector = <0x2a0>; };
+ IRQ6: intsrc7 { vector = <0x2c0>; };
+ IRQ7: intsrc8 { vector = <0x2e0>; };
+ IRQ8: intsrc9 { vector = <0x300>; };
+ IRQ9: intsrc10 { vector = <0x320>; };
+ IRQ10: intsrc11 { vector = <0x340>; };
+ IRQ11: intsrc12 { vector = <0x360>; };
+ IRQ12: intsrc13 { vector = <0x380>; };
+ IRQ13: intsrc14 { vector = <0x3a0>; };
+ IRQ14: intsrc15 { vector = <0x3c0>; };
+ IRQ15: intsrc16 { vector = <0x3e0>; };
+ IRQ16: intsrc17 { vector = <0x3200>; };
+ IRQ17: intsrc18 { vector = <0x3220>; };
+ IRQ18: intsrc19 { vector = <0x3240>; };
+ IRQ19: intsrc20 { vector = <0x3260>; };
+ IRQ20: intsrc21 { vector = <0x3280>; };
+ IRQ21: intsrc22 { vector = <0x32a0>; };
+ IRQ22: intsrc23 { vector = <0x32c0>; };
+ IRQ23: intsrc24 { vector = <0x32e0>; };
+ IRQ24: intsrc25 { vector = <0x3300>; };
+ IRQ25: intsrc26 { vector = <0x3320>; };
+ IRQ26: intsrc27 { vector = <0x3340>; };
+ IRQ27: intsrc28 { vector = <0x3360>; };
+ IRQ28: intsrc29 { vector = <0x3380>; };
+ IRQ29: intsrc30 { vector = <0x33a0>; };
+ IRQ30: intsrc31 { vector = <0x33c0>; };
+ IRQ31: intsrc32 { vector = <0x33e0>; };
+
+ intc_vectors {
+ vector_table = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5
+ &IRQ6 &IRQ7 &IRQ8 &IRQ9 &IRQ10
+ &IRQ11 &IRQ12 &IRQ13 &IRQ14 &IRQ15
+ &IRQ16 &IRQ17 &IRQ18 &IRQ19 &IRQ20
+ &IRQ21 &IRQ22 &IRQ23 &IRQ24 &IRQ25
+ &IRQ26 &IRQ27 &IRQ28 &IRQ29 &IRQ30
+ &IRQ31>;
+ };
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xe6900040 1>, <0xe6900060 1>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4
+ &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_mask1 {
+ reg = <0xe6900044 1>, <0xe6900064 1>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_mask2 {
+ reg = <0xe6900048 1>, <0xe6900068 1>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_mask3 {
+ reg = <0xe690004C 1>, <0xe690006C 1>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xe6900010 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_prio1 {
+ reg = <0xe6900014 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_prio2 {
+ reg = <0xe6900018 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_prio3 {
+ reg = <0xe690001C 4>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_sense_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_sense0 {
+ reg = <0xe6900000 4>;
+ field-width = <4>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_sense1 {
+ reg = <0xe6900004 4>;
+ field-width = <4>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_sense2 {
+ reg = <0xe6900008 4>;
+ field-width = <4>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_sense3 {
+ reg = <0xe690000C 4>;
+ field-width = <4>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+
+ intc_ack_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_ack0 {
+ reg = <0xe6900020 1>, <0x0 0>;
+ reginfo = <&IRQ0 &IRQ1 &IRQ2 &IRQ3 &IRQ4 &IRQ5 &IRQ6 &IRQ7>;
+ };
+
+ intc_ack1 {
+ reg = <0xe6900024 1>, <0x0 0>;
+ reginfo = <&IRQ8 &IRQ9 &IRQ10 &IRQ11
+ &IRQ12 &IRQ13 &IRQ14 &IRQ15>;
+ };
+
+ intc_ack2 {
+ reg = <0xe6900028 1>, <0x0 0>;
+ reginfo = <&IRQ16 &IRQ17 &IRQ18 &IRQ19
+ &IRQ20 &IRQ21 &IRQ22 &IRQ23>;
+ };
+
+ intc_ack3 {
+ reg = <0xe690002C 1>, <0x0 0>;
+ reginfo = <&IRQ24 &IRQ25 &IRQ26 &IRQ27
+ &IRQ28 &IRQ29 &IRQ30 &IRQ31>;
+ };
+ };
+ };
+
+ intcs: interrupt-controller at 2{
+ compatible = "renesas,sh_intcs";
+ interrupt-controller;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ reg = <0xffd20000 0x200>, <0xffd50000 0x200>;
+ group_size = <3>;
+
+ INTCS: intsrc1 { vector = <0x0F80>; };
+ VPU5HA2: intsrc2 { vector = <0x3c80>; };
+ _2DG_TRAP: intsrc3 { vector = <0x3ca0>; };
+ _2DG_GPM_INT:intsrc4 { vector = <0x3cc0>; };
+ _2DG_CER_INT:intsrc5 { vector = <0x3ce0>; };
+ VPU5F: intsrc6 { vector = <0x3d80>; };
+ _2DG_BRK_INT:intsrc7 { vector = <0x3da0>; };
+ IIC0_ALI: intsrc8 { vector = <0x4200>; };
+ IIC0_TACKI: intsrc9 { vector = <0x4220>; };
+ IIC0_WAITI: intsrc10 { vector = <0x4240>; };
+ IIC0_DTEI: intsrc11 { vector = <0x4260>; };
+ TMU0_0: intsrc12 { vector = <0x4280>; };
+ TMU0_1: intsrc13 { vector = <0x42a0>; };
+ TMU0_2: intsrc14 { vector = <0x42c0>; };
+ CMT0: intsrc15 { vector = <0x4300>; };
+ LMB: intsrc16 { vector = <0x4360>; };
+ CTI: intsrc17 { vector = <0x3800>; };
+ VOU: intsrc18 { vector = <0x3820>; };
+ ICB: intsrc19 { vector = <0x3880>; };
+ VIO6C: intsrc20 { vector = <0x38e0>; };
+ CEU20: intsrc21 { vector = <0x3900>; };
+ CEU21: intsrc22 { vector = <0x3920>; };
+ JPU: intsrc23 { vector = <0x3960>; };
+ LCDC0: intsrc24 { vector = <0x3980>; };
+ LCRC: intsrc25 { vector = <0x39a0>; };
+ LCDC1: intsrc26 { vector = <0x4b80>; };
+ TMU1_0: intsrc27 { vector = <0x4d00>; };
+ TMU1_1: intsrc28 { vector = <0x4d20>; };
+ TMU1_2: intsrc29 { vector = <0x4d40>; };
+ CMT4: intsrc30 { vector = <0x4d80>; };
+ DISP: intsrc31 { vector = <0x4da0>; };
+ DSRV: intsrc32 { vector = <0x4dc0>; };
+ CPORTS2R: intsrc33 { vector = <0x4e20>; };
+
+ /* Group */
+ _2DG1: intc_group0 { group = <&_2DG_CER_INT &_2DG_GPM_INT &_2DG_TRAP>; };
+ IIC0: intc_group1 { group = <&IIC0_DTEI &IIC0_WAITI &IIC0_TACKI &IIC0_ALI>; };
+ TMU1: intc_group2 { group = <&TMU1_0 &TMU1_1 &TMU1_2>; };
+
+ intc_vectors {
+
+ vector_table = <&VPU5HA2 &_2DG_TRAP &_2DG_GPM_INT
+ &_2DG_CER_INT &VPU5F &_2DG_BRK_INT &IIC0_ALI &IIC0_TACKI
+ &IIC0_WAITI &IIC0_DTEI &TMU0_0 &TMU0_1 &TMU0_2 &CMT0
+ &LMB &CTI &VOU &ICB &VIO6C &CEU20 &CEU21 &JPU &LCDC0
+ &LCRC &LCDC1 &TMU1_0 &TMU1_1 &TMU1_2 &CMT4 &DISP &DSRV
+ &CPORTS2R &INTCS>;
+ };
+
+
+ intc_mask_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_mask0 {
+ reg = <0xffd20184 1>, <0xffd201c4 1>;
+ reginfo = <&_2DG_CER_INT &_2DG_GPM_INT &_2DG_TRAP &VPU5HA2
+ 0 0 0 0>;
+ };
+
+ intc_mask1 {
+ reg = <0xffd20188 1>, <0xffd201c8 1>;
+ reginfo = <0 0 &CEU21 &VPU5F 0 0 0 0>;
+ };
+
+ intc_mask2 {
+ reg = <0xffd2018c 1>, <0xffd201cc 1>;
+ reginfo = <0 0 0 0 &VIO6C 0 0 &ICB>;
+ };
+
+ intc_mask3 {
+ reg = <0xffd20190 1>, <0xffd201d0 1>;
+ reginfo = <0 0 &VOU &CTI &JPU 0 &LCRC &LCDC0>;
+ };
+
+ intc_mask4 {
+ reg = <0xffd2019c 1>, <0xffd201dc 1>;
+ reginfo = <0 &TMU0_2 &TMU0_1 &TMU0_0 0 0 0 0>;
+ };
+
+ intc_mask5 {
+ reg = <0xffd201a0 1>, <0xffd201e0 1>;
+ reginfo = <0 0 0 0 &CEU20 0 0 0>;
+ };
+
+ intc_mask6 {
+ reg = <0xffd201a4 1>, <0xffd201e4 1>;
+ reginfo = <0 0 0 &CMT0 0 0 0 0>;
+ };
+
+ intc_mask7 {
+ reg = <0xffd201ac 1>, <0xffd201ec 1>;
+ reginfo = <&IIC0_DTEI &IIC0_WAITI &IIC0_TACKI &IIC0_ALI
+ 0 &_2DG_BRK_INT &LMB 0>;
+ };
+
+ intc_mask8 {
+ reg = <0xffd50190 1>, <0xffd501d0 1>;
+ reginfo = <0 0 0 0 &LCDC1 0 0 0>;
+ };
+
+ intc_mask9 {
+ reg = <0xffd50198 1>, <0xffd501d8 1>;
+ reginfo = <&TMU1_0 &TMU1_1 &TMU1_2 0 &CMT4 &DISP &DSRV 0>;
+ };
+
+ intc_mask10 {
+ reg = <0xffd5019c 1>, <0xffd501dc 1>;
+ reginfo = <0 &CPORTS2R 0 0 0 0 0 0>;
+ };
+
+ intc_mask11 {
+ reg = <0xffd20104 2>, <0x00000000 0>;
+ reginfo = <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 &INTCS>;
+ };
+ };
+
+ intc_prio_registers {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ intc_prio0 {
+ reg = <0xffd20000 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&CTI &VOU 0 &ICB>;
+ };
+
+ intc_prio1 {
+ reg = <0xffd20004 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&JPU &LCDC0 0 &LCRC>;
+ };
+
+ intc_prio2 {
+ reg = <0xffd20010 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &VPU5HA2 0 &VPU5F>;
+ };
+
+ intc_prio3 {
+ reg = <0xffd20014 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 0 &CMT0>;
+ };
+
+ intc_prio4 {
+ reg = <0xffd20018 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TMU0_0 &TMU0_1 &TMU0_2 &_2DG1>;
+ };
+
+ intc_prio5 {
+ reg = <0xffd2001c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 0 &_2DG_BRK_INT>;
+ };
+
+ intc_prio6 {
+ reg = <0xffd20020 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 0 &IIC0>;
+ };
+
+ intc_prio7 {
+ reg = <0xffd20024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&CEU20 0 0 0>;
+ };
+
+ intc_prio8 {
+ reg = <0xffd20028 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&VIO6C 0 &LMB 0>;
+ };
+
+ intc_prio9 {
+ reg = <0xffd2002c 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 0 &CEU21 0>;
+ };
+
+ intc_prio10 {
+ reg = <0xffd50024 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&LCDC1 0 0 0>;
+ };
+
+ intc_prio11 {
+ reg = <0xffd50030 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&TMU1 0 0 0>;
+ };
+
+ intc_prio12 {
+ reg = <0xffd50034 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <&CMT4 &DISP &DSRV 0>;
+ };
+
+ intc_prio13 {
+ reg = <0xffd50038 2>, <0x0 0>;
+ field-width = <4>;
+ reginfo = <0 &CPORTS2R 0 0>;
+ };
+ };
+
+ intc_intevtsa {
+ vector = <&INTCS>;
+ };
+ };
+ };
};
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 09/15] ARM: shmobile: Include DTSI of r8a7740 to armadillo800eva
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (7 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 08/15] ARM: shmobile: Add DT table of INTC for r8a7740 Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 10/15] ARM: shmobile: Include DTSI of sh73a0 to kzm9g board Simon Horman
` (5 subsequent siblings)
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/boot/dts/r8a7740-armadillo800eva.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
index a7505a9..a8e7bd9 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva.dts
@@ -9,7 +9,7 @@
*/
/dts-v1/;
-/include/ "skeleton.dtsi"
+/include/ "r8a7740.dtsi"
/ {
model = "armadillo 800 eva";
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 10/15] ARM: shmobile: Include DTSI of sh73a0 to kzm9g board
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (8 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 09/15] ARM: shmobile: Include DTSI of r8a7740 to armadillo800eva Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 11/15] ARM: shmobile: kzm9g: Use DT initialisation of INTC Simon Horman
` (4 subsequent siblings)
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/boot/dts/sh73a0-kzm9g.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g.dts b/arch/arm/boot/dts/sh73a0-kzm9g.dts
index bcb9119..7b37901 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g.dts
@@ -9,7 +9,7 @@
*/
/dts-v1/;
-/include/ "skeleton.dtsi"
+/include/ "sh73a0.dtsi"
/ {
model = "KZM-A9-GT";
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 11/15] ARM: shmobile: kzm9g: Use DT initialisation of INTC
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (9 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 10/15] ARM: shmobile: Include DTSI of sh73a0 to kzm9g board Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 12/15] ARM: shmobile: r8a7740: " Simon Horman
` (3 subsequent siblings)
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/mach-shmobile/board-kzm9g.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index 0a43f31..0a0f302 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -779,7 +779,7 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g")
.map_io = sh73a0_map_io,
.init_early = sh73a0_add_early_devices,
.nr_irqs = NR_IRQS_LEGACY,
- .init_irq = sh73a0_init_irq,
+ .init_irq = sh73a0_init_irq_of,
.handle_irq = gic_handle_irq,
.init_machine = kzm_init,
.init_late = shmobile_init_late,
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 12/15] ARM: shmobile: r8a7740: Use DT initialisation of INTC
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (10 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 11/15] ARM: shmobile: kzm9g: Use DT initialisation of INTC Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 13/15] ARM: shmobile: sh7372: " Simon Horman
` (2 subsequent siblings)
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/mach-shmobile/setup-r8a7740.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 11bb1d9..a8e57ab 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -750,7 +750,7 @@ static const char *r8a7740_boards_compat_dt[] __initdata = {
DT_MACHINE_START(SH7372_DT, "Generic R8A7740 (Flattened Device Tree)")
.map_io = r8a7740_map_io,
.init_early = r8a7740_add_early_devices_dt,
- .init_irq = r8a7740_init_irq,
+ .init_irq = r8a7740_init_irq_of,
.handle_irq = shmobile_handle_irq_intc,
.init_machine = r8a7740_add_standard_devices_dt,
.timer = &shmobile_timer,
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 13/15] ARM: shmobile: sh7372: Use DT initialisation of INTC
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (11 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 12/15] ARM: shmobile: r8a7740: " Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 14/15] ARM: shmobile: Add DT table of GIC for sh73a0 Simon Horman
2012-11-07 8:50 ` [PATCH 15/15] ARM: shmobile: sh73a0: Use DT for GIC Simon Horman
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
From: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/mach-shmobile/setup-sh7372.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index a07954f..bbe6e2a 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -1096,7 +1096,7 @@ DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)")
.map_io = sh7372_map_io,
.init_early = sh7372_add_early_devices_dt,
.nr_irqs = NR_IRQS_LEGACY,
- .init_irq = sh7372_init_irq,
+ .init_irq = sh7372_init_irq_of,
.handle_irq = shmobile_handle_irq_intc,
.init_machine = sh7372_add_standard_devices_dt,
.timer = &shmobile_timer,
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 14/15] ARM: shmobile: Add DT table of GIC for sh73a0
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (12 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 13/15] ARM: shmobile: sh7372: " Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
2012-11-07 8:50 ` [PATCH 15/15] ARM: shmobile: sh73a0: Use DT for GIC Simon Horman
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/boot/dts/sh73a0.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index b0c55e1..b250e27 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -806,5 +806,14 @@
};
};
};
+
+ intc: interrupt-controller at f0001000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+ #address-cells = <1>;
+ interrupt-controller;
+ reg = <0xf0001000 0x1000>,
+ <0xf0000100 0x100>;
+ };
};
};
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 15/15] ARM: shmobile: sh73a0: Use DT for GIC
2012-11-07 8:50 [RFC 00/15] SH/ARM shmobile DT initialisation of INTC and GIC Simon Horman
` (13 preceding siblings ...)
2012-11-07 8:50 ` [PATCH 14/15] ARM: shmobile: Add DT table of GIC for sh73a0 Simon Horman
@ 2012-11-07 8:50 ` Simon Horman
14 siblings, 0 replies; 19+ messages in thread
From: Simon Horman @ 2012-11-07 8:50 UTC (permalink / raw)
To: linux-arm-kernel
Signed-off-by: Simon Horman <horms@verge.net.au>
---
arch/arm/mach-shmobile/intc-sh73a0.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-shmobile/intc-sh73a0.c b/arch/arm/mach-shmobile/intc-sh73a0.c
index ee62349..e9b5419 100644
--- a/arch/arm/mach-shmobile/intc-sh73a0.c
+++ b/arch/arm/mach-shmobile/intc-sh73a0.c
@@ -151,6 +151,7 @@ error:
}
static const struct of_device_id irq_of_match[] __initconst = {
+ { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
{ .compatible = "renesas,sh_intcs", .data = sh73a0_intcs_of_init },
{ .compatible = "renesas,sh_intca_irq_pins",
.data = sh73a0_intca_pins_of_init },
@@ -559,18 +560,18 @@ static irqreturn_t sh73a0_pint1_demux(int irq, void *dev_id)
static void __init sh73a0_init_irq__(bool of)
{
- void __iomem *gic_dist_base = IOMEM(0xf0001000);
- void __iomem *gic_cpu_base = IOMEM(0xf0000100);
void __iomem *intevtsa;
int k, n;
- gic_init(0, 29, gic_dist_base, gic_cpu_base);
- gic_arch_extn.irq_set_wake = sh73a0_set_wake;
-
#ifdef CONFIG_OF
if (of)
of_irq_init(irq_of_match);
+ else
#endif
+ {
+ gic_init(0, 29, IOMEM(0xf0001000), IOMEM(0xf0000100));
+ gic_arch_extn.irq_set_wake = sh73a0_set_wake;
+ }
register_intc_controller(&intcs_desc);
register_intc_controller(&intca_irq_pins_desc);
--
1.7.10.4
^ permalink raw reply related [flat|nested] 19+ messages in thread