From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 13/18] arm64: arch_timer: Move clocksource_counter and co around
Date: Tue, 4 Apr 2017 18:18:21 +0100 [thread overview]
Message-ID: <20170404171826.25030-14-marc.zyngier@arm.com> (raw)
In-Reply-To: <20170404171826.25030-1-marc.zyngier@arm.com>
In order to access clocksource_counter from the errata handling code,
move it (together with the related structures and functions) towards
the top of the file.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---
drivers/clocksource/arm_arch_timer.c | 62 ++++++++++++++++++------------------
1 file changed, 31 insertions(+), 31 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index 4551587bcb44..395f5d95a737 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -158,6 +158,37 @@ u32 arch_timer_reg_read(int access, enum arch_timer_reg reg,
return val;
}
+/*
+ * Default to cp15 based access because arm64 uses this function for
+ * sched_clock() before DT is probed and the cp15 method is guaranteed
+ * to exist on arm64. arm doesn't use this before DT is probed so even
+ * if we don't have the cp15 accessors we won't have a problem.
+ */
+u64 (*arch_timer_read_counter)(void) = arch_counter_get_cntvct;
+
+static u64 arch_counter_read(struct clocksource *cs)
+{
+ return arch_timer_read_counter();
+}
+
+static u64 arch_counter_read_cc(const struct cyclecounter *cc)
+{
+ return arch_timer_read_counter();
+}
+
+static struct clocksource clocksource_counter = {
+ .name = "arch_sys_counter",
+ .rating = 400,
+ .read = arch_counter_read,
+ .mask = CLOCKSOURCE_MASK(56),
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
+};
+
+static struct cyclecounter cyclecounter __ro_after_init = {
+ .read = arch_counter_read_cc,
+ .mask = CLOCKSOURCE_MASK(56),
+};
+
#ifdef CONFIG_FSL_ERRATUM_A008585
/*
* The number of retries is an arbitrary value well beyond the highest number
@@ -742,37 +773,6 @@ static u64 arch_counter_get_cntvct_mem(void)
return ((u64) vct_hi << 32) | vct_lo;
}
-/*
- * Default to cp15 based access because arm64 uses this function for
- * sched_clock() before DT is probed and the cp15 method is guaranteed
- * to exist on arm64. arm doesn't use this before DT is probed so even
- * if we don't have the cp15 accessors we won't have a problem.
- */
-u64 (*arch_timer_read_counter)(void) = arch_counter_get_cntvct;
-
-static u64 arch_counter_read(struct clocksource *cs)
-{
- return arch_timer_read_counter();
-}
-
-static u64 arch_counter_read_cc(const struct cyclecounter *cc)
-{
- return arch_timer_read_counter();
-}
-
-static struct clocksource clocksource_counter = {
- .name = "arch_sys_counter",
- .rating = 400,
- .read = arch_counter_read,
- .mask = CLOCKSOURCE_MASK(56),
- .flags = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
-static struct cyclecounter cyclecounter __ro_after_init = {
- .read = arch_counter_read_cc,
- .mask = CLOCKSOURCE_MASK(56),
-};
-
static struct arch_timer_kvm_info arch_timer_kvm_info;
struct arch_timer_kvm_info *arch_timer_get_kvm_info(void)
--
2.11.0
next prev parent reply other threads:[~2017-04-04 17:18 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-04 17:18 [PATCH v3 00/18] clocksource/arch_timer: Errata workaround infrastructure rework Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 01/18] arm64: Allow checking of a CPU-local erratum Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 02/18] arm64: Add CNTVCT_EL0 trap handler Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 03/18] arm64: Define Cortex-A73 MIDR Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 04/18] arm64: cpu_errata: Allow an erratum to be match for all revisions of a core Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 05/18] arm64: cpu_errata: Add capability to advertise Cortex-A73 erratum 858921 Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 06/18] arm64: arch_timer: Add infrastructure for multiple erratum detection methods Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 07/18] arm64: arch_timer: Add erratum handler for CPU-specific capability Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 08/18] arm64: arch_timer: Move arch_timer_reg_read/write around Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 09/18] arm64: arch_timer: Get rid of erratum_workaround_set_sne Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 10/18] arm64: arch_timer: Rework the set_next_event workarounds Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 11/18] arm64: arch_timer: Make workaround methods optional Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 12/18] arm64: arch_timer: Allows a CPU-specific erratum to only affect a subset of CPUs Marc Zyngier
2017-04-04 17:18 ` Marc Zyngier [this message]
2017-04-04 17:18 ` [PATCH v3 14/18] arm64: arch_timer: Save cntkctl_el1 as a per-cpu variable Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 15/18] arm64: arch_timer: Enable CNTVCT_EL0 trap if workaround is enabled Marc Zyngier
[not found] ` <58FDB05B.6020108@huawei.com>
2017-04-24 8:13 ` Marc Zyngier
2017-04-24 8:18 ` Lixiaoping (Timmy)
2017-04-24 8:25 ` Lixiaoping (Timmy)
2017-04-24 8:40 ` Marc Zyngier
2017-04-24 9:14 ` Hanjun Guo
2017-04-24 9:18 ` Daniel Lezcano
2017-04-24 9:33 ` Marc Zyngier
2017-04-24 11:26 ` Catalin Marinas
2017-04-04 17:18 ` [PATCH v3 16/18] arm64: arch_timer: Workaround for Cortex-A73 erratum 858921 Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 17/18] arm64: arch_timer: Allow erratum matching with ACPI OEM information Marc Zyngier
2017-04-04 17:18 ` [PATCH v3 18/18] arm64: arch_timer: Add HISILICON_ERRATUM_161010101 ACPI matching data Marc Zyngier
2017-04-06 16:27 ` [PATCH v3 00/18] clocksource/arch_timer: Errata workaround infrastructure rework Catalin Marinas
2017-04-06 21:15 ` Daniel Lezcano
2017-04-07 8:15 ` Thomas Gleixner
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