[PATCH/RFC 1/5] dt-bindings: mfd: bd9571mwv: Document rohm,ddr-backup-power

[PATCH/RFC 1/5] dt-bindings: mfd: bd9571mwv: Document rohm,ddr-backup-power

[Lee Jones]

On Tue, 10 Oct 2017, Geert Uytterhoeven wrote:

> Document the new optional "rohm,ddr-backup-power" property.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  Documentation/devicetree/bindings/mfd/bd9571mwv.txt | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mfd/bd9571mwv.txt b/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
> index 9ab216a851d5619b..7ea3f2db41d4e501 100644
> --- a/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
> +++ b/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
> @@ -25,6 +25,12 @@ Required properties:
>  			    Each child node is defined using the standard
>  			    binding for regulators.
>  
> +Optional properties:
> +  - rohm,ddr-backup-power : Value to use for DDR-Backup Power.  This controls
> +			    which DDR rails need to be kept powered when backup
> +			    mode is enabled, cfr. the KEEPON_DDR* bits in the

Perhaps it's just me, but I'm confused by this line.

Can you word it another way?

> +			    documentation for the "BKUP Mode Cnt" register.
> +
>  Example:
>  
>  	pmic: pmic at 30 {
> @@ -36,6 +42,7 @@ Example:
>  		#interrupt-cells = <2>;
>  		gpio-controller;
>  		#gpio-cells = <2>;
> +		rohm,ddr-backup-power = <15>;

Can you explain what this means?  Is it a mask, or does line 15 need
to be kept on?  What is the range?  Is 0 acceptable?  Clarification
required please.

>  		regulators {
>  			dvfs: dvfs {

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH/RFC 1/5] dt-bindings: mfd: bd9571mwv: Document rohm, ddr-backup-power

[Geert Uytterhoeven]

Hi Lee,

On Fri, Oct 13, 2017 at 10:55 AM, Lee Jones <lee.jones@linaro.org> wrote:
> On Tue, 10 Oct 2017, Geert Uytterhoeven wrote:
>> Document the new optional "rohm,ddr-backup-power" property.
>>
>> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> ---
>>  Documentation/devicetree/bindings/mfd/bd9571mwv.txt | 7 +++++++
>>  1 file changed, 7 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/mfd/bd9571mwv.txt b/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
>> index 9ab216a851d5619b..7ea3f2db41d4e501 100644
>> --- a/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
>> +++ b/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
>> @@ -25,6 +25,12 @@ Required properties:
>>                           Each child node is defined using the standard
>>                           binding for regulators.
>>
>> +Optional properties:
>> +  - rohm,ddr-backup-power : Value to use for DDR-Backup Power.  This controls
>> +                         which DDR rails need to be kept powered when backup
>> +                         mode is enabled, cfr. the KEEPON_DDR* bits in the
>
> Perhaps it's just me, but I'm confused by this line.
>
> Can you word it another way?

I'll ttry... Let me think a bit about it...

>> +                         documentation for the "BKUP Mode Cnt" register.
>> +
>>  Example:
>>
>>       pmic: pmic at 30 {
>> @@ -36,6 +42,7 @@ Example:
>>               #interrupt-cells = <2>;
>>               gpio-controller;
>>               #gpio-cells = <2>;
>> +             rohm,ddr-backup-power = <15>;
>
> Can you explain what this means?  Is it a mask, or does line 15 need
> to be kept on?  What is the range?  Is 0 acceptable?  Clarification
> required please.

It's a mask (OR of (in this case all four) needed KEEPON_DDR* bits).
Unfortunately the datasheet is not publicly available.

0 is acceptable, but as the property is optional, you better just leave it out.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC 1/5] dt-bindings: mfd: bd9571mwv: Document rohm,ddr-backup-power

[Lee Jones]

On Fri, 13 Oct 2017, Geert Uytterhoeven wrote:

> Hi Lee,
> 
> On Fri, Oct 13, 2017 at 10:55 AM, Lee Jones <lee.jones@linaro.org> wrote:
> > On Tue, 10 Oct 2017, Geert Uytterhoeven wrote:
> >> Document the new optional "rohm,ddr-backup-power" property.
> >>
> >> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> >> ---
> >>  Documentation/devicetree/bindings/mfd/bd9571mwv.txt | 7 +++++++
> >>  1 file changed, 7 insertions(+)
> >>
> >> diff --git a/Documentation/devicetree/bindings/mfd/bd9571mwv.txt b/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
> >> index 9ab216a851d5619b..7ea3f2db41d4e501 100644
> >> --- a/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
> >> +++ b/Documentation/devicetree/bindings/mfd/bd9571mwv.txt
> >> @@ -25,6 +25,12 @@ Required properties:
> >>                           Each child node is defined using the standard
> >>                           binding for regulators.
> >>
> >> +Optional properties:
> >> +  - rohm,ddr-backup-power : Value to use for DDR-Backup Power.  This controls
> >> +                         which DDR rails need to be kept powered when backup
> >> +                         mode is enabled, cfr. the KEEPON_DDR* bits in the
> >
> > Perhaps it's just me, but I'm confused by this line.
> >
> > Can you word it another way?
> 
> I'll ttry... Let me think a bit about it...

I think it's just the "cfr" which is throwing me.

> >> +                         documentation for the "BKUP Mode Cnt" register.
> >> +
> >>  Example:
> >>
> >>       pmic: pmic at 30 {
> >> @@ -36,6 +42,7 @@ Example:
> >>               #interrupt-cells = <2>;
> >>               gpio-controller;
> >>               #gpio-cells = <2>;
> >> +             rohm,ddr-backup-power = <15>;
> >
> > Can you explain what this means?  Is it a mask, or does line 15 need
> > to be kept on?  What is the range?  Is 0 acceptable?  Clarification
> > required please.
> 
> It's a mask (OR of (in this case all four) needed KEEPON_DDR* bits).
> Unfortunately the datasheet is not publicly available.
> 
> 0 is acceptable, but as the property is optional, you better just leave it out.

Would you mind reflecting that in the doc please?

Maybe a few more examples will help?

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH/RFC 5/5] arm64: dts: renesas: salvator-common: Configure PMIC for DDR Backup Power

[Simon Horman]

On Tue, Oct 10, 2017 at 05:26:18PM +0200, Geert Uytterhoeven wrote:
> On Salvator-X(S), all of DDR0, DDR1, DDR0C, and DDR1C need to be kept
> powered when backup mode is enabled.
> 
> Reflect this in the rohm,ddr-backup-power property for the BD9571MWV
> PMIC.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>


Hi,

I have marked this as deferred pending acceptance of the bindings.
Please repost or otherwise ping me once that dependency is in place.

[PATCH/RFC 4/5] regulator: bd9571mwv: Add support for backup mode

[Mark Brown]

On Tue, Oct 10, 2017 at 05:26:17PM +0200, Geert Uytterhoeven wrote:

> Backup mode is not enabled automatically, as e.g. on Renesas
> Salvator-X(S) boards enabling backup mode changes the role of the ACC
> switch from a power switch to a wake-up switch.  Hence enabling it
> prevents the board from being powered off using the ACC switch, which
> may confuse the user.

This sounds an awful lot like the standard power/wakeup, though the
power change is a bit unexpected there.  I'm also wondering if it makes
sense to just only enable the wakeup mode when suspending which
preserves the power off functionality while also keeping the wakeup
support.
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[PATCH/RFC 4/5] regulator: bd9571mwv: Add support for backup mode

[Geert Uytterhoeven]

Hi Mark,

On Wed, Oct 18, 2017 at 1:02 PM, Mark Brown <broonie@kernel.org> wrote:
> On Tue, Oct 10, 2017 at 05:26:17PM +0200, Geert Uytterhoeven wrote:
>> Backup mode is not enabled automatically, as e.g. on Renesas
>> Salvator-X(S) boards enabling backup mode changes the role of the ACC
>> switch from a power switch to a wake-up switch.  Hence enabling it
>> prevents the board from being powered off using the ACC switch, which
>> may confuse the user.
>
> This sounds an awful lot like the standard power/wakeup, though the
> power change is a bit unexpected there.  I'm also wondering if it makes
> sense to just only enable the wakeup mode when suspending which
> preserves the power off functionality while also keeping the wakeup
> support.

The ACC switch is not a momentary switch (push button), but a toggle
switch with two positions.
Hence you cannot enable wakeup mode while suspending, as the proper
system suspend/resume procedure is:
  1. Enable backup mode in the PMIC,
  2. Switch ACC off (no-op as backup mode has been enabled),
  3. Suspend to RAM (PSCI suspend) => system suspends,
  4. Switch ACC on => system wakes up.
If you would combine steps 1 and 3, you can no longer do step 2 in between.

Yes, it's complicated :-(

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC 4/5] regulator: bd9571mwv: Add support for backup mode

[Mark Brown]

On Wed, Oct 18, 2017 at 01:19:08PM +0200, Geert Uytterhoeven wrote:
> On Wed, Oct 18, 2017 at 1:02 PM, Mark Brown <broonie@kernel.org> wrote:
> > On Tue, Oct 10, 2017 at 05:26:17PM +0200, Geert Uytterhoeven wrote:

> >> Backup mode is not enabled automatically, as e.g. on Renesas
> >> Salvator-X(S) boards enabling backup mode changes the role of the ACC
> >> switch from a power switch to a wake-up switch.  Hence enabling it
> >> prevents the board from being powered off using the ACC switch, which
> >> may confuse the user.

> > This sounds an awful lot like the standard power/wakeup, though the
> > power change is a bit unexpected there.  I'm also wondering if it makes
> > sense to just only enable the wakeup mode when suspending which
> > preserves the power off functionality while also keeping the wakeup
> > support.

> The ACC switch is not a momentary switch (push button), but a toggle
> switch with two positions.
> Hence you cannot enable wakeup mode while suspending, as the proper
> system suspend/resume procedure is:
>   1. Enable backup mode in the PMIC,
>   2. Switch ACC off (no-op as backup mode has been enabled),
>   3. Suspend to RAM (PSCI suspend) => system suspends,
>   4. Switch ACC on => system wakes up.
> If you would combine steps 1 and 3, you can no longer do step 2 in between.

> Yes, it's complicated :-(

I'm confused, I thought this was a physical switch but that's talking
about this as something software controlled (at least in step 2)?
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[PATCH/RFC 4/5] regulator: bd9571mwv: Add support for backup mode

[Geert Uytterhoeven]

Hi Mark,

On Wed, Oct 18, 2017 at 1:24 PM, Mark Brown <broonie@kernel.org> wrote:
> On Wed, Oct 18, 2017 at 01:19:08PM +0200, Geert Uytterhoeven wrote:
>> On Wed, Oct 18, 2017 at 1:02 PM, Mark Brown <broonie@kernel.org> wrote:
>> > On Tue, Oct 10, 2017 at 05:26:17PM +0200, Geert Uytterhoeven wrote:
>> >> Backup mode is not enabled automatically, as e.g. on Renesas
>> >> Salvator-X(S) boards enabling backup mode changes the role of the ACC
>> >> switch from a power switch to a wake-up switch.  Hence enabling it
>> >> prevents the board from being powered off using the ACC switch, which
>> >> may confuse the user.
>
>> > This sounds an awful lot like the standard power/wakeup, though the
>> > power change is a bit unexpected there.  I'm also wondering if it makes
>> > sense to just only enable the wakeup mode when suspending which
>> > preserves the power off functionality while also keeping the wakeup
>> > support.
>
>> The ACC switch is not a momentary switch (push button), but a toggle
>> switch with two positions.
>> Hence you cannot enable wakeup mode while suspending, as the proper
>> system suspend/resume procedure is:
>>   1. Enable backup mode in the PMIC,
>>   2. Switch ACC off (no-op as backup mode has been enabled),
>>   3. Suspend to RAM (PSCI suspend) => system suspends,
>>   4. Switch ACC on => system wakes up.
>> If you would combine steps 1 and 3, you can no longer do step 2 in between.
>
>> Yes, it's complicated :-(
>
> I'm confused, I thought this was a physical switch but that's talking
> about this as something software controlled (at least in step 2)?

The ACC switch is a physical switch.
Steps 1 and 3 are performed by software running on the board's SoC.
Steps 2 and 4 are performed by the external user (human or remote board
farm control hookup).

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC 4/5] regulator: bd9571mwv: Add support for backup mode

[Mark Brown]

On Wed, Oct 18, 2017 at 01:28:30PM +0200, Geert Uytterhoeven wrote:
> On Wed, Oct 18, 2017 at 1:24 PM, Mark Brown <broonie@kernel.org> wrote:

> >> Hence you cannot enable wakeup mode while suspending, as the proper
> >> system suspend/resume procedure is:
> >>   1. Enable backup mode in the PMIC,
> >>   2. Switch ACC off (no-op as backup mode has been enabled),
> >>   3. Suspend to RAM (PSCI suspend) => system suspends,
> >>   4. Switch ACC on => system wakes up.
> >> If you would combine steps 1 and 3, you can no longer do step 2 in between.

> >> Yes, it's complicated :-(

> > I'm confused, I thought this was a physical switch but that's talking
> > about this as something software controlled (at least in step 2)?

> The ACC switch is a physical switch.
> Steps 1 and 3 are performed by software running on the board's SoC.
> Steps 2 and 4 are performed by the external user (human or remote board
> farm control hookup).

That's horrible.  There's still the question about potentially using the
existing wakeup file to manage if the device is a wakeup source but
otherwise I guess the only other thing that'd make sense would be just
having a property in the DT.
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[PATCH/RFC 3/5] mfd: bd9571mwv: Allow DDR Backup Power register access

[Lee Jones]

On Tue, 10 Oct 2017, Geert Uytterhoeven wrote:

> Enable read/write access to the BD9571MWV_BKUP_MODE_CNT register, which
> is a.o. used to configure DDR Backup Power.

a.o.?  That's a new one on me.

Please ensure commit logs are clear for *everyone* to read/understand
by using descriptive and expanded (rather than shorten) terms.

Code looks fine though, so once fixed:

For my own reference:
  Acked-for-MFD-by: Lee Jones <lee.jones@linaro.org>

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

[PATCH/RFC 3/5] mfd: bd9571mwv: Allow DDR Backup Power register access

[Geert Uytterhoeven]

Hi Lee,

On Fri, Oct 13, 2017 at 10:58 AM, Lee Jones <lee.jones@linaro.org> wrote:
> On Tue, 10 Oct 2017, Geert Uytterhoeven wrote:
>
>> Enable read/write access to the BD9571MWV_BKUP_MODE_CNT register, which
>> is a.o. used to configure DDR Backup Power.
>
> a.o.?  That's a new one on me.

among(st) others

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH/RFC 3/5] mfd: bd9571mwv: Allow DDR Backup Power register access

[Lee Jones]

On Fri, 13 Oct 2017, Geert Uytterhoeven wrote:

> Hi Lee,
> 
> On Fri, Oct 13, 2017 at 10:58 AM, Lee Jones <lee.jones@linaro.org> wrote:
> > On Tue, 10 Oct 2017, Geert Uytterhoeven wrote:
> >
> >> Enable read/write access to the BD9571MWV_BKUP_MODE_CNT register, which
> >> is a.o. used to configure DDR Backup Power.
> >
> > a.o.?  That's a new one on me.
> 
> among(st) others

Please just write that instead. :)

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Applied "mfd: bd9571mwv: Allow DDR Backup Power register access" to the regulator tree

[Mark Brown]

The patch

   mfd: bd9571mwv: Allow DDR Backup Power register access

has been applied to the regulator tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 7b569bcb2a2f985fe2d1407aed705882af30cb77 Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Wed, 18 Apr 2018 15:18:03 +0200
Subject: [PATCH] mfd: bd9571mwv: Allow DDR Backup Power register access

Enable read/write access to the BD9571MWV_BKUP_MODE_CNT register, which
is amongst others used to configure DDR Backup Power.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 drivers/mfd/bd9571mwv.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mfd/bd9571mwv.c b/drivers/mfd/bd9571mwv.c
index 64e088dfe7b0..503979c81dae 100644
--- a/drivers/mfd/bd9571mwv.c
+++ b/drivers/mfd/bd9571mwv.c
@@ -29,6 +29,7 @@ static const struct mfd_cell bd9571mwv_cells[] = {
 
 static const struct regmap_range bd9571mwv_readable_yes_ranges[] = {
 	regmap_reg_range(BD9571MWV_VENDOR_CODE, BD9571MWV_PRODUCT_REVISION),
+	regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
 	regmap_reg_range(BD9571MWV_AVS_SET_MONI, BD9571MWV_AVS_DVFS_VID(3)),
 	regmap_reg_range(BD9571MWV_VD18_VID, BD9571MWV_VD33_VID),
 	regmap_reg_range(BD9571MWV_DVFS_VINIT, BD9571MWV_DVFS_VINIT),
@@ -44,6 +45,7 @@ static const struct regmap_access_table bd9571mwv_readable_table = {
 };
 
 static const struct regmap_range bd9571mwv_writable_yes_ranges[] = {
+	regmap_reg_range(BD9571MWV_BKUP_MODE_CNT, BD9571MWV_BKUP_MODE_CNT),
 	regmap_reg_range(BD9571MWV_AVS_VD09_VID(0), BD9571MWV_AVS_VD09_VID(3)),
 	regmap_reg_range(BD9571MWV_DVFS_SETVID, BD9571MWV_DVFS_SETVID),
 	regmap_reg_range(BD9571MWV_GPIO_DIR, BD9571MWV_GPIO_OUT),
-- 
2.17.0

[PATCH/RFC 2/5] mfd: bd9571mwv: Add DDR Backup Power register bit definitions

[Lee Jones]

On Tue, 10 Oct 2017, Geert Uytterhoeven wrote:

> Add definitions for the KEEPON_* bits in the "BKUP Mode Cnt" register,
> which control the DDR rails to be kept powered when backup mode is
> enabled.
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
>  include/linux/mfd/bd9571mwv.h | 5 +++++
>  1 file changed, 5 insertions(+)

Acked-by: Lee Jones <lee.jones@linaro.org>

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org ? Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Applied "mfd: bd9571mwv: Add DDR Backup Power register bit definitions" to the regulator tree

[Mark Brown]

The patch

   mfd: bd9571mwv: Add DDR Backup Power register bit definitions

has been applied to the regulator tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From 2ff0dab80a8999e99a93fd70f8d701ec3deab207 Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Wed, 18 Apr 2018 15:18:02 +0200
Subject: [PATCH] mfd: bd9571mwv: Add DDR Backup Power register bit definitions

Add definitions for the KEEPON_* bits in the "BKUP Mode Cnt" register,
which control the DDR rails to be kept powered when backup mode is
enabled.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 include/linux/mfd/bd9571mwv.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/linux/mfd/bd9571mwv.h b/include/linux/mfd/bd9571mwv.h
index f0708ba4cbba..eb05569f752b 100644
--- a/include/linux/mfd/bd9571mwv.h
+++ b/include/linux/mfd/bd9571mwv.h
@@ -33,6 +33,11 @@
 #define BD9571MWV_I2C_MD2_E1_BIT_2		0x12
 
 #define BD9571MWV_BKUP_MODE_CNT			0x20
+#define BD9571MWV_BKUP_MODE_CNT_KEEPON_MASK	GENMASK(3, 0)
+#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR0	BIT(0)
+#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR1	BIT(1)
+#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR0C	BIT(2)
+#define BD9571MWV_BKUP_MODE_CNT_KEEPON_DDR1C	BIT(3)
 #define BD9571MWV_BKUP_MODE_STATUS		0x21
 #define BD9571MWV_BKUP_RECOVERY_CNT		0x22
 #define BD9571MWV_BKUP_CTRL_TIM_CNT		0x23
-- 
2.17.0