* [PATCH 1/5] ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMP
2018-07-20 12:05 [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.19 Simon Horman
@ 2018-07-20 12:05 ` Simon Horman
2018-07-20 12:05 ` [PATCH 2/5] ARM: shmobile: Add the R9A06G032 SMP enabler driver Simon Horman
` (4 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Simon Horman @ 2018-07-20 12:05 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
As of commit cad160ed0a94927e ("ARM: shmobile: Convert file to use
cntvoff"), there's no non-SMP code left in headsmp-apmu.S.
Hence build the file for SMP only, and drop the no longer needed check
for CONFIG_SMP inside the file.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/Makefile | 2 +-
arch/arm/mach-shmobile/headsmp-apmu.S | 2 --
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 05ba728ed4f6..b33dc59d8698 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -21,13 +21,13 @@ cpu-y := platsmp.o headsmp.o
# Shared SoC family objects
obj-$(CONFIG_ARCH_RCAR_GEN2) += setup-rcar-gen2.o platsmp-apmu.o $(cpu-y)
CFLAGS_setup-rcar-gen2.o += -march=armv7-a
-obj-$(CONFIG_ARCH_RCAR_GEN2) += headsmp-apmu.o
obj-$(CONFIG_ARCH_R8A7790) += regulator-quirk-rcar-gen2.o
obj-$(CONFIG_ARCH_R8A7791) += regulator-quirk-rcar-gen2.o
obj-$(CONFIG_ARCH_R8A7793) += regulator-quirk-rcar-gen2.o
# SMP objects
smp-y := $(cpu-y)
+smp-$(CONFIG_ARCH_RCAR_GEN2) += headsmp-apmu.o
smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o
smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o
smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o
diff --git a/arch/arm/mach-shmobile/headsmp-apmu.S b/arch/arm/mach-shmobile/headsmp-apmu.S
index a7b4bc7a087b..fabe9cadd12e 100644
--- a/arch/arm/mach-shmobile/headsmp-apmu.S
+++ b/arch/arm/mach-shmobile/headsmp-apmu.S
@@ -8,9 +8,7 @@
#include <linux/linkage.h>
#include <asm/assembler.h>
-#ifdef CONFIG_SMP
ENTRY(shmobile_boot_apmu)
bl secure_cntvoff_init
b secondary_startup
ENDPROC(shmobile_boot_apmu)
-#endif
--
2.11.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 2/5] ARM: shmobile: Add the R9A06G032 SMP enabler driver
2018-07-20 12:05 [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.19 Simon Horman
2018-07-20 12:05 ` [PATCH 1/5] ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMP Simon Horman
@ 2018-07-20 12:05 ` Simon Horman
2018-07-20 12:05 ` [PATCH 3/5] soc: r9a06g032: don't build SMP files for non-SMP config Simon Horman
` (3 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Simon Horman @ 2018-07-20 12:05 UTC (permalink / raw)
To: linux-arm-kernel
From: Michel Pollet <michel.pollet@bp.renesas.com>
The Renesas R9A06G032 second CA7 is parked in a ROM pen at boot time, it
equires a special enable method to get it started.
Signed-off-by: Michel Pollet <michel.pollet@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
drivers/soc/renesas/Makefile | 1 +
drivers/soc/renesas/r9a06g032-smp.c | 96 +++++++++++++++++++++++++++++++++++++
2 files changed, 97 insertions(+)
create mode 100644 drivers/soc/renesas/r9a06g032-smp.c
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index 7dc0f20d7907..44a0d6b10192 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_SYSC_R8A77970) += r8a77970-sysc.o
obj-$(CONFIG_SYSC_R8A77980) += r8a77980-sysc.o
obj-$(CONFIG_SYSC_R8A77990) += r8a77990-sysc.o
obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o
+obj-$(CONFIG_ARCH_R9A06G032) += r9a06g032-smp.o
# Family
obj-$(CONFIG_RST_RCAR) += rcar-rst.o
diff --git a/drivers/soc/renesas/r9a06g032-smp.c b/drivers/soc/renesas/r9a06g032-smp.c
new file mode 100644
index 000000000000..a1926e8d73f2
--- /dev/null
+++ b/drivers/soc/renesas/r9a06g032-smp.c
@@ -0,0 +1,96 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * R9A06G032 Second CA7 enabler.
+ *
+ * Copyright (C) 2018 Renesas Electronics Europe Limited
+ *
+ * Michel Pollet <michel.pollet@bp.renesas.com>, <buserror@gmail.com>
+ * Derived from actions,s500-smp
+ */
+
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/smp.h>
+
+/*
+ * The second CPU is parked in ROM at boot time. It requires waking it after
+ * writing an address into the BOOTADDR register of sysctrl.
+ *
+ * So the default value of the "cpu-release-addr" corresponds to BOOTADDR...
+ *
+ * *However* the BOOTADDR register is not available when the kernel
+ * starts in NONSEC mode.
+ *
+ * So for NONSEC mode, the bootloader re-parks the second CPU into a pen
+ * in SRAM, and changes the "cpu-release-addr" of linux's DT to a SRAM address,
+ * which is not restricted.
+ */
+
+static void __iomem *cpu_bootaddr;
+
+static DEFINE_SPINLOCK(cpu_lock);
+
+static int
+r9a06g032_smp_boot_secondary(unsigned int cpu,
+ struct task_struct *idle)
+{
+ if (!cpu_bootaddr)
+ return -ENODEV;
+
+ spin_lock(&cpu_lock);
+
+ writel(__pa_symbol(secondary_startup), cpu_bootaddr);
+ arch_send_wakeup_ipi_mask(cpumask_of(cpu));
+
+ spin_unlock(&cpu_lock);
+
+ return 0;
+}
+
+static void __init r9a06g032_smp_prepare_cpus(unsigned int max_cpus)
+{
+ struct device_node *dn;
+ int ret = -EINVAL, dns;
+ u32 bootaddr;
+
+ dn = of_get_cpu_node(1, NULL);
+ if (!dn) {
+ pr_err("CPU#1: missing device tree node\n");
+ return;
+ }
+ /*
+ * Determine the address from which the CPU is polling.
+ * The bootloader *does* change this property.
+ * Note: The property can be either 64 or 32 bits, so handle both cases
+ */
+ if (of_find_property(dn, "cpu-release-addr", &dns)) {
+ if (dns == sizeof(u64)) {
+ u64 temp;
+
+ ret = of_property_read_u64(dn,
+ "cpu-release-addr", &temp);
+ bootaddr = temp;
+ } else {
+ ret = of_property_read_u32(dn,
+ "cpu-release-addr",
+ &bootaddr);
+ }
+ }
+ of_node_put(dn);
+ if (ret) {
+ pr_err("CPU#1: invalid cpu-release-addr property\n");
+ return;
+ }
+ pr_info("CPU#1: cpu-release-addr %08x\n", bootaddr);
+
+ cpu_bootaddr = ioremap(bootaddr, sizeof(bootaddr));
+}
+
+static const struct smp_operations r9a06g032_smp_ops __initconst = {
+ .smp_prepare_cpus = r9a06g032_smp_prepare_cpus,
+ .smp_boot_secondary = r9a06g032_smp_boot_secondary,
+};
+
+CPU_METHOD_OF_DECLARE(r9a06g032_smp,
+ "renesas,r9a06g032-smp", &r9a06g032_smp_ops);
--
2.11.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/5] soc: r9a06g032: don't build SMP files for non-SMP config
2018-07-20 12:05 [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.19 Simon Horman
2018-07-20 12:05 ` [PATCH 1/5] ARM: shmobile: rcar-gen2: Stop compiling headsmp-apmu on !SMP Simon Horman
2018-07-20 12:05 ` [PATCH 2/5] ARM: shmobile: Add the R9A06G032 SMP enabler driver Simon Horman
@ 2018-07-20 12:05 ` Simon Horman
2018-07-20 12:05 ` [PATCH 4/5] ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill Simon Horman
` (2 subsequent siblings)
5 siblings, 0 replies; 7+ messages in thread
From: Simon Horman @ 2018-07-20 12:05 UTC (permalink / raw)
To: linux-arm-kernel
From: Arnd Bergmann <arnd@arndb.de>
Without CONFIG_SMP, we get a build failure:
In file included from include/linux/byteorder/little_endian.h:5,
from arch/arm/include/uapi/asm/byteorder.h:22,
from include/asm-generic/bitops/le.h:6,
from arch/arm/include/asm/bitops.h:342,
from include/linux/bitops.h:18,
from include/linux/kernel.h:11,
from include/asm-generic/bug.h:18,
from arch/arm/include/asm/bug.h:60,
from include/linux/bug.h:5,
from include/linux/io.h:23,
from drivers/soc/renesas/r9a06g032-smp.c:11:
drivers/soc/renesas/r9a06g032-smp.c: In function 'r9a06g032_smp_boot_secondary':
drivers/soc/renesas/r9a06g032-smp.c:43:21: error: 'secondary_startup' undeclared (first use in this function)
writel(__pa_symbol(secondary_startup), cpu_bootaddr);
^~~~~~~~~~~~~~~~~
This makes the compilation of that file conditional on SMP support.
It would probably be better for consistency to leave that file
in arch/arm/mach-shmobile/, matching what we do for all other smp
operations.
Fixes: cde4f86f9249 ("arm: shmobile: Add the R9A06G032 SMP enabler driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
drivers/soc/renesas/Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile
index 44a0d6b10192..c37b0803c1b6 100644
--- a/drivers/soc/renesas/Makefile
+++ b/drivers/soc/renesas/Makefile
@@ -18,7 +18,9 @@ obj-$(CONFIG_SYSC_R8A77970) += r8a77970-sysc.o
obj-$(CONFIG_SYSC_R8A77980) += r8a77980-sysc.o
obj-$(CONFIG_SYSC_R8A77990) += r8a77990-sysc.o
obj-$(CONFIG_SYSC_R8A77995) += r8a77995-sysc.o
+ifdef CONFIG_SMP
obj-$(CONFIG_ARCH_R9A06G032) += r9a06g032-smp.o
+endif
# Family
obj-$(CONFIG_RST_RCAR) += rcar-rst.o
--
2.11.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 4/5] ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill
2018-07-20 12:05 [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.19 Simon Horman
` (2 preceding siblings ...)
2018-07-20 12:05 ` [PATCH 3/5] soc: r9a06g032: don't build SMP files for non-SMP config Simon Horman
@ 2018-07-20 12:05 ` Simon Horman
2018-07-20 12:05 ` [PATCH 5/5] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15 Simon Horman
2018-07-21 21:20 ` [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.19 Olof Johansson
5 siblings, 0 replies; 7+ messages in thread
From: Simon Horman @ 2018-07-20 12:05 UTC (permalink / raw)
To: linux-arm-kernel
From: Arnd Bergmann <arnd@arndb.de>
After the cleanup in r8a7779_smp_prepare_cpus(), the only remaining caller of
r8a7779_platform_cpu_kill() is in an ifdef, which leads to a build warning
without CONFIG_HOTPLUG_CPU:
arch/arm/mach-shmobile/smp-r8a7779.c:26:12: error: 'r8a7779_platform_cpu_kill' defined but not used [-Werror=unused-function]
This moves the function inside of that #ifdef to avoid the warning.
Fixes: 62f55ce683e3 ("ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/smp-r8a7779.c | 22 +++++++++++-----------
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm/mach-shmobile/smp-r8a7779.c b/arch/arm/mach-shmobile/smp-r8a7779.c
index b7fe1f489b08..0ed73b650c14 100644
--- a/arch/arm/mach-shmobile/smp-r8a7779.c
+++ b/arch/arm/mach-shmobile/smp-r8a7779.c
@@ -23,17 +23,6 @@
#define AVECR IOMEM(0xfe700040)
#define R8A7779_SCU_BASE 0xf0000000
-static int r8a7779_platform_cpu_kill(unsigned int cpu)
-{
- int ret = -EIO;
-
- cpu = cpu_logical_map(cpu);
- if (cpu)
- ret = rcar_sysc_power_down_cpu(cpu);
-
- return ret ? ret : 1;
-}
-
static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int ret = -EIO;
@@ -55,6 +44,17 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
}
#ifdef CONFIG_HOTPLUG_CPU
+static int r8a7779_platform_cpu_kill(unsigned int cpu)
+{
+ int ret = -EIO;
+
+ cpu = cpu_logical_map(cpu);
+ if (cpu)
+ ret = rcar_sysc_power_down_cpu(cpu);
+
+ return ret ? ret : 1;
+}
+
static int r8a7779_cpu_kill(unsigned int cpu)
{
if (shmobile_smp_scu_cpu_kill(cpu))
--
2.11.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 5/5] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15
2018-07-20 12:05 [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.19 Simon Horman
` (3 preceding siblings ...)
2018-07-20 12:05 ` [PATCH 4/5] ARM: shmobile: r8a7779: hide unused r8a7779_platform_cpu_kill Simon Horman
@ 2018-07-20 12:05 ` Simon Horman
2018-07-21 21:20 ` [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.19 Olof Johansson
5 siblings, 0 replies; 7+ messages in thread
From: Simon Horman @ 2018-07-20 12:05 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
Cortex-A15 CPU cores, all of which have ARM architectured timers.
Force use of the ARM architectured timer on these SoCs.
This allows to:
- Remove the calls to shmobile_init_delay() from the corresponding
machine vectors,
- Remove a check in timer setup specific to R-Car Gen2,
- Remove a check in shmobile_init_delay().
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm/mach-shmobile/Kconfig | 2 ++
arch/arm/mach-shmobile/setup-r8a73a4.c | 1 -
arch/arm/mach-shmobile/setup-rcar-gen2.c | 4 ----
arch/arm/mach-shmobile/timer.c | 8 --------
4 files changed, 2 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index 0b67254eabb2..aeb2eed08598 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -15,6 +15,7 @@ config ARCH_RCAR_GEN1
config ARCH_RCAR_GEN2
bool
+ select HAVE_ARM_ARCH_TIMER
select PM
select PM_GENERIC_DOMAINS
select RENESAS_IRQC
@@ -58,6 +59,7 @@ config ARCH_R8A73A4
bool "R-Mobile APE6 (R8A73A40)"
select ARCH_RMOBILE
select ARM_ERRATA_798181 if SMP
+ select HAVE_ARM_ARCH_TIMER
select RENESAS_IRQC
config ARCH_R8A7740
diff --git a/arch/arm/mach-shmobile/setup-r8a73a4.c b/arch/arm/mach-shmobile/setup-r8a73a4.c
index ef391fa368e9..23a29a0ea9c9 100644
--- a/arch/arm/mach-shmobile/setup-r8a73a4.c
+++ b/arch/arm/mach-shmobile/setup-r8a73a4.c
@@ -18,7 +18,6 @@ static const char *const r8a73a4_boards_compat_dt[] __initconst = {
};
DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
- .init_early = shmobile_init_delay,
.init_late = shmobile_init_late,
.dt_compat = r8a73a4_boards_compat_dt,
MACHINE_END
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index 117531367f17..013acc97795c 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -59,7 +59,6 @@ static unsigned int __init get_extal_freq(void)
void __init rcar_gen2_timer_init(void)
{
-#ifdef CONFIG_ARM_ARCH_TIMER
void __iomem *base;
u32 freq;
@@ -101,7 +100,6 @@ void __init rcar_gen2_timer_init(void)
}
iounmap(base);
-#endif /* CONFIG_ARM_ARCH_TIMER */
of_clk_init(NULL);
timer_probe();
@@ -187,7 +185,6 @@ static const char * const rcar_gen2_boards_compat_dt[] __initconst = {
};
DT_MACHINE_START(RCAR_GEN2_DT, "Generic R-Car Gen2 (Flattened Device Tree)")
- .init_early = shmobile_init_delay,
.init_late = shmobile_init_late,
.init_time = rcar_gen2_timer_init,
.reserve = rcar_gen2_reserve,
@@ -202,7 +199,6 @@ static const char * const rz_g1_boards_compat_dt[] __initconst = {
};
DT_MACHINE_START(RZ_G1_DT, "Generic RZ/G1 (Flattened Device Tree)")
- .init_early = shmobile_init_delay,
.init_late = shmobile_init_late,
.init_time = rcar_gen2_timer_init,
.reserve = rcar_gen2_reserve,
diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c
index 6196a6380385..828e8aea037e 100644
--- a/arch/arm/mach-shmobile/timer.c
+++ b/arch/arm/mach-shmobile/timer.c
@@ -32,14 +32,6 @@ void __init shmobile_init_delay(void)
for_each_child_of_node(cpus, np) {
u32 freq;
- if (IS_ENABLED(CONFIG_ARM_ARCH_TIMER) &&
- (of_device_is_compatible(np, "arm,cortex-a7") ||
- of_device_is_compatible(np, "arm,cortex-a15"))) {
- of_node_put(np);
- of_node_put(cpus);
- return;
- }
-
if (!of_property_read_u32(np, "clock-frequency", &freq))
max_freq = max(max_freq, freq);
}
--
2.11.0
^ permalink raw reply related [flat|nested] 7+ messages in thread* [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.19
2018-07-20 12:05 [GIT PULL] Second Round of Renesas ARM Based SoC Updates for v4.19 Simon Horman
` (4 preceding siblings ...)
2018-07-20 12:05 ` [PATCH 5/5] ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15 Simon Horman
@ 2018-07-21 21:20 ` Olof Johansson
5 siblings, 0 replies; 7+ messages in thread
From: Olof Johansson @ 2018-07-21 21:20 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jul 20, 2018 at 02:05:30PM +0200, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these second round of Renesas ARM based SoC updates for v4.19.
>
> This pull request is based on the previous round of
> such requests, tagged as renesas-arm-soc-for-v4.19,
> which I have already sent a pull-request for.
>
>
> The following changes since commit c44e182e537492baaa37303fc0ee299222fce921:
>
> ARM: shmobile: convert to SPDX identifier (2018-06-18 12:00:29 +0200)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm-soc2-for-v4.19
>
> for you to fetch changes up to 54f464e0c91f10212fa5699bfef1f104ee7d2213:
>
> ARM: shmobile: Always enable ARCH_TIMER on SoCs with A7 and/or A15 (2018-07-20 13:44:10 +0200)
>
> ----------------------------------------------------------------
> Second Round of Renesas ARM Based SoC Updates for v4.19
>
> * Always enable ARCH_TIMER on SoCs with A7 or A15
>
> All such SoCs have ARCH_TIMER so there is no need for it to be optional.
> This allows clean-up which is included in this change.
>
> * Do not compile r8a7779_platform_cpu_kill when it is unused
>
> This avoids a warning by shuffling code into an existing #ifdef
> r8a7779 is the R-Car H1 SoC
>
> * Add SMP enabler driver for the RZ/N1D (r9a06g032) SoC
>
> This is to allow SMP to be enabled via DT on the r9a06g032
>
> * Stop compiling headsmp-apmu for non-SMP configs
>
> This is a minor clean-up allowing removal of an #ifdef
Merged, thanks! Nice tag description.
-Olof
^ permalink raw reply [flat|nested] 7+ messages in thread