From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Linus Walleij <linus.walleij@linaro.org>,
linux-kernel@vger.kernel.org, stable@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] pinctrl: sunxi: a83t: Fix IRQ offset typo for PH11
Date: Tue, 4 Dec 2018 10:12:04 +0100 [thread overview]
Message-ID: <20181204091204.jtzk5gf2clumjwiq@flea> (raw)
In-Reply-To: <20181204090457.15597-1-wens@csie.org>
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On Tue, Dec 04, 2018 at 05:04:57PM +0800, Chen-Yu Tsai wrote:
> Pin PH11 is used on various A83T board to detect a change in the OTG
> port's ID pin, as in when an OTG host cable is plugged in.
>
> The incorrect offset meant the gpiochip/irqchip was activating the wrong
> pin for interrupts.
>
> Fixes: 4730f33f0d82 ("pinctrl: sunxi: add allwinner A83T PIO controller support")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2018-12-04 9:12 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 9:04 [PATCH] pinctrl: sunxi: a83t: Fix IRQ offset typo for PH11 Chen-Yu Tsai
2018-12-04 9:12 ` Maxime Ripard [this message]
2018-12-07 12:32 ` Linus Walleij
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