* [PATCH 1/3] ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pins @ 2018-12-18 21:24 Karl Palsson 2018-12-18 21:24 ` [PATCH 2/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2 Karl Palsson 2018-12-18 21:24 ` [PATCH 3/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2-IoT Box Karl Palsson 0 siblings, 2 replies; 6+ messages in thread From: Karl Palsson @ 2018-12-18 21:24 UTC (permalink / raw) To: robh+dt, mark.rutland, maxime.ripard, wens, devicetree, linux-kernel, linux-arm-kernel Cc: Karl Palsson uart1 and uart3 had existing pin definitions for the rts/cts pairs. Add definitions for uart2 as well. Signed-off-by: Karl Palsson <karlp@tweak.net.au> --- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index a4c757c0b741..38d3deefa0e3 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -472,6 +472,11 @@ function = "uart2"; }; + uart2_rts_cts_pins: uart2_rts_cts { + pins = "PA2", "PA3"; + function = "uart2"; + }; + uart3_pins: uart3 { pins = "PA13", "PA14"; function = "uart3"; -- 2.14.5 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2 2018-12-18 21:24 [PATCH 1/3] ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pins Karl Palsson @ 2018-12-18 21:24 ` Karl Palsson 2018-12-19 7:08 ` Maxime Ripard 2018-12-18 21:24 ` [PATCH 3/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2-IoT Box Karl Palsson 1 sibling, 1 reply; 6+ messages in thread From: Karl Palsson @ 2018-12-18 21:24 UTC (permalink / raw) To: robh+dt, mark.rutland, maxime.ripard, wens, devicetree, linux-kernel, linux-arm-kernel Cc: Karl Palsson This is an Allwinner H3 based board, with 512MB ram, a USB OTG port, microsd slot, an onboard AP6212A wifi/bluetooth module, and a CSI connector. Full details and schematic available from vendor: http://wiki.friendlyarm.com/wiki/index.php/NanoPi_Duo2 Signed-off-by: Karl Palsson <karlp@tweak.net.au> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts | 148 +++++++++++++++++++++++++++++ 2 files changed, 149 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 78551c4375d5..7f296bfea94a 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1063,6 +1063,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-h3-beelink-x2.dtb \ sun8i-h3-libretech-all-h3-cc.dtb \ sun8i-h3-mapleboard-mp130.dtb \ + sun8i-h3-nanopi-duo2.dtb \ sun8i-h3-nanopi-m1.dtb \ sun8i-h3-nanopi-m1-plus.dtb \ sun8i-h3-nanopi-neo.dtb \ diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts new file mode 100644 index 000000000000..07d2f1bebd56 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2018 Karl Palsson <karlp@tweak.net.au> + */ + +/dts-v1/; +#include "sun8i-h3.dtsi" +#include "sunxi-common-regulators.dtsi" + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> + +/ { + model = "FriendlyARM NanoPi Duo2"; + compatible = "friendlyarm,nanopi-duo2", "allwinner,sun8i-h3"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + status { + label = "nanopi:green:status"; + gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + pwr { + label = "nanopi:red:pwr"; + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + r_gpio_keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&sw_r_npi>; + + k1 { + label = "k1"; + linux,code = <BTN_0>; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + }; + }; + + reg_vdd_cpux: vdd-cpux-regulator { + compatible = "regulator-gpio"; + regulator-name = "vdd-cpux"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-ramp-delay = <50>; /* 4ms */ + + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ + enable-active-high; + gpios-states = <0x1>; + states = <1100000 0x0 + 1300000 0x1>; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ + }; + +}; + +&cpu0 { + cpu-supply = <®_vdd_cpux>; +}; + +&usb_otg { + status = "okay"; + dr_mode = "otg"; +}; + +&ehci0 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +®_usb0_vbus { + gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ + status = "okay"; +}; + +&r_pio { + sw_r_npi: key_pins { + pins = "PL3"; + function = "gpio_in"; + }; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ + usb0_vbus-supply = <®_usb0_vbus>; + status = "okay"; +}; + +&mmc0 { + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; + status = "okay"; + vmmc-supply = <®_vcc3v3>; +}; + +&mmc1 { + vmmc-supply = <®_vcc3v3>; + vqmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + sdio_wifi: sdio_wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&pio>; + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ + interrupt-names = "host-wake"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins_a>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>; + uart-has-rtscts; + status = "okay"; + + /* bluetooth goes here */ +}; -- 2.14.5 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 2/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2 2018-12-18 21:24 ` [PATCH 2/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2 Karl Palsson @ 2018-12-19 7:08 ` Maxime Ripard 0 siblings, 0 replies; 6+ messages in thread From: Maxime Ripard @ 2018-12-19 7:08 UTC (permalink / raw) To: Karl Palsson Cc: mark.rutland, devicetree, linux-kernel, wens, robh+dt, linux-arm-kernel Hi, On Tue, Dec 18, 2018 at 09:24:56PM +0000, Karl Palsson wrote: > This is an Allwinner H3 based board, with 512MB ram, a USB OTG port, > microsd slot, an onboard AP6212A wifi/bluetooth module, and a CSI > connector. > > Full details and schematic available from vendor: > http://wiki.friendlyarm.com/wiki/index.php/NanoPi_Duo2 > > Signed-off-by: Karl Palsson <karlp@tweak.net.au> > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts | 148 +++++++++++++++++++++++++++++ > 2 files changed, 149 insertions(+) > create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 78551c4375d5..7f296bfea94a 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -1063,6 +1063,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ > sun8i-h3-beelink-x2.dtb \ > sun8i-h3-libretech-all-h3-cc.dtb \ > sun8i-h3-mapleboard-mp130.dtb \ > + sun8i-h3-nanopi-duo2.dtb \ > sun8i-h3-nanopi-m1.dtb \ > sun8i-h3-nanopi-m1-plus.dtb \ > sun8i-h3-nanopi-neo.dtb \ > diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts > new file mode 100644 > index 000000000000..07d2f1bebd56 > --- /dev/null > +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts > @@ -0,0 +1,148 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (C) 2018 Karl Palsson <karlp@tweak.net.au> > + */ > + > +/dts-v1/; > +#include "sun8i-h3.dtsi" > +#include "sunxi-common-regulators.dtsi" > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/input/input.h> > + > +/ { > + model = "FriendlyARM NanoPi Duo2"; > + compatible = "friendlyarm,nanopi-duo2", "allwinner,sun8i-h3"; > + > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + status { > + label = "nanopi:green:status"; > + gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; > + linux,default-trigger = "heartbeat"; > + }; > + > + pwr { > + label = "nanopi:red:pwr"; > + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; > + default-state = "on"; > + }; > + }; > + > + r_gpio_keys { > + compatible = "gpio-keys"; > + pinctrl-names = "default"; > + pinctrl-0 = <&sw_r_npi>; > + > + k1 { > + label = "k1"; > + linux,code = <BTN_0>; > + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; > + }; > + }; > + > + reg_vdd_cpux: vdd-cpux-regulator { > + compatible = "regulator-gpio"; > + regulator-name = "vdd-cpux"; > + regulator-boot-on; > + regulator-always-on; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1300000>; > + regulator-ramp-delay = <50>; /* 4ms */ > + > + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ > + enable-active-high; > + gpios-states = <0x1>; > + states = <1100000 0x0 > + 1300000 0x1>; > + }; > + > + wifi_pwrseq: wifi_pwrseq { > + compatible = "mmc-pwrseq-simple"; > + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ > + }; > + > +}; > + > +&cpu0 { > + cpu-supply = <®_vdd_cpux>; > +}; > + > +&usb_otg { > + status = "okay"; > + dr_mode = "otg"; > +}; > + > +&ehci0 { > + status = "okay"; > +}; > + > +&ohci0 { > + status = "okay"; > +}; > + > +®_usb0_vbus { > + gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ > + status = "okay"; > +}; > + > +&r_pio { > + sw_r_npi: key_pins { > + pins = "PL3"; > + function = "gpio_in"; > + }; > +}; This node isn't needed you can just remove it > +&usbphy { > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ > + usb0_vbus-supply = <®_usb0_vbus>; > + status = "okay"; > +}; > + > +&mmc0 { > + bus-width = <4>; > + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; > + status = "okay"; > + vmmc-supply = <®_vcc3v3>; > +}; > + > +&mmc1 { > + vmmc-supply = <®_vcc3v3>; > + vqmmc-supply = <®_vcc3v3>; > + mmc-pwrseq = <&wifi_pwrseq>; > + bus-width = <4>; > + non-removable; > + status = "okay"; > + > + sdio_wifi: sdio_wifi@1 { > + reg = <1>; > + compatible = "brcm,bcm4329-fmac"; > + interrupt-parent = <&pio>; > + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ > + interrupt-names = "host-wake"; > + }; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_pins_a>; > + status = "okay"; > +}; > + > +&uart2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>; > + uart-has-rtscts; > + status = "okay"; > + > + /* bluetooth goes here */ The patches for the bluetooth support using serdev by Chen-Yu just got in: http://lists.infradead.org/pipermail/linux-arm-kernel/2018-December/621207.html Ideally, you should put a dt node for the bluetooth part here. Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 3/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2-IoT Box 2018-12-18 21:24 [PATCH 1/3] ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pins Karl Palsson 2018-12-18 21:24 ` [PATCH 2/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2 Karl Palsson @ 2018-12-18 21:24 ` Karl Palsson 1 sibling, 0 replies; 6+ messages in thread From: Karl Palsson @ 2018-12-18 21:24 UTC (permalink / raw) To: robh+dt, mark.rutland, maxime.ripard, wens, devicetree, linux-kernel, linux-arm-kernel Cc: Karl Palsson The IoT-Box is a dock for the NanoPi Duo2, adding two USB host ports, a 10/100 ethernet port, a variety of pin headers for i2c and uarts, and a quad band 2G GSM module, a SIM800C. Full documentation and schematics available from vendor: http://wiki.friendlyarm.com/wiki/index.php/NanoPi_Duo2_IoT-Box Signed-off-by: Karl Palsson <karlp@tweak.net.au> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/sun8i-h3-nanopi-duo2-iotbox.dts | 45 +++++++++++++++++++++++ 2 files changed, 46 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-duo2-iotbox.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 7f296bfea94a..b62d84639c7a 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1064,6 +1064,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-h3-libretech-all-h3-cc.dtb \ sun8i-h3-mapleboard-mp130.dtb \ sun8i-h3-nanopi-duo2.dtb \ + sun8i-h3-nanopi-duo2-iotbox.dtb \ sun8i-h3-nanopi-m1.dtb \ sun8i-h3-nanopi-m1-plus.dtb \ sun8i-h3-nanopi-neo.dtb \ diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2-iotbox.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2-iotbox.dts new file mode 100644 index 000000000000..4e7fae4046a8 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2-iotbox.dts @@ -0,0 +1,45 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2018 Karl Palsson <karlp@tweak.net.au> + */ + +#include "sun8i-h3-nanopi-duo2.dts" + +/ { + model = "FriendlyARM NanoPi Duo2 IoT Box"; + compatible = "friendlyarm,nanopi-duo2-iotbox", + "friendlyarm,nanopi-duo2", + "allwinner,sun8i-h3"; +}; + +&ehci2 { + status = "okay"; +}; + +&ehci3 { + status = "okay"; +}; + +&ohci2 { + status = "okay"; +}; + +&ohci3 { + status = "okay"; +}; + +&emac { + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; + status = "okay"; +}; + +/* Not addressed, SIM800C module on uart3 */ +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>; + uart-has-rtscts; + status = "okay"; +}; + -- 2.14.5 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 6+ messages in thread
[parent not found: <20191031231216.30903-2-karlp@tweak.net.au>]
* Re: [PATCH 2/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2 [not found] <20191031231216.30903-2-karlp@tweak.net.au> @ 2019-11-01 3:01 ` Chen-Yu Tsai 2019-11-01 9:08 ` Maxime Ripard 1 sibling, 0 replies; 6+ messages in thread From: Chen-Yu Tsai @ 2019-11-01 3:01 UTC (permalink / raw) To: Karl Palsson; +Cc: linux-arm-kernel, Maxime Ripard, linux-kernel On Fri, Nov 1, 2019 at 7:12 AM Karl Palsson <karlp@tweak.net.au> wrote: > > This is an Allwinner H3 based board, with 512MB ram, a USB OTG port, > microsd slot, an onboard AP6212A wifi/bluetooth module, and a CSI > connector. > > Full details and schematic available from vendor: > http://wiki.friendlyarm.com/wiki/index.php/NanoPi_Duo2 > > Signed-off-by: Karl Palsson <karlp@tweak.net.au> > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts | 161 +++++++++++++++++++++ > 2 files changed, 162 insertions(+) > create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 9159fa2cea90..d8bf02abcda1 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -1096,6 +1096,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ > sun8i-h3-beelink-x2.dtb \ > sun8i-h3-libretech-all-h3-cc.dtb \ > sun8i-h3-mapleboard-mp130.dtb \ > + sun8i-h3-nanopi-duo2.dtb \ > sun8i-h3-nanopi-m1.dtb \ > sun8i-h3-nanopi-m1-plus.dtb \ > sun8i-h3-nanopi-neo.dtb \ > diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts > new file mode 100644 > index 000000000000..ecfaaa0ec73e > --- /dev/null > +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts > @@ -0,0 +1,161 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (C) 2019 Karl Palsson <karlp@tweak.net.au> > + */ > + > +/dts-v1/; > +#include "sun8i-h3.dtsi" > +#include "sunxi-common-regulators.dtsi" > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/input/input.h> > + > +/ { > + model = "FriendlyARM NanoPi Duo2"; > + compatible = "friendlyarm,nanopi-duo2", "allwinner,sun8i-h3"; > + > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + status { > + label = "nanopi:green:status"; > + gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; Can you add the pin name as a comment after this, like you already have for most of the other gpios entries? > + linux,default-trigger = "heartbeat"; I'm not so found of this. Unless the LED actually says "heartbeat", I don't think we should force a default. > + }; > + > + pwr { > + label = "nanopi:red:pwr"; > + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; Here as well. > + default-state = "on"; > + }; > + }; > + > + r_gpio_keys { > + compatible = "gpio-keys"; > + > + k1 { > + label = "k1"; > + linux,code = <BTN_0>; > + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; > + }; > + }; > + > + reg_vdd_cpux: vdd-cpux-regulator { > + compatible = "regulator-gpio"; > + regulator-name = "vdd-cpux"; > + regulator-boot-on; > + regulator-always-on; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1300000>; > + regulator-ramp-delay = <50>; /* 4ms */ > + > + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ This regulator also uses a GPIO line for its enable pin. Please include that. > + enable-active-high; > + gpios-states = <0x1>; > + states = <1100000 0x0 > + 1300000 0x1>; > + }; Please also add the two other regulators, VDD-SYS and VCC-DRAM. > + > + wifi_pwrseq: wifi_pwrseq { > + compatible = "mmc-pwrseq-simple"; > + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ > + clocks = <&rtc 1>; > + clock-names = "ext_clock"; > + }; > + > +}; > + > +&cpu0 { > + cpu-supply = <®_vdd_cpux>; > +}; > + > +&usb_otg { > + status = "okay"; > + dr_mode = "otg"; > +}; > + > +&ehci0 { > + status = "okay"; > +}; > + > +&ohci0 { > + status = "okay"; > +}; > + > +®_usb0_vbus { > + gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ > + status = "okay"; > +}; > + > +&usbphy { > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ > + usb0_vbus-supply = <®_usb0_vbus>; > + status = "okay"; > +}; Please have the nodes in alphabetic order, not group them by function. > + > +&mmc0 { > + bus-width = <4>; > + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; > + status = "okay"; > + vmmc-supply = <®_vcc3v3>; > +}; > + > +&mmc1 { > + vmmc-supply = <®_vcc3v3>; > + vqmmc-supply = <®_vcc3v3>; > + mmc-pwrseq = <&wifi_pwrseq>; > + bus-width = <4>; > + non-removable; > + status = "okay"; > + > + sdio_wifi: sdio_wifi@1 { > + reg = <1>; > + compatible = "brcm,bcm4329-fmac"; > + interrupt-parent = <&pio>; > + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ > + interrupt-names = "host-wake"; > + }; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_pa_pins>; > + status = "okay"; > +}; > + > +&uart2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>; > + uart-has-rtscts; > + status = "okay"; > + > + bluetooth { > + compatible = "brcm,bcm43438-bt"; > + //clocks = <&osc32k 1>; > + clocks = <&rtc 1>; // this is what bananapi-m2-zero does, and it has same schematic... Yes, this is the correct setup. The module is taking the clock from the X32KFOUT on the SoC. This is an external output from the RTC module. > + clock-names = "lpo"; > + > + // these are both fine.. > + vbat-supply = <®_vcc3v3>; > + vddio-supply = <®_vcc3v3>; > + // on opi-win, device-wakup is pl6 is AP-WAKE-BT is module pin 6, bt-wake. > + // YES; PA8 is correct. > + device-wakeup-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ > + > + // on opi-win, hostwakeup (pl5) is bt-wake-ap is module pin 7, bt-host-wake > + // YES; PA7 is correct > + host-wakeup-gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */ > + > + // on opi-win, shutdown is pl4, is BT-RST-N is moduel pin 34 > + // YES; PG13 is correct. I'm guessing all these comments are from your development cycle? Please remove them. > + shutdown-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */ > + }; > +}; The board also has SPI flash. Can you add that as well? Thanks ChenYu > -- > 2.20.1 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2 [not found] <20191031231216.30903-2-karlp@tweak.net.au> 2019-11-01 3:01 ` [PATCH 2/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2 Chen-Yu Tsai @ 2019-11-01 9:08 ` Maxime Ripard 1 sibling, 0 replies; 6+ messages in thread From: Maxime Ripard @ 2019-11-01 9:08 UTC (permalink / raw) To: Karl Palsson; +Cc: wens, linux-kernel, linux-arm-kernel [-- Attachment #1.1: Type: text/plain, Size: 5283 bytes --] Hi, On Thu, Oct 31, 2019 at 11:12:15PM +0000, Karl Palsson wrote: > This is an Allwinner H3 based board, with 512MB ram, a USB OTG port, > microsd slot, an onboard AP6212A wifi/bluetooth module, and a CSI > connector. > > Full details and schematic available from vendor: > http://wiki.friendlyarm.com/wiki/index.php/NanoPi_Duo2 > > Signed-off-by: Karl Palsson <karlp@tweak.net.au> > --- > arch/arm/boot/dts/Makefile | 1 + > arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts | 161 +++++++++++++++++++++ > 2 files changed, 162 insertions(+) > create mode 100644 arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts > > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile > index 9159fa2cea90..d8bf02abcda1 100644 > --- a/arch/arm/boot/dts/Makefile > +++ b/arch/arm/boot/dts/Makefile > @@ -1096,6 +1096,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ > sun8i-h3-beelink-x2.dtb \ > sun8i-h3-libretech-all-h3-cc.dtb \ > sun8i-h3-mapleboard-mp130.dtb \ > + sun8i-h3-nanopi-duo2.dtb \ > sun8i-h3-nanopi-m1.dtb \ > sun8i-h3-nanopi-m1-plus.dtb \ > sun8i-h3-nanopi-neo.dtb \ > diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts > new file mode 100644 > index 000000000000..ecfaaa0ec73e > --- /dev/null > +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts > @@ -0,0 +1,161 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (C) 2019 Karl Palsson <karlp@tweak.net.au> > + */ > + > +/dts-v1/; > +#include "sun8i-h3.dtsi" > +#include "sunxi-common-regulators.dtsi" > + > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/input/input.h> > + > +/ { > + model = "FriendlyARM NanoPi Duo2"; > + compatible = "friendlyarm,nanopi-duo2", "allwinner,sun8i-h3"; This needs to be added to Documentation/devicetree/bindings/arm/sunxi.yaml > + > + aliases { > + serial0 = &uart0; > + }; > + > + chosen { > + stdout-path = "serial0:115200n8"; > + }; > + > + leds { > + compatible = "gpio-leds"; > + > + status { > + label = "nanopi:green:status"; > + gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; > + linux,default-trigger = "heartbeat"; > + }; > + > + pwr { > + label = "nanopi:red:pwr"; > + gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; > + default-state = "on"; > + }; > + }; > + > + r_gpio_keys { > + compatible = "gpio-keys"; > + > + k1 { > + label = "k1"; > + linux,code = <BTN_0>; > + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; > + }; > + }; > + > + reg_vdd_cpux: vdd-cpux-regulator { > + compatible = "regulator-gpio"; > + regulator-name = "vdd-cpux"; > + regulator-boot-on; > + regulator-always-on; > + regulator-min-microvolt = <1100000>; > + regulator-max-microvolt = <1300000>; > + regulator-ramp-delay = <50>; /* 4ms */ > + > + gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ > + enable-active-high; > + gpios-states = <0x1>; > + states = <1100000 0x0 > + 1300000 0x1>; > + }; > + > + wifi_pwrseq: wifi_pwrseq { > + compatible = "mmc-pwrseq-simple"; > + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ > + clocks = <&rtc 1>; > + clock-names = "ext_clock"; > + }; > + > +}; > + > +&cpu0 { > + cpu-supply = <®_vdd_cpux>; > +}; > + > +&usb_otg { > + status = "okay"; > + dr_mode = "otg"; > +}; > + > +&ehci0 { > + status = "okay"; > +}; > + > +&ohci0 { > + status = "okay"; > +}; > + > +®_usb0_vbus { > + gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */ > + status = "okay"; > +}; > + > +&usbphy { > + usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ > + usb0_vbus-supply = <®_usb0_vbus>; > + status = "okay"; > +}; > + > +&mmc0 { > + bus-width = <4>; > + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; > + status = "okay"; > + vmmc-supply = <®_vcc3v3>; > +}; Nodes should be ordered alphabetically. > +&mmc1 { > + vmmc-supply = <®_vcc3v3>; > + vqmmc-supply = <®_vcc3v3>; > + mmc-pwrseq = <&wifi_pwrseq>; > + bus-width = <4>; > + non-removable; > + status = "okay"; > + > + sdio_wifi: sdio_wifi@1 { > + reg = <1>; > + compatible = "brcm,bcm4329-fmac"; > + interrupt-parent = <&pio>; > + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ > + interrupt-names = "host-wake"; > + }; > +}; > + > +&uart0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart0_pa_pins>; > + status = "okay"; > +}; > + > +&uart2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>; > + uart-has-rtscts; > + status = "okay"; > + > + bluetooth { > + compatible = "brcm,bcm43438-bt"; > + //clocks = <&osc32k 1>; > + clocks = <&rtc 1>; // this is what bananapi-m2-zero does, and it has same schematic... > + clock-names = "lpo"; > + > + // these are both fine.. > + vbat-supply = <®_vcc3v3>; > + vddio-supply = <®_vcc3v3>; > + // on opi-win, device-wakup is pl6 is AP-WAKE-BT is module pin 6, bt-wake. > + // YES; PA8 is correct. > + device-wakeup-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */ > + > + // on opi-win, hostwakeup (pl5) is bt-wake-ap is module pin 7, bt-host-wake > + // YES; PA7 is correct > + host-wakeup-gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */ > + > + // on opi-win, shutdown is pl4, is BT-RST-N is moduel pin 34 > + // YES; PG13 is correct. > + shutdown-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */ > + }; > +}; I'm not sure we need all these comments Maxime [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 176 bytes --] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-11-01 9:44 UTC | newest]
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2018-12-18 21:24 [PATCH 1/3] ARM: dts: sunxi: h3/h5: add missing uart2 rts/cts pins Karl Palsson
2018-12-18 21:24 ` [PATCH 2/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2 Karl Palsson
2018-12-19 7:08 ` Maxime Ripard
2018-12-18 21:24 ` [PATCH 3/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2-IoT Box Karl Palsson
[not found] <20191031231216.30903-2-karlp@tweak.net.au>
2019-11-01 3:01 ` [PATCH 2/3] ARM: dts: sun8i: add FriendlyARM NanoPi Duo2 Chen-Yu Tsai
2019-11-01 9:08 ` Maxime Ripard
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