From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: linux-arm-kernel@lists.infradead.org, linus.walleij@linaro.org
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
amit.kucheria@linaro.org, darren.tsao@bitmain.com,
linux-gpio@vger.kernel.org, haitao.suo@bitmain.com
Subject: Re: [PATCH 1/2] arm64: dts: bitmain: Add GPIO support for BM1880 SoC
Date: Thu, 7 Mar 2019 22:54:26 +0530 [thread overview]
Message-ID: <20190307172426.GA9268@Mani-XPS-13-9360> (raw)
In-Reply-To: <20190226115022.19022-1-manivannan.sadhasivam@linaro.org>
On Tue, Feb 26, 2019 at 05:20:21PM +0530, Manivannan Sadhasivam wrote:
> Add GPIO support for Bitmain BM1880 SoC based on Designware APB GPIO
> controller IP. IP exposes 3 GPIO controllers with a total of 72 pins.
>
Applied for v5.2 with Linus's Reviewed-by tag.
Thanks,
Mani
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> arch/arm64/boot/dts/bitmain/bm1880.dtsi | 54 +++++++++++++++++++++++++
> 1 file changed, 54 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
> index 55a4769e0de2..e4da4ec6a5ee 100644
> --- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi
> +++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
> @@ -80,6 +80,60 @@
> #interrupt-cells = <3>;
> };
>
> + gpio0: gpio@50027000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dw-apb-gpio";
> + reg = <0x0 0x50027000 0x0 0x400>;
> +
> + porta: gpio-controller@0 {
> + compatible = "snps,dw-apb-gpio-port";
> + gpio-controller;
> + #gpio-cells = <2>;
> + snps,nr-gpios = <32>;
> + reg = <0>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
> + };
> + };
> +
> + gpio1: gpio@50027400 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dw-apb-gpio";
> + reg = <0x0 0x50027400 0x0 0x400>;
> +
> + portb: gpio-controller@0 {
> + compatible = "snps,dw-apb-gpio-port";
> + gpio-controller;
> + #gpio-cells = <2>;
> + snps,nr-gpios = <32>;
> + reg = <0>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
> + };
> + };
> +
> + gpio2: gpio@50027800 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dw-apb-gpio";
> + reg = <0x0 0x50027800 0x0 0x400>;
> +
> + portc: gpio-controller@0 {
> + compatible = "snps,dw-apb-gpio-port";
> + gpio-controller;
> + #gpio-cells = <2>;
> + snps,nr-gpios = <8>;
> + reg = <0>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
> + };
> + };
> +
> uart0: serial@58018000 {
> compatible = "snps,dw-apb-uart";
> reg = <0x0 0x58018000 0x0 0x2000>;
> --
> 2.17.1
>
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prev parent reply other threads:[~2019-03-07 17:24 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-26 11:50 [PATCH 1/2] arm64: dts: bitmain: Add GPIO support for BM1880 SoC Manivannan Sadhasivam
2019-02-26 11:50 ` [PATCH 2/2] arm64: dts: bitmain: Add GPIO Line names for Sophon Edge board Manivannan Sadhasivam
2019-03-05 7:55 ` Linus Walleij
2019-03-07 17:25 ` Manivannan Sadhasivam
2019-03-05 7:55 ` [PATCH 1/2] arm64: dts: bitmain: Add GPIO support for BM1880 SoC Linus Walleij
2019-03-07 17:24 ` Manivannan Sadhasivam [this message]
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