From: Icenowy Zheng <icenowy@aosc.io>
To: Rob Herring <robh+dt@kernel.org>,
Maxime Ripard <maxime.ripard@bootlin.com>,
Chen-Yu Tsai <wens@csie.org>,
Linus Walleij <linus.walleij@linaro.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-sunxi@googlegroups.com,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH v2 08/11] ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs
Date: Tue, 11 Jun 2019 22:09:37 +0800 [thread overview]
Message-ID: <20190611140940.14357-9-icenowy@aosc.io> (raw)
In-Reply-To: <20190611140940.14357-1-icenowy@aosc.io>
The Allwinner S3/S3L/V3 SoCs all share the same die with the V3s SoC,
but with more GPIO wired out of the package.
Add DTSI files for these SoCs. The DTSI file for V3 just replaces the
pinctrl compatible string, and the S3/S3L DTSI files just include the V3
DTSI file.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
No changes in v2.
arch/arm/boot/dts/sun8i-s3.dtsi | 6 ++++++
arch/arm/boot/dts/sun8i-s3l.dtsi | 6 ++++++
arch/arm/boot/dts/sun8i-v3.dtsi | 14 ++++++++++++++
3 files changed, 26 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8i-s3.dtsi
create mode 100644 arch/arm/boot/dts/sun8i-s3l.dtsi
create mode 100644 arch/arm/boot/dts/sun8i-v3.dtsi
diff --git a/arch/arm/boot/dts/sun8i-s3.dtsi b/arch/arm/boot/dts/sun8i-s3.dtsi
new file mode 100644
index 000000000000..0f41a25ecb30
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-s3.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
+ */
+
+#include "sun8i-v3.dtsi"
diff --git a/arch/arm/boot/dts/sun8i-s3l.dtsi b/arch/arm/boot/dts/sun8i-s3l.dtsi
new file mode 100644
index 000000000000..0f41a25ecb30
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-s3l.dtsi
@@ -0,0 +1,6 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
+ */
+
+#include "sun8i-v3.dtsi"
diff --git a/arch/arm/boot/dts/sun8i-v3.dtsi b/arch/arm/boot/dts/sun8i-v3.dtsi
new file mode 100644
index 000000000000..6ae8645ade50
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-v3.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Icenowy Zheng <icenowy@aosc.io>
+ */
+
+#include "sun8i-v3s.dtsi"
+
+&ccu {
+ compatible = "allwinner,sun8i-v3-ccu";
+};
+
+&pio {
+ compatible = "allwinner,sun8i-v3-pinctrl";
+};
--
2.21.0
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next prev parent reply other threads:[~2019-06-11 14:14 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-11 14:09 [PATCH v2 00/11] Support for Allwinner V3/S3L and Sochip S3 Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 01/11] dt-bindings: pinctrl: add missing compatible string for V3s Icenowy Zheng
2019-06-12 12:11 ` Linus Walleij
2019-06-11 14:09 ` [PATCH v2 02/11] dt-bindings: pinctrl: add compatible string for Allwinner V3 pinctrl Icenowy Zheng
2019-06-12 12:12 ` Linus Walleij
2019-06-11 14:09 ` [PATCH v2 03/11] pinctrl: sunxi: v3s: introduce support for V3 Icenowy Zheng
2019-06-11 14:27 ` Maxime Ripard
2019-06-12 7:16 ` [linux-sunxi] " Paul Kocialkowski
2019-06-11 14:09 ` [PATCH v2 04/11] clk: sunxi-ng: v3s: add the missing PLL_DDR1 Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 05/11] dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 06/11] clk: sunxi-ng: v3s: add Allwinner V3 support Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 07/11] dt-bindings: vendor-prefixes: add SoChip Icenowy Zheng
2019-06-11 14:09 ` Icenowy Zheng [this message]
2019-06-11 14:09 ` [PATCH v2 09/11] dt-bindings: vendor-prefixes: add Sipeed Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 10/11] dt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 11/11] ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3 Icenowy Zheng
2019-06-11 14:32 ` Maxime Ripard
2019-06-12 12:14 ` [PATCH v2 00/11] Support for Allwinner V3/S3L and Sochip S3 Linus Walleij
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