From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Icenowy Zheng <icenowy@aosc.io>
Cc: devicetree@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org,
linux-gpio@vger.kernel.org, Chen-Yu Tsai <wens@csie.org>,
Rob Herring <robh+dt@kernel.org>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 03/11] pinctrl: sunxi: v3s: introduce support for V3
Date: Tue, 11 Jun 2019 16:27:40 +0200 [thread overview]
Message-ID: <20190611142740.2gqm3nxq2nl6sz7w@flea> (raw)
In-Reply-To: <20190611140940.14357-4-icenowy@aosc.io>
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Hi,
On Tue, Jun 11, 2019 at 10:09:32PM +0800, Icenowy Zheng wrote:
> Introduce the GPIO pins that is only available on V3 (not on V3s) to the
> V3s pinctrl driver.
>
> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
> ---
> Changes in v2:
> - Dropped the driver rename patch and apply the changes directly on V3s
> driver.
>
> drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c | 265 +++++++++++++++++++++-
> drivers/pinctrl/sunxi/pinctrl-sunxi.h | 2 +
> 2 files changed, 262 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
> index 6704ce8e5e3d..9e82fd38cf21 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c
> @@ -1,5 +1,5 @@
> /*
> - * Allwinner V3s SoCs pinctrl driver.
> + * Allwinner V3/V3s SoCs pinctrl driver.
> *
> * Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
> *
> @@ -77,6 +77,30 @@ static const struct sunxi_desc_pin sun8i_v3s_pins[] = {
> SUNXI_FUNCTION(0x2, "i2c1"), /* SCK */
> SUNXI_FUNCTION(0x3, "uart0"), /* RX */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PB_EINT9 */
> + SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 10),
> + PINCTRL_SUN8I_V3,
> + SUNXI_FUNCTION(0x0, "gpio_in"),
> + SUNXI_FUNCTION(0x1, "gpio_out"),
> + SUNXI_FUNCTION(0x2, "jtag"), /* MS */
> + SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PB_EINT10 */
The alignment should be on the parenthesis
Looks good otherwise
maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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next prev parent reply other threads:[~2019-06-11 14:28 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-11 14:09 [PATCH v2 00/11] Support for Allwinner V3/S3L and Sochip S3 Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 01/11] dt-bindings: pinctrl: add missing compatible string for V3s Icenowy Zheng
2019-06-12 12:11 ` Linus Walleij
2019-06-11 14:09 ` [PATCH v2 02/11] dt-bindings: pinctrl: add compatible string for Allwinner V3 pinctrl Icenowy Zheng
2019-06-12 12:12 ` Linus Walleij
2019-06-11 14:09 ` [PATCH v2 03/11] pinctrl: sunxi: v3s: introduce support for V3 Icenowy Zheng
2019-06-11 14:27 ` Maxime Ripard [this message]
2019-06-12 7:16 ` [linux-sunxi] " Paul Kocialkowski
2019-06-11 14:09 ` [PATCH v2 04/11] clk: sunxi-ng: v3s: add the missing PLL_DDR1 Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 05/11] dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 06/11] clk: sunxi-ng: v3s: add Allwinner V3 support Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 07/11] dt-bindings: vendor-prefixes: add SoChip Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 08/11] ARM: sunxi: dts: s3/s3l/v3: add DTSI files for S3/S3L/V3 SoCs Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 09/11] dt-bindings: vendor-prefixes: add Sipeed Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 10/11] dt-bindings: arm: sunxi: add binding for Lichee Zero Plus core board Icenowy Zheng
2019-06-11 14:09 ` [PATCH v2 11/11] ARM: dts: sun8i: s3: add devicetree for Lichee zero plus w/ S3 Icenowy Zheng
2019-06-11 14:32 ` Maxime Ripard
2019-06-12 12:14 ` [PATCH v2 00/11] Support for Allwinner V3/S3L and Sochip S3 Linus Walleij
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