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From: Maxime Ripard <mripard@kernel.org>
To: Chen-Yu Tsai <wens@csie.org>
Cc: alistair23@gmail.com, Alistair Francis <alistair@alistair23.me>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH] arm64: dts: sun50i: sopine-baseboard: Expose serial1, serial2 and serial3
Date: Mon, 21 Oct 2019 13:17:09 +0200	[thread overview]
Message-ID: <20191021111709.dpu6g7jltuw6cbbn@gilmour> (raw)
In-Reply-To: <CAGb2v67QrTJjSO99UNs-=3ZZnK948am11=izRTHT6gZ06E28eA@mail.gmail.com>


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Hi,

On Wed, Oct 16, 2019 at 10:54:27PM +0800, Chen-Yu Tsai wrote:
> On Wed, Oct 16, 2019 at 10:49 PM Maxime Ripard <mripard@kernel.org> wrote:
> > On Sat, Oct 12, 2019 at 01:05:24PM -0700, Alistair Francis wrote:
> > > Follow what the sun50i-a64-pine64.dts does and expose all 5 serial
> > > connections.
> > >
> > > Signed-off-by: Alistair Francis <alistair@alistair23.me>
> > > ---
> > >  .../allwinner/sun50i-a64-sopine-baseboard.dts | 25 +++++++++++++++++++
> > >  1 file changed, 25 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
> > > index 124b0b030b28..49c37b21ab36 100644
> > > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
> > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
> > > @@ -56,6 +56,10 @@
> > >       aliases {
> > >               ethernet0 = &emac;
> > >               serial0 = &uart0;
> > > +             serial1 = &uart1;
> > > +             serial2 = &uart2;
> > > +             serial3 = &uart3;
> > > +             serial4 = &uart4;
> > >       };
> > >
> > >       chosen {
> > > @@ -280,6 +284,27 @@
> > >       };
> > >  };
> > >
> > > +/* On Pi-2 connector */
> > > +&uart2 {
> > > +     pinctrl-names = "default";
> > > +     pinctrl-0 = <&uart2_pins>;
> > > +     status = "disabled";
> > > +};
> > > +
> > > +/* On Euler connector */
> > > +&uart3 {
> > > +     pinctrl-names = "default";
> > > +     pinctrl-0 = <&uart3_pins>;
> > > +     status = "disabled";
> > > +};
> > > +
> > > +/* On Euler connector, RTS/CTS optional */
> > > +&uart4 {
> > > +     pinctrl-names = "default";
> > > +     pinctrl-0 = <&uart4_pins>;
> > > +     status = "disabled";
> > > +};
> >
> > Since these are all the default muxing, maybe we should just set that
> > in the DTSI?
>
> Maybe not, since people may want to only use RX/TX, and leave the other
> two pins for GPIO?

Right, I'll apply that patch.

Thanks!
Maxime

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  parent reply	other threads:[~2019-10-21 11:17 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-12 20:05 [PATCH] arm64: dts: sun50i: sopine-baseboard: Expose serial1, serial2 and serial3 Alistair Francis
2019-10-16 14:49 ` Maxime Ripard
2019-10-16 14:54   ` Chen-Yu Tsai
2019-10-16 16:10     ` Alistair Francis
2019-10-21 11:17     ` Maxime Ripard [this message]
2019-11-05 19:27       ` Alistair Francis
2019-11-06 11:52         ` Maxime Ripard
2019-11-06 21:45           ` Alistair Francis

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