From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Paweł Chmiel" <pawel.mikolaj.chmiel@gmail.com>
Cc: linux-samsung-soc@vger.kernel.org, sboyd@kernel.org,
mturquette@baylibre.com, tomasz.figa@gmail.com,
linux-kernel@vger.kernel.org, cw00.choi@samsung.com,
kgene@kernel.org, s.nawrocki@samsung.com,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] clk: exynos7: Mark aclk_fsys1_200 as critical
Date: Mon, 26 Oct 2020 16:16:24 +0100 [thread overview]
Message-ID: <20201026151624.GB87050@kozik-lap> (raw)
In-Reply-To: <20201024154346.9589-1-pawel.mikolaj.chmiel@gmail.com>
On Sat, Oct 24, 2020 at 05:43:46PM +0200, Paweł Chmiel wrote:
> This clock must be always enabled to allow access to any registers in
> fsys1 CMU. Until proper solution based on runtime PM is applied
> (similar to what was done for Exynos5433), mark that clock as critical
> so it won't be disabled.
>
> It was observed on Samsung Galaxy S6 device (based on Exynos7420), where
> UFS module is probed before pmic used to power that device.
> In this case defer probe was happening and that clock was disabled by
> UFS driver, causing whole boot to hang on next CMU access.
>
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
> ---
> drivers/clk/samsung/clk-exynos7.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Best regards,
Krzysztof
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next prev parent reply other threads:[~2020-10-26 15:17 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20201024154433epcas1p3e6cbd7855e24cb5798026134e61c05b1@epcas1p3.samsung.com>
2020-10-24 15:43 ` [PATCH] clk: exynos7: Mark aclk_fsys1_200 as critical Paweł Chmiel
2020-10-26 5:46 ` Chanwoo Choi
2020-10-26 15:16 ` Krzysztof Kozlowski [this message]
2020-12-17 10:14 ` Stephen Boyd
2020-12-17 21:08 ` Paweł Chmiel
2021-04-07 10:03 ` Sylwester Nawrocki
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