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From: Leo Yan <leo.yan@linaro.org>
To: Ian Rogers <irogers@google.com>
Cc: "Mark Rutland" <mark.rutland@arm.com>,
	"Al Grant" <Al.Grant@arm.com>,
	"Mathieu Poirier" <mathieu.poirier@linaro.org>,
	"Kemeng Shi" <shikemeng@huawei.com>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Will Deacon" <will@kernel.org>,
	"John Garry" <john.garry@huawei.com>,
	LKML <linux-kernel@vger.kernel.org>,
	"Arnaldo Carvalho de Melo" <acme@kernel.org>,
	"Alexander Shishkin" <alexander.shishkin@linux.intel.com>,
	"Ingo Molnar" <mingo@redhat.com>,
	"James Clark" <james.clark@arm.com>,
	"André Przywara" <andre.przywara@arm.com>,
	"Namhyung Kim" <namhyung@kernel.org>,
	"Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com>,
	"Jiri Olsa" <jolsa@redhat.com>,
	"Linux ARM" <linux-arm-kernel@lists.infradead.org>,
	"Wei Li" <liwei391@huawei.com>
Subject: Re: [PATCH v3 9/9] perf mem: Document event type 'ldst'
Date: Fri, 30 Oct 2020 09:49:23 +0800	[thread overview]
Message-ID: <20201030014923.GK16862@leoy-ThinkPad-X240s> (raw)
In-Reply-To: <CAP-5=fUi47JWsAbzPtKjpgopzDOt4FGkXW2sitnbM+sBgcodPg@mail.gmail.com>

Hi Ian,

On Thu, Oct 29, 2020 at 06:10:40PM -0700, Ian Rogers wrote:
> On Tue, Oct 27, 2020 at 11:39 PM Leo Yan <leo.yan@linaro.org> wrote:
> >
> > The event type 'ldst' is added for recording both load and store memory
> > operations, this patch documents for the new event type.
> >
> > Signed-off-by: Leo Yan <leo.yan@linaro.org>
> > ---
> >  tools/perf/Documentation/perf-mem.txt | 6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> >
> > diff --git a/tools/perf/Documentation/perf-mem.txt b/tools/perf/Documentation/perf-mem.txt
> > index 199ea0f0a6c0..c50ef37dba72 100644
> > --- a/tools/perf/Documentation/perf-mem.txt
> > +++ b/tools/perf/Documentation/perf-mem.txt
> > @@ -38,7 +38,11 @@ OPTIONS
> >
> >  -t::
> >  --type=<type>::
> > -       Select the memory operation type: load or store (default: load,store)
> > +       Select the memory operation type: load, store, ldst (default: load,store).
> > +       The type 'ldst' means the single event can record both for load and store
> > +       operations; Intel and PowerPC support the types 'load' and 'store' but
> > +       'ldst' cannot be used; on Arm64, it uses Arm SPE as memory events and
> > +       user needs to specify one of these three types.
> 
> Naive question, could the type remain load,store for mem record and
> the tool internally change it to ldst for ARM SPE?

Good point.  I understand you are suggesting to avoid complex options
for usage, looked again at the code, my conclusion is it's feabile to
convert 'load,store' to Arm SPE's ldst type.

If find any block issue when I experiment this idea, will come back to
update it; otherwise, I will apply the suggestion in next spin.

Thanks for suggestion,
Leo

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      reply	other threads:[~2020-10-30  2:46 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-28  6:38 [PATCH v3 0/9] perf mem/c2c: Support AUX trace Leo Yan
2020-10-28  6:38 ` [PATCH v3 1/9] perf mem: Search event name with more flexible path Leo Yan
2020-10-28  6:38 ` [PATCH v3 2/9] perf mem: Introduce weak function perf_mem_events__ptr() Leo Yan
2020-10-28  6:38 ` [PATCH v3 3/9] perf mem: Support new memory event PERF_MEM_EVENTS__LOAD_STORE Leo Yan
2020-10-31 20:23   ` Jiri Olsa
2020-11-02  9:38     ` Leo Yan
2020-10-28  6:38 ` [PATCH v3 4/9] perf mem: Only initialize memory event for recording Leo Yan
2020-10-30  1:04   ` Ian Rogers
2020-10-28  6:38 ` [PATCH v3 5/9] perf mem: Support AUX trace Leo Yan
2020-10-28  6:38 ` [PATCH v3 6/9] perf c2c: " Leo Yan
2020-10-31 20:21   ` Jiri Olsa
2020-11-02 10:08     ` Leo Yan
2020-11-02 16:35       ` Jiri Olsa
2020-10-28  6:38 ` [PATCH v3 7/9] perf mem: Support Arm SPE events Leo Yan
2020-10-28  6:38 ` [PATCH v3 8/9] perf mem: Return NULL for event 'ldst' on PowerPC Leo Yan
2020-10-28  9:35   ` Naveen N. Rao
2020-10-28  6:38 ` [PATCH v3 9/9] perf mem: Document event type 'ldst' Leo Yan
2020-10-30  1:10   ` Ian Rogers
2020-10-30  1:49     ` Leo Yan [this message]

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