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From: Vladimir Oltean <vladimir.oltean@nxp.com>
To: Robin Murphy <robin.murphy@arm.com>
Cc: will@kernel.org, joro@8bytes.org, iommu@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] iommu/arm-smmu: Report IOMMU_CAP_CACHE_COHERENCY even betterer
Date: Tue, 10 Jan 2023 12:56:25 +0200	[thread overview]
Message-ID: <20230110105625.ououvyfj2g6ttkmf@skbuf> (raw)
In-Reply-To: <d6dc41952961e5c7b21acac08a8bf1eb0f69e124.1671123115.git.robin.murphy@arm.com>

Hi,

On Thu, Dec 15, 2022 at 04:51:55PM +0000, Robin Murphy wrote:
> Although it's vanishingly unlikely that anyone would integrate an SMMU
> within a coherent interconnect without also making the pagetable walk
> interface coherent, the same effect happens if a coherent SMMU fails to
> advertise CTTW correctly. This turns out to be the case on some popular
> NXP SoCs, where VFIO started failing the IOMMU_CAP_CACHE_COHERENCY test,
> even though IOMMU_CACHE *was* previously achieving the desired effect
> anyway thanks to the underlying integration.
> 
> While those SoCs stand to gain some more general benefits from a
> firmware update to override CTTW correctly in DT/ACPI, it's also easy
> to work around this in Linux as well, to avoid imposing too much on
> affected users - since the upstream client devices *are* correctly
> marked as coherent, we can trivially infer their coherent paths through
> the SMMU as well.
> 
> Reported-by: Vladimir Oltean <vladimir.oltean@nxp.com>
> Fixes: df198b37e72c ("iommu/arm-smmu: Report IOMMU_CAP_CACHE_COHERENCY better")
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---

Could someone please apply this patch?

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  parent reply	other threads:[~2023-01-10 11:00 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-15 16:51 [PATCH] iommu/arm-smmu: Report IOMMU_CAP_CACHE_COHERENCY even betterer Robin Murphy
2022-12-19 12:03 ` Vladimir Oltean
2023-01-10 10:56 ` Vladimir Oltean [this message]
2023-01-10 11:10   ` Will Deacon
2023-01-10 14:02 ` Will Deacon

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