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From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: Radu Rendec <rrendec@redhat.com>
Cc: x86@kernel.org, Andreas Herrmann <aherrmann@suse.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Chen Yu <yu.c.chen@intel.com>, Len Brown <len.brown@intel.com>,
	Pierre Gondois <Pierre.Gondois@arm.com>, Pu Wen <puwen@hygon.cn>,
	"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
	Will Deacon <will@kernel.org>, Zhang Rui <rui.zhang@intel.com>,
	stable@vger.kernel.org, Ricardo Neri <ricardo.neri@intel.com>,
	"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 1/3] cacheinfo: Allocate memory for memory if not done from the primary CPU
Date: Mon, 7 Aug 2023 16:12:16 -0700	[thread overview]
Message-ID: <20230807231216.GA18573@ranerica-svr.sc.intel.com> (raw)
In-Reply-To: <b1452f78dc433a9cab4c94c9751e0e4a149cff01.camel@redhat.com>

On Sat, Aug 05, 2023 at 10:28:30AM -0400, Radu Rendec wrote:
> On Fri, 2023-08-04 at 18:24 -0700, Ricardo Neri wrote:
> > Commit 5944ce092b97 ("arch_topology: Build cacheinfo from primary CPU")
> > adds functionality that architectures can use to optionally allocate and
> > build cacheinfo early during boot. Commit 6539cffa9495 ("cacheinfo: Add
> > arch specific early level initializer") lets secondary CPUs correct (and
> > reallocate memory) cacheinfo data if needed.
> > 
> > If the early build functionality is not used and cacheinfo does not need
> > correction, memory for cacheinfo is never allocated. x86 does not use the
> > early build functionality. Consequently, during the cacheinfo CPU hotplug
> > callback, last_level_cache_is_valid() attempts to dereference a NULL
> > pointer:
> > 
> >      BUG: kernel NULL pointer dereference, address: 0000000000000100
> >      #PF: supervisor read access in kernel mode
> >      #PF: error_code(0x0000) - not present page
> >      PGD 0 P4D 0
> >      Oops: 0000 [#1] PREEPMT SMP NOPTI
> >      CPU: 0 PID 19 Comm: cpuhp/0 Not tainted 6.4.0-rc2 #1
> >      RIP: 0010: last_level_cache_is_valid+0x95/0xe0a
> > 
> > Allocate memory for cacheinfo during the cacheinfo CPU hotplug callback if
> > not done earlier.
> > 
> > Cc: Andreas Herrmann <aherrmann@suse.com>
> > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Chen Yu <yu.c.chen@intel.com>
> > Cc: Len Brown <len.brown@intel.com>
> > Cc: Radu Rendec <rrendec@redhat.com>
> > Cc: Pierre Gondois <Pierre.Gondois@arm.com>
> > Cc: Pu Wen <puwen@hygon.cn>
> > Cc: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
> > Cc: Sudeep Holla <sudeep.holla@arm.com>
> > Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
> > Cc: Will Deacon <will@kernel.org>
> > Cc: Zhang Rui <rui.zhang@intel.com>
> > Cc: linux-arm-kernel@lists.infradead.org
> > Cc: stable@vger.kernel.org
> > Acked-by: Len Brown <len.brown@intel.com>
> > Fixes: 6539cffa9495 ("cacheinfo: Add arch specific early level initializer")
> > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
> > ---
> > The motivation for commit 5944ce092b97 was to prevent a BUG splat in
> > PREEMPT_RT kernels during memory allocation. This splat is not observed on
> > x86 because the memory allocation for cacheinfo happens in
> > detect_cache_attributes() from the cacheinfo CPU hotplug callback.
> > 
> > The dereference of a NULL pointer is not observed today because
> > cache_leaves(cpu) is zero until after init_cache_level() is called (also
> > during the CPU hotplug callback). Patch2 will set it earlier and the NULL-
> > pointer dereference will be observed.
> > ---
> > Changes since v2:
> >  * Introduced this patch.
> > 
> > Changes since v1:
> >  * N/A
> > ---
> >  drivers/base/cacheinfo.c | 6 +++++-
> >  1 file changed, 5 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> > index cbae8be1fe52..461a77ece4b0 100644
> > --- a/drivers/base/cacheinfo.c
> > +++ b/drivers/base/cacheinfo.c
> > @@ -554,7 +554,11 @@ static inline int init_level_allocate_ci(unsigned int cpu)
> >          */
> >         ci_cacheinfo(cpu)->early_ci_levels = false;
> >  
> > -       if (cache_leaves(cpu) <= early_leaves)
> > +       /*
> > +        * Some architectures (e.g., x86) do not use early initialization.
> > +        * Allocate memory now in such case.
> > +        */
> > +       if (cache_leaves(cpu) <= early_leaves && per_cpu_cacheinfo(cpu))
> >                 return 0;
> >  
> >         kfree(per_cpu_cacheinfo(cpu));
> 
> For this patch only:
> 
> Reviewed-by: Radu Rendec <rrendec@redhat.com>
> 
> Thanks for submitting!

Thank you!

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  reply	other threads:[~2023-08-07 23:10 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20230805012421.7002-1-ricardo.neri-calderon@linux.intel.com>
2023-08-05  1:24 ` [PATCH v3 1/3] cacheinfo: Allocate memory for memory if not done from the primary CPU Ricardo Neri
2023-08-05 14:28   ` Radu Rendec
2023-08-07 23:12     ` Ricardo Neri [this message]
2023-08-30 11:49   ` Sudeep Holla
2023-08-30 12:13     ` Radu Rendec
2023-08-30 15:47       ` Sudeep Holla
2023-08-30 16:45         ` Radu Rendec
2023-09-12  0:30           ` Ricardo Neri
2023-08-05  1:24 ` [PATCH v3 2/3] x86/cacheinfo: Delete global num_cache_leaves Ricardo Neri
2023-08-05  1:24 ` [PATCH v3 3/3] x86/cacheinfo: Clean out init_cache_level() Ricardo Neri

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