From: Linu Cherian <lcherian@marvell.com>
To: <suzuki.poulose@arm.com>, <mike.leach@linaro.org>,
<james.clark@arm.com>, <leo.yan@linaro.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
<coresight@lists.linaro.org>, <linux-kernel@vger.kernel.org>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<conor+dt@kernel.org>, <devicetree@vger.kernel.org>,
<sgoutham@marvell.com>, <gcherian@marvell.com>,
Linu Cherian <lcherian@marvell.com>
Subject: [PATCH 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property
Date: Fri, 29 Sep 2023 19:07:48 +0530 [thread overview]
Message-ID: <20230929133754.857678-2-lcherian@marvell.com> (raw)
In-Reply-To: <20230929133754.857678-1-lcherian@marvell.com>
memory-region 0: Reserved trace buffer memory
TMC ETR: When available, use this reserved memory region for
trace data capture. Same region is used for trace data
retention after a panic or watchdog reset.
TMC ETF: When available, use this reserved memory region for
trace data retention synced from internal SRAM after a panic or
watchdog reset.
memory-region 1: Reserved meta data memory
TMC ETR, ETF: When available, use this memory for register
snapshot retention synced from hardware registers after a panic
or watchdog reset.
Signed-off-by: Linu Cherian <lcherian@marvell.com>
---
.../bindings/arm/arm,coresight-tmc.yaml | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
index cb8dceaca70e..45ca4d02d73e 100644
--- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
+++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml
@@ -101,6 +101,22 @@ properties:
and ETF configurations.
$ref: /schemas/graph.yaml#/properties/port
+ memory-region:
+ items:
+ - description: Reserved trace buffer memory for ETR and ETF sinks.
+ For ETR, this reserved memory region is used for trace data capture.
+ Same region is used for trace data retention as well after a panic
+ or watchdog reset.
+ For ETF, this reserved memory region is used for retention of trace
+ data synced from internal SRAM after a panic or watchdog reset.
+
+ - description: Reserved meta data memory. Used for ETR and ETF sinks.
+
+ memory-region-names:
+ items:
+ - const: trace-mem
+ - const: metadata-mem
+
required:
- compatible
- reg
@@ -115,6 +131,9 @@ examples:
etr@20070000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x20070000 0x1000>;
+ memory-region = <&etr_trace_mem_reserved>,
+ <&etr_mdata_mem_reserved>;
+ memory-region-names = "trace-mem", "metadata-mem";
clocks = <&oscclk6a>;
clock-names = "apb_pclk";
--
2.34.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-09-29 13:38 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-29 13:37 [PATCH 0/7] Coresight for Kernel panic and watchdog reset Linu Cherian
2023-09-29 13:37 ` Linu Cherian [this message]
2023-09-30 15:28 ` [PATCH 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property Krzysztof Kozlowski
2023-10-03 4:33 ` [EXT] " Linu Cherian
2023-10-03 6:31 ` Krzysztof Kozlowski
2023-10-06 4:27 ` Linu Cherian
2023-10-06 11:03 ` Mike Leach
2023-10-14 11:36 ` [EXT] " Linu Cherian
2023-10-14 13:25 ` Conor Dooley
2023-10-19 1:12 ` Linu Cherian
2023-11-07 11:07 ` Linu Cherian
2023-09-29 13:37 ` [PATCH 2/7] coresight: tmc-etr: Add support to use reserved trace memory Linu Cherian
2023-10-02 14:28 ` James Clark
2023-10-02 14:41 ` James Clark
2023-10-02 15:03 ` James Clark
2023-10-03 4:34 ` [EXT] " Linu Cherian
2023-09-29 13:37 ` [PATCH 3/7] coresight: core: Add provision for panic callbacks Linu Cherian
2023-09-29 13:37 ` [PATCH 4/7] coresight: tmc: Enable panic sync handling Linu Cherian
2023-09-29 13:37 ` [PATCH 5/7] coresight: tmc: Add support for reading tracedata from previous boot Linu Cherian
2023-10-03 16:43 ` James Clark
2023-10-04 13:48 ` James Clark
2023-10-10 13:23 ` [EXT] " Linu Cherian
2023-11-09 1:08 ` Linu Cherian
2023-11-09 10:15 ` James Clark
2023-09-29 13:37 ` [PATCH 6/7] coresight: tmc: Stop trace capture on FlIn Linu Cherian
2023-09-29 13:37 ` [PATCH 7/7] coresight: config: Add preloaded configuration Linu Cherian
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230929133754.857678-2-lcherian@marvell.com \
--to=lcherian@marvell.com \
--cc=conor+dt@kernel.org \
--cc=coresight@lists.linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=gcherian@marvell.com \
--cc=james.clark@arm.com \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=leo.yan@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mike.leach@linaro.org \
--cc=robh+dt@kernel.org \
--cc=sgoutham@marvell.com \
--cc=suzuki.poulose@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox