From: Siddharth Vadapalli <s-vadapalli@ti.com>
To: <lpieralisi@kernel.org>, <robh@kernel.org>, <kw@linux.com>,
<bhelgaas@google.com>, <krzysztof.kozlowski+dt@linaro.org>,
<conor+dt@kernel.org>, <vigneshr@ti.com>, <tjoseph@cadence.com>
Cc: <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <r-gunasekaran@ti.com>,
<danishanwar@ti.com>, <srk@ti.com>, <nm@ti.com>,
<s-vadapalli@ti.com>
Subject: [PATCH v13 5/5] PCI: j721e: add j784s4 PCIe configuration
Date: Tue, 28 Nov 2023 11:14:02 +0530 [thread overview]
Message-ID: <20231128054402.2155183-6-s-vadapalli@ti.com> (raw)
In-Reply-To: <20231128054402.2155183-1-s-vadapalli@ti.com>
From: Matt Ranostay <mranostay@ti.com>
Add PCIe configuration for j784s4 platform which has 4x lane support.
Tested-by: Achal Verma <a-verma1@ti.com>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Achal Verma <a-verma1@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
drivers/pci/controller/cadence/pci-j721e.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/controller/cadence/pci-j721e.c
index 645597856a1d..85718246016b 100644
--- a/drivers/pci/controller/cadence/pci-j721e.c
+++ b/drivers/pci/controller/cadence/pci-j721e.c
@@ -330,6 +330,20 @@ static const struct j721e_pcie_data am64_pcie_ep_data = {
.max_lanes = 1,
};
+static const struct j721e_pcie_data j784s4_pcie_rc_data = {
+ .mode = PCI_MODE_RC,
+ .quirk_retrain_flag = true,
+ .byte_access_allowed = false,
+ .linkdown_irq_regfield = LINK_DOWN,
+ .max_lanes = 4,
+};
+
+static const struct j721e_pcie_data j784s4_pcie_ep_data = {
+ .mode = PCI_MODE_EP,
+ .linkdown_irq_regfield = LINK_DOWN,
+ .max_lanes = 4,
+};
+
static const struct of_device_id of_j721e_pcie_match[] = {
{
.compatible = "ti,j721e-pcie-host",
@@ -355,6 +369,14 @@ static const struct of_device_id of_j721e_pcie_match[] = {
.compatible = "ti,am64-pcie-ep",
.data = &am64_pcie_ep_data,
},
+ {
+ .compatible = "ti,j784s4-pcie-host",
+ .data = &j784s4_pcie_rc_data,
+ },
+ {
+ .compatible = "ti,j784s4-pcie-ep",
+ .data = &j784s4_pcie_ep_data,
+ },
{},
};
--
2.34.1
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next prev parent reply other threads:[~2023-11-28 5:45 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-28 5:43 [PATCH v13 0/5] PCI: add 4x lane support for pci-j721e controllers Siddharth Vadapalli
2023-11-28 5:43 ` [PATCH v13 1/5] dt-bindings: PCI: ti,j721e-pci-*: add checks for num-lanes Siddharth Vadapalli
2023-11-28 5:43 ` [PATCH v13 2/5] dt-bindings: PCI: ti,j721e-pci-*: add j784s4-pci-* compatible strings Siddharth Vadapalli
2023-11-28 5:44 ` [PATCH v13 3/5] PCI: j721e: Add per platform maximum lane settings Siddharth Vadapalli
2023-12-05 5:12 ` Ravi Gunasekaran
2023-11-28 5:44 ` [PATCH v13 4/5] PCI: j721e: Add PCIe 4x lane selection support Siddharth Vadapalli
2023-11-28 5:44 ` Siddharth Vadapalli [this message]
2023-12-11 8:57 ` [PATCH v13 0/5] PCI: add 4x lane support for pci-j721e controllers Maxime Ripard
2023-12-13 19:13 ` Krzysztof Wilczyński
2023-12-13 19:05 ` Krzysztof Wilczyński
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