From: Francesco Dolcini <francesco@dolcini.it>
To: Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: Joao Paulo Goncalves <joao.goncalves@toradex.com>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Francesco Dolcini <francesco.dolcini@toradex.com>
Subject: [PATCH v2 1/3] arm64: dts: ti: verdin-am62: improve spi1 chip-select pinctrl
Date: Fri, 1 Dec 2023 15:55:49 +0100 [thread overview]
Message-ID: <20231201145551.23337-2-francesco@dolcini.it> (raw)
In-Reply-To: <20231201145551.23337-1-francesco@dolcini.it>
From: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Verdin SPI_1 interface has a dedicated hardware controlled chip select
that is currently configured in the same pinctrl group as MISO/MOSI/CLK,
however it is possible that it can be used only as a standard GPIO be it
a chip select or not.
To maximize flexibility and avoid duplication in the carrier board dts
files move the SPI_1 CS in a dedicated pinctrl and also adds an
additional pinctrl to simplify using SPI_1 CS as a GPIO.
Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
---
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
index 5db52f237253..6a06724b6d16 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi
@@ -233,6 +233,13 @@ AM62X_IOPAD(0x0018, PIN_INPUT, 7) /* (F24) OSPI0_D3.GPIO0_6 */ /* SODIMM 62 */
>;
};
+ /* Verdin SPI_1 CS as GPIO */
+ pinctrl_qspi1_io4_gpio: main-gpio0-7-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x001c, PIN_INPUT, 7) /* (J23) OSPI0_D4.GPIO0_7 */ /* SODIMM 202 */
+ >;
+ };
+
/* Verdin QSPI_1_CS# as GPIO (conflict with Verdin QSPI_1 interface) */
pinctrl_qspi1_cs_gpio: main-gpio0-11-default-pins {
pinctrl-single,pins = <
@@ -599,12 +606,18 @@ AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */ /* SODIMM 211 */
pinctrl_spi1: main-spi1-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x0020, PIN_INPUT, 1) /* (J25) OSPI0_D5.SPI1_CLK */ /* SODIMM 196 */
- AM62X_IOPAD(0x001c, PIN_INPUT, 1) /* (J23) OSPI0_D4.SPI1_CS0 */ /* SODIMM 202 */
AM62X_IOPAD(0x0024, PIN_INPUT, 1) /* (H25) OSPI0_D6.SPI1_D0 */ /* SODIMM 200 */
AM62X_IOPAD(0x0028, PIN_INPUT, 1) /* (J22) OSPI0_D7.SPI1_D1 */ /* SODIMM 198 */
>;
};
+ /* Verdin SPI_1 CS */
+ pinctrl_spi1_cs0: main-spi1-cs0-default-pins {
+ pinctrl-single,pins = <
+ AM62X_IOPAD(0x001c, PIN_INPUT, 1) /* (J23) OSPI0_D4.SPI1_CS0 */ /* SODIMM 202 */
+ >;
+ };
+
/* ETH_25MHz_CLK */
pinctrl_eth_clock: main-system-clkout0-default-pins {
pinctrl-single,pins = <
@@ -1278,7 +1291,7 @@ &main_mcan0 {
/* Verdin SPI_1 */
&main_spi1 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_spi1>;
+ pinctrl-0 = <&pinctrl_spi1>, <&pinctrl_spi1_cs0>;
ti,pindir-d0-out-d1-in;
status = "disabled";
};
--
2.25.1
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next prev parent reply other threads:[~2023-12-01 14:56 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-01 14:55 [PATCH v2 0/3] arm64: dts: ti: add verdin am62 mallow board Francesco Dolcini
2023-12-01 14:55 ` Francesco Dolcini [this message]
2023-12-01 14:55 ` [PATCH v2 2/3] dt-bindings: arm: " Francesco Dolcini
2023-12-01 14:55 ` [PATCH v2 3/3] arm64: dts: " Francesco Dolcini
2023-12-04 18:13 ` Nishanth Menon
2023-12-04 18:36 ` Francesco Dolcini
[not found] ` <20240113092025.GA8517@wunner.de>
2024-01-13 12:07 ` Francesco Dolcini
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