From: Josua Mayer <josua@solid-run.com>
To: Andrew Lunn <andrew@lunn.ch>,
Gregory Clement <gregory.clement@bootlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Josua Mayer <josua@solid-run.com>
Subject: [PATCH v3 8/8] arm: dts: marvell: clearfog-gtr-l8: align port numbers with enclosure
Date: Tue, 26 Dec 2023 19:11:39 +0100 [thread overview]
Message-ID: <20231226-support-clearfog-gtr-l8-sfp-v3-8-fd1ac2d6bf2e@solid-run.com> (raw)
In-Reply-To: <20231226-support-clearfog-gtr-l8-sfp-v3-0-fd1ac2d6bf2e@solid-run.com>
Clearfog GTR has an official enclosure with labels for all interfaces.
The "lan" ports on the 8-port switch in device-tree were numbered in
reverse wrt. enclosure.
Update all device-tree labels to match.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts
index 2df388f222ec..da6981677b03 100644
--- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts
+++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts
@@ -32,49 +32,49 @@ ports {
port@1 {
reg = <1>;
- label = "lan8";
+ label = "lan1";
phy-handle = <&switch0phy0>;
};
port@2 {
reg = <2>;
- label = "lan7";
+ label = "lan2";
phy-handle = <&switch0phy1>;
};
port@3 {
reg = <3>;
- label = "lan6";
+ label = "lan3";
phy-handle = <&switch0phy2>;
};
port@4 {
reg = <4>;
- label = "lan5";
+ label = "lan4";
phy-handle = <&switch0phy3>;
};
port@5 {
reg = <5>;
- label = "lan4";
+ label = "lan5";
phy-handle = <&switch0phy4>;
};
port@6 {
reg = <6>;
- label = "lan3";
+ label = "lan6";
phy-handle = <&switch0phy5>;
};
port@7 {
reg = <7>;
- label = "lan2";
+ label = "lan7";
phy-handle = <&switch0phy6>;
};
port@8 {
reg = <8>;
- label = "lan1";
+ label = "lan8";
phy-handle = <&switch0phy7>;
};
--
2.35.3
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prev parent reply other threads:[~2023-12-26 18:13 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-26 18:11 [PATCH v3 0/8] dt-bindings: marvell: a38x: add solidrun armada 388 clearfog boards Josua Mayer
2023-12-26 18:11 ` [PATCH v3 1/8] dt-bindings: marvell: a38x: convert the soc compatibles description to yaml Josua Mayer
2023-12-27 11:49 ` Krzysztof Kozlowski
2023-12-27 12:05 ` Josua Mayer
2023-12-27 12:37 ` Krzysztof Kozlowski
2023-12-26 18:11 ` [PATCH v3 2/8] dt-bindings: marvell: a38x: add solidrun armada 385 clearfog gtr boards Josua Mayer
2023-12-26 19:40 ` Rob Herring
2023-12-27 11:50 ` Krzysztof Kozlowski
2023-12-26 18:11 ` [PATCH v3 3/8] dt-bindings: marvell: a38x: add solidrun armada 388 clearfog boards Josua Mayer
2023-12-26 19:40 ` Rob Herring
2023-12-26 18:11 ` [PATCH v3 4/8] arm: dts: marvell: clearfog-gtr: add board-specific compatible strings Josua Mayer
2023-12-26 18:11 ` [PATCH v3 5/8] arm: dts: marvell: clearfog-gtr: sort pinctrl nodes alphabetically Josua Mayer
2023-12-26 18:11 ` [PATCH v3 6/8] arm: dts: marvell: clearfog-gtr: add missing pinctrl for all used gpios Josua Mayer
2023-12-26 18:11 ` [PATCH v3 7/8] arm: dts: marvell: clearfog-gtr-l8: add support for second sfp connector Josua Mayer
2023-12-26 18:11 ` Josua Mayer [this message]
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