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From: Dhruva Gole <d-gole@ti.com>
To: Markus Schneider-Pargmann <msp@baylibre.com>
Cc: Viresh Kumar <vireshk@kernel.org>, Nishanth Menon <nm@ti.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tero Kristo <kristo@kernel.org>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Andrew Davis <afd@ti.com>, <linux-pm@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 1/3] dt-bindings: cpufreq: Add nvmem-cells for chip information
Date: Thu, 15 Feb 2024 14:29:51 +0530	[thread overview]
Message-ID: <20240215085951.xrcitu2so5gqcewn@dhruva> (raw)
In-Reply-To: <20240206145721.2418893-2-msp@baylibre.com>

Hi,

On Feb 06, 2024 at 15:57:19 +0100, Markus Schneider-Pargmann wrote:
> Add nvmem-cells to describe chip information like chipvariant and
> chipspeed. If nvmem-cells are used, the syscon property is not necessary
> anymore.
> 
> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
> Acked-by: Andrew Davis <afd@ti.com>
> ---
>  .../bindings/opp/operating-points-v2-ti-cpu.yaml | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> index 02d1d2c17129..b1881a0834fe 100644
> --- a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> +++ b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml
> @@ -34,6 +34,14 @@ properties:
>        points to syscon node representing the control module
>        register space of the SoC.
>  
> +  nvmem-cells:
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +
> +  nvmem-cell-names:
> +    items:
> +      - const: chipvariant
> +      - const: chipspeed
> +
>    opp-shared: true
>  
>  patternProperties:
> @@ -55,7 +63,13 @@ patternProperties:
>  
>  required:
>    - compatible
> -  - syscon
> +
> +oneOf:
> +  - required:
> +      - syscon
> +  - required:
> +      - nvmem-cells
> +      - nvmem-cell-names

Reviewed-by: Dhruva Gole <d-gole@ti.com>


-- 
Best regards,
Dhruva Gole <d-gole@ti.com>

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  parent reply	other threads:[~2024-02-15  9:00 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-02-06 14:57 [PATCH 0/3] arm64: am62: Use nvmem for chip information in opp table Markus Schneider-Pargmann
2024-02-06 14:57 ` [PATCH 1/3] dt-bindings: cpufreq: Add nvmem-cells for chip information Markus Schneider-Pargmann
2024-02-15  7:26   ` Viresh Kumar
2024-02-15  8:25     ` Krzysztof Kozlowski
2024-02-15  8:36       ` Viresh Kumar
2024-02-15  8:24   ` Krzysztof Kozlowski
2024-02-17 14:27     ` Krzysztof Kozlowski
2024-02-15  8:59   ` Dhruva Gole [this message]
2024-02-17 14:27   ` Krzysztof Kozlowski
2024-02-06 14:57 ` [PATCH 2/3] cpufreq: ti-cpufreq: Support nvmem for chip version Markus Schneider-Pargmann
2024-02-15  9:13   ` Dhruva Gole
2024-02-06 14:57 ` [PATCH 3/3] arm64: dts: ti: k3-am625: Use nvmem-cells for opp Markus Schneider-Pargmann
2024-02-15  8:24   ` Krzysztof Kozlowski

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