public inbox for linux-arm-kernel@lists.infradead.org
 help / color / mirror / Atom feed
* [PATCH v4] PCI: Cadence: Clear the ARI Capability Next Function Number of the last function
@ 2023-12-02  8:50 Siddharth Vadapalli
  2024-03-10 18:34 ` Krzysztof Wilczyński
  0 siblings, 1 reply; 2+ messages in thread
From: Siddharth Vadapalli @ 2023-12-02  8:50 UTC (permalink / raw)
  To: lpieralisi, robh, kw, bhelgaas
  Cc: linux-pci, linux-kernel, linux-arm-kernel, vigneshr, srk, nm,
	s-vadapalli

From: Jasko-EXT Wojciech <wojciech.jasko-EXT@continental-corporation.com>

Next Function Number field in ARI Capability Register for last function
must be zero by default as per the PCIe specification, indicating there
is no next higher number function but that's not happening in our case,
so this patch clears the Next Function Number field for last function used.

Signed-off-by: Jasko-EXT Wojciech <wojciech.jasko-EXT@continental-corporation.com>
Signed-off-by: Achal Verma <a-verma1@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---

Hello,

This patch is based on linux-next tagged next-20231201.

v3:
https://patchwork.kernel.org/project/linux-pci/patch/20230316071156.200888-1-a-verma1@ti.com/
Changes since v3: - Rebased on next-20231201.
- Collected Reviewed-by tag from Vignesh Raghavendra <vigneshr@ti.com>.

Regards,
Siddharth.

 drivers/pci/controller/cadence/pcie-cadence-ep.c | 14 +++++++++++++-
 drivers/pci/controller/cadence/pcie-cadence.h    |  6 ++++++
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/cadence/pcie-cadence-ep.c b/drivers/pci/controller/cadence/pcie-cadence-ep.c
index 3142feb8ac19..2dd4d7027659 100644
--- a/drivers/pci/controller/cadence/pcie-cadence-ep.c
+++ b/drivers/pci/controller/cadence/pcie-cadence-ep.c
@@ -566,7 +566,8 @@ static int cdns_pcie_ep_start(struct pci_epc *epc)
 	struct cdns_pcie *pcie = &ep->pcie;
 	struct device *dev = pcie->dev;
 	int max_epfs = sizeof(epc->function_num_map) * 8;
-	int ret, value, epf;
+	int ret, epf, last_fn;
+	u32 reg, value;
 
 	/*
 	 * BIT(0) is hardwired to 1, hence function 0 is always enabled
@@ -574,6 +575,17 @@ static int cdns_pcie_ep_start(struct pci_epc *epc)
 	 */
 	cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, epc->function_num_map);
 
+	/*
+	 * Next function field in ARI_CAP_AND_CTR register for last function
+	 * should be 0.
+	 * Clearing Next Function Number field for the last function used.
+	 */
+	last_fn = find_last_bit(&epc->function_num_map, BITS_PER_LONG);
+	reg     = CDNS_PCIE_CORE_PF_I_ARI_CAP_AND_CTRL(last_fn);
+	value  = cdns_pcie_readl(pcie, reg);
+	value &= ~CDNS_PCIE_ARI_CAP_NFN_MASK;
+	cdns_pcie_writel(pcie, reg, value);
+
 	if (ep->quirk_disable_flr) {
 		for (epf = 0; epf < max_epfs; epf++) {
 			if (!(epc->function_num_map & BIT(epf)))
diff --git a/drivers/pci/controller/cadence/pcie-cadence.h b/drivers/pci/controller/cadence/pcie-cadence.h
index 373cb50fcd15..9c16745582eb 100644
--- a/drivers/pci/controller/cadence/pcie-cadence.h
+++ b/drivers/pci/controller/cadence/pcie-cadence.h
@@ -130,6 +130,12 @@
 #define CDNS_PCIE_EP_FUNC_DEV_CAP_OFFSET	0xc0
 #define CDNS_PCIE_EP_FUNC_SRIOV_CAP_OFFSET	0x200
 
+/*
+ * Endpoint PF Registers
+ */
+#define CDNS_PCIE_CORE_PF_I_ARI_CAP_AND_CTRL(fn)	(0x144 + (fn) * 0x1000)
+#define CDNS_PCIE_ARI_CAP_NFN_MASK	GENMASK(15, 8)
+
 /*
  * Root Port Registers (PCI configuration space for the root port function)
  */
-- 
2.34.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH v4] PCI: Cadence: Clear the ARI Capability Next Function Number of the last function
  2023-12-02  8:50 [PATCH v4] PCI: Cadence: Clear the ARI Capability Next Function Number of the last function Siddharth Vadapalli
@ 2024-03-10 18:34 ` Krzysztof Wilczyński
  0 siblings, 0 replies; 2+ messages in thread
From: Krzysztof Wilczyński @ 2024-03-10 18:34 UTC (permalink / raw)
  To: Siddharth Vadapalli
  Cc: lpieralisi, robh, bhelgaas, linux-pci, linux-kernel,
	linux-arm-kernel, vigneshr, srk, nm

Hello,

> Next Function Number field in ARI Capability Register for last function
> must be zero by default as per the PCIe specification, indicating there
> is no next higher number function but that's not happening in our case,
> so this patch clears the Next Function Number field for last function used.
> 
> Signed-off-by: Jasko-EXT Wojciech <wojciech.jasko-EXT@continental-corporation.com>
> Signed-off-by: Achal Verma <a-verma1@ti.com>
> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>

Applied to controller/cadence, thank you!

[1/1] PCI: cadence: Clear the ARI Capability Next Function Number of the last function
      https://git.kernel.org/pci/pci/c/667a006d73fb

	Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2024-03-10 18:34 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-12-02  8:50 [PATCH v4] PCI: Cadence: Clear the ARI Capability Next Function Number of the last function Siddharth Vadapalli
2024-03-10 18:34 ` Krzysztof Wilczyński

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox