* [PATCH 2/9] arm64: dts: rockchip: Add PMIC to Khadas Edge 2
2024-02-19 22:34 [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 efectn
@ 2024-02-19 22:34 ` efectn
2024-02-19 22:34 ` [PATCH 3/9] arm64: dts: rockchip: Add TF card " efectn
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: efectn @ 2024-02-19 22:34 UTC (permalink / raw)
To: linux-rockchip
Cc: devicetree, linux-arm-kernel, linux-kernel, robh+dt,
krzysztof.kozlowski+dt, conor+dt, heiko, sebastian.reichel,
Muhammed Efe Cetin
From: Muhammed Efe Cetin <efectn@protonmail.com>
This commit adds PMIC to Khadas Edge 2 board.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
---
.../dts/rockchip/rk3588s-khadas-edge2.dts | 335 ++++++++++++++++++
1 file changed, 335 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index 1d1ce70a0f3a..b99d2b82c787 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -26,6 +26,16 @@ vcc5v0_sys: vcc5v0-sys-regulator {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
+
+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v1_nldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
};
&cpu_b0 {
@@ -110,6 +120,331 @@ &sdhci {
status = "okay";
};
+&spi2 {
+ status = "okay";
+ assigned-clocks = <&cru CLK_SPI2>;
+ assigned-clock-rates = <200000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+ num-cs = <1>;
+
+ pmic@0 {
+ compatible = "rockchip,rk806";
+ spi-max-frequency = <1000000>;
+ reg = <0x0>;
+
+ interrupt-parent = <&gpio0>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+
+ system-power-controller;
+
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc5-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc5v0_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc5v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc5v0_sys>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl1";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ regulators {
+ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_gpu_s0";
+ regulator-enable-ramp-delay = <400>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_cpu_lit_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_log_s0: dcdc-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <750000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_log_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_vdenc_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <900000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vdd2_ddr_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vdd_2v0_pldo_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc_3v3_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg9 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vddq_ddr_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg10 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avcc_1v8_s0: pldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "avcc_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s0: pldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc_1v8_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avdd_1v2_s0: pldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "avdd_1v2_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3_s0: pldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vcc_3v3_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+ regulator-name = "vccio_sd_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ pldo6_s3: pldo-reg6 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "pldo6_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s3";
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_ddr_pll_s0: nldo-reg2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdd_ddr_pll_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ avdd_0v75_s0: nldo-reg3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "avdd_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v85_s0: nldo-reg4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-name = "vdd_0v85_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v75_s0: nldo-reg5 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ regulator-name = "vdd_0v75_s0";
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
--
2.43.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 3/9] arm64: dts: rockchip: Add TF card to Khadas Edge 2
2024-02-19 22:34 [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 efectn
2024-02-19 22:34 ` [PATCH 2/9] arm64: dts: rockchip: Add PMIC " efectn
@ 2024-02-19 22:34 ` efectn
2024-02-19 22:34 ` [PATCH 4/9] arm64: dts: rockchip: USB2, USB3 Host, PCIe2 " efectn
` (7 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: efectn @ 2024-02-19 22:34 UTC (permalink / raw)
To: linux-rockchip
Cc: devicetree, linux-arm-kernel, linux-kernel, robh+dt,
krzysztof.kozlowski+dt, conor+dt, heiko, sebastian.reichel,
Muhammed Efe Cetin
From: Muhammed Efe Cetin <efectn@protonmail.com>
Add TF card support to Khadas Edge 2.
The board exposes sdmmc pins via EXTIO. TF card can be used with IO
module.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
---
.../dts/rockchip/rk3588s-khadas-edge2.dts | 34 +++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index b99d2b82c787..856ce4f869a2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -12,6 +12,7 @@ / {
aliases {
mmc0 = &sdhci;
+ mmc1 = &sdmmc;
};
chosen {
@@ -36,6 +37,19 @@ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc5v0_sys>;
};
+
+ vdd_3v3_sd: vdd-3v3-sd-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd_3v3_sd";
+ gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
+ regulator-boot-on;
+ enable-active-high;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vcc_3v3_s3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vdd_sd_en>;
+ };
};
&cpu_b0 {
@@ -110,6 +124,14 @@ regulator-state-mem {
};
};
+&pinctrl {
+ vdd_sd {
+ vdd_sd_en: vdd-sd-en {
+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+};
+
&sdhci {
bus-width = <8>;
no-sdio;
@@ -120,6 +142,18 @@ &sdhci {
status = "okay";
};
+&sdmmc {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ disable-wp;
+ no-mmc;
+ no-sdio;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vdd_3v3_sd>;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";
+};
+
&spi2 {
status = "okay";
assigned-clocks = <&cru CLK_SPI2>;
--
2.43.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 4/9] arm64: dts: rockchip: USB2, USB3 Host, PCIe2 to Khadas Edge 2
2024-02-19 22:34 [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 efectn
2024-02-19 22:34 ` [PATCH 2/9] arm64: dts: rockchip: Add PMIC " efectn
2024-02-19 22:34 ` [PATCH 3/9] arm64: dts: rockchip: Add TF card " efectn
@ 2024-02-19 22:34 ` efectn
2024-02-19 22:34 ` [PATCH 5/9] arm64: dts: rockchip: Add ir receiver and leds " efectn
` (6 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: efectn @ 2024-02-19 22:34 UTC (permalink / raw)
To: linux-rockchip
Cc: devicetree, linux-arm-kernel, linux-kernel, robh+dt,
krzysztof.kozlowski+dt, conor+dt, heiko, sebastian.reichel,
Muhammed Efe Cetin
From: Muhammed Efe Cetin <efectn@protonmail.com>
Khadas Edge 2 has 1x USB2 with hub, 1x USB3 Host and 1x USB-C.
This commit adds support for PCIe2, USB3 Host and USB2.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
---
.../dts/rockchip/rk3588s-khadas-edge2.dts | 97 +++++++++++++++++++
1 file changed, 97 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index 856ce4f869a2..ea7f1bb7c908 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -38,6 +38,33 @@ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
vin-supply = <&vcc5v0_sys>;
};
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
+ vcc3v3_pcie_wl: vcc3v3-pcie-wl-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_2_vcc3v3_en>;
+ regulator-name = "vcc3v3_pcie_wl";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <5000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
vdd_3v3_sd: vdd-3v3-sd-regulator {
compatible = "regulator-fixed";
regulator-name = "vdd_3v3_sd";
@@ -84,6 +111,14 @@ &cpu_l3 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
+&combphy0_ps {
+ status = "okay";
+};
+
+&combphy2_psu {
+ status = "okay";
+};
+
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0m2_xfer>;
@@ -130,6 +165,30 @@ vdd_sd_en: vdd-sd-en {
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
+
+ pcie2 {
+ pcie2_2_rst: pcie2-2-rst {
+ rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pcie2_2_vcc3v3_en: pcie2-2-vcc-en {
+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pcie2x1l2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_2_rst>;
+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie_wl>;
+ status = "okay";
};
&sdhci {
@@ -483,3 +542,41 @@ &uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
+
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy2_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy3_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&usb_host2_xhci {
+ status = "okay";
+};
--
2.43.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 5/9] arm64: dts: rockchip: Add ir receiver and leds to Khadas Edge 2
2024-02-19 22:34 [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 efectn
` (2 preceding siblings ...)
2024-02-19 22:34 ` [PATCH 4/9] arm64: dts: rockchip: USB2, USB3 Host, PCIe2 " efectn
@ 2024-02-19 22:34 ` efectn
2024-02-19 22:34 ` [PATCH 6/9] arm64: dts: rockchip: Add saradc and adc buttons to Khadas Edge 2 and enable tsadc efectn
` (5 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: efectn @ 2024-02-19 22:34 UTC (permalink / raw)
To: linux-rockchip
Cc: devicetree, linux-arm-kernel, linux-kernel, robh+dt,
krzysztof.kozlowski+dt, conor+dt, heiko, sebastian.reichel,
Muhammed Efe Cetin
From: Muhammed Efe Cetin <efectn@protonmail.com>
Khadas Edge 2 exposes IR receiver pins as same as TF card via EXTIO. The
IR receiver is connected to MCU and SoC.
The board also has 2 PWM RGB leds. One is controlled by MCU and the
other is controlled by SoC. This commit adds support for the led
controlled by SoC using pwm-leds.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
---
.../dts/rockchip/rk3588s-khadas-edge2.dts | 66 +++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index ea7f1bb7c908..5a3b52e62dce 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -4,6 +4,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/leds/common.h>
#include "rk3588s.dtsi"
/ {
@@ -19,6 +20,47 @@ chosen {
stdout-path = "serial2:1500000n8";
};
+ ir-receiver {
+ compatible = "gpio-ir-receiver";
+ gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&ir_receiver_pin>;
+ };
+
+ leds {
+ compatible = "pwm-leds";
+
+ red_led: led-0 {
+ label = "red_led";
+ linux,default-trigger = "none";
+ default-state = "off";
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_RED>;
+ max-brightness = <255>;
+ pwms = <&pwm11 0 25000 0>;
+ };
+
+ green_led: led-1 {
+ label = "green_led";
+ linux,default-trigger = "default-on";
+ default-state = "on";
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_GREEN>;
+ max-brightness = <255>;
+ pwms = <&pwm14 0 25000 0>;
+ };
+
+ blue_led: led-2 {
+ label = "blue_led";
+ linux,default-trigger = "none";
+ default-state = "off";
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_BLUE>;
+ max-brightness = <255>;
+ pwms = <&pwm15 0 25000 0>;
+ };
+ };
+
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
@@ -181,6 +223,12 @@ vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ ir-receiver {
+ ir_receiver_pin: ir-receiver-pin {
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pcie2x1l2 {
@@ -191,6 +239,24 @@ &pcie2x1l2 {
status = "okay";
};
+&pwm11 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm11m1_pins>;
+ status = "okay";
+};
+
+&pwm14 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm14m1_pins>;
+ status = "okay";
+};
+
+&pwm15 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm15m1_pins>;
+ status = "okay";
+};
+
&sdhci {
bus-width = <8>;
no-sdio;
--
2.43.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 6/9] arm64: dts: rockchip: Add saradc and adc buttons to Khadas Edge 2 and enable tsadc
2024-02-19 22:34 [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 efectn
` (3 preceding siblings ...)
2024-02-19 22:34 ` [PATCH 5/9] arm64: dts: rockchip: Add ir receiver and leds " efectn
@ 2024-02-19 22:34 ` efectn
2024-02-19 22:34 ` [PATCH 7/9] arm64: dts: rockchip: Add SFC to Khadas Edge 2 efectn
` (4 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: efectn @ 2024-02-19 22:34 UTC (permalink / raw)
To: linux-rockchip
Cc: devicetree, linux-arm-kernel, linux-kernel, robh+dt,
krzysztof.kozlowski+dt, conor+dt, heiko, sebastian.reichel,
Muhammed Efe Cetin
From: Muhammed Efe Cetin <efectn@protonmail.com>
This commit enables tsadc, saradc and the
function button on saradc line for Khadas Edge 2.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
---
.../dts/rockchip/rk3588s-khadas-edge2.dts | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index 5a3b52e62dce..dfcdbec3534d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -3,6 +3,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/leds/common.h>
#include "rk3588s.dtsi"
@@ -20,6 +21,20 @@ chosen {
stdout-path = "serial2:1500000n8";
};
+ adc-keys {
+ compatible = "adc-keys";
+ io-channels = <&saradc 1>;
+ io-channel-names = "buttons";
+ keyup-threshold-microvolt = <1800000>;
+ poll-interval = <100>;
+
+ button-function {
+ label = "Function";
+ linux,code = <KEY_FN>;
+ press-threshold-microvolt = <17000>;
+ };
+ };
+
ir-receiver {
compatible = "gpio-ir-receiver";
gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
@@ -257,6 +272,11 @@ &pwm15 {
status = "okay";
};
+&saradc {
+ vref-supply = <&avcc_1v8_s0>;
+ status = "okay";
+};
+
&sdhci {
bus-width = <8>;
no-sdio;
@@ -604,6 +624,10 @@ regulator-state-mem {
};
};
+&tsadc {
+ status = "okay";
+};
+
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
--
2.43.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 7/9] arm64: dts: rockchip: Add SFC to Khadas Edge 2
2024-02-19 22:34 [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 efectn
` (4 preceding siblings ...)
2024-02-19 22:34 ` [PATCH 6/9] arm64: dts: rockchip: Add saradc and adc buttons to Khadas Edge 2 and enable tsadc efectn
@ 2024-02-19 22:34 ` efectn
2024-02-19 22:34 ` [PATCH 8/9] arm64: dts: rockchip: Add UART9 (bluetooth) " efectn
` (3 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: efectn @ 2024-02-19 22:34 UTC (permalink / raw)
To: linux-rockchip
Cc: devicetree, linux-arm-kernel, linux-kernel, robh+dt,
krzysztof.kozlowski+dt, conor+dt, heiko, sebastian.reichel,
Muhammed Efe Cetin
From: Muhammed Efe Cetin <efectn@protonmail.com>
This commit adds SPI flash support for Khadas Edge 2.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
---
.../boot/dts/rockchip/rk3588s-khadas-edge2.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index dfcdbec3534d..c2a329f151a1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -299,6 +299,20 @@ &sdmmc {
status = "okay";
};
+&sfc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&fspim2_pins>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0x0>;
+ spi-max-frequency = <100000000>;
+ spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
&spi2 {
status = "okay";
assigned-clocks = <&cru CLK_SPI2>;
--
2.43.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 8/9] arm64: dts: rockchip: Add UART9 (bluetooth) to Khadas Edge 2
2024-02-19 22:34 [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 efectn
` (5 preceding siblings ...)
2024-02-19 22:34 ` [PATCH 7/9] arm64: dts: rockchip: Add SFC to Khadas Edge 2 efectn
@ 2024-02-19 22:34 ` efectn
2024-02-19 22:34 ` [PATCH 9/9] arm64: dts: rockchip: Add RTC " efectn
` (2 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: efectn @ 2024-02-19 22:34 UTC (permalink / raw)
To: linux-rockchip
Cc: devicetree, linux-arm-kernel, linux-kernel, robh+dt,
krzysztof.kozlowski+dt, conor+dt, heiko, sebastian.reichel,
Muhammed Efe Cetin
From: Muhammed Efe Cetin <efectn@protonmail.com>
Khadas Edge 2 has onboard AP6275P Wi-Fi6 (PCIe2) and BT5 (UART9) module.
This commit enables UART9.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
---
.../dts/rockchip/rk3588s-khadas-edge2.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index c2a329f151a1..767e21b2dc34 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -244,6 +244,20 @@ ir_receiver_pin: ir-receiver-pin {
rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ wireless-bluetooth {
+ bt_reset_pin: bt-reset-pin {
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ bt_wake_pin: bt-wake-pin {
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ bt_wake_host_irq: bt-wake-host-irq {
+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
};
&pcie2x1l2 {
@@ -647,6 +661,12 @@ &uart2 {
status = "okay";
};
+&uart9 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>;
+ status = "okay";
+};
+
&u2phy2 {
status = "okay";
};
--
2.43.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 9/9] arm64: dts: rockchip: Add RTC to Khadas Edge 2
2024-02-19 22:34 [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 efectn
` (6 preceding siblings ...)
2024-02-19 22:34 ` [PATCH 8/9] arm64: dts: rockchip: Add UART9 (bluetooth) " efectn
@ 2024-02-19 22:34 ` efectn
2024-03-30 11:25 ` [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys " efectn
2024-04-11 18:29 ` Heiko Stuebner
9 siblings, 0 replies; 11+ messages in thread
From: efectn @ 2024-02-19 22:34 UTC (permalink / raw)
To: linux-rockchip
Cc: devicetree, linux-arm-kernel, linux-kernel, robh+dt,
krzysztof.kozlowski+dt, conor+dt, heiko, sebastian.reichel,
Muhammed Efe Cetin
From: Muhammed Efe Cetin <efectn@protonmail.com>
Khadas Edge 2 has PT7C4363 RTC that compatible with HYM8563.
The RTC pinctrl is also connected to MCU.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
---
.../arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index 767e21b2dc34..2022a174594c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -216,6 +216,18 @@ regulator-state-mem {
};
};
+&i2c2 {
+ status = "okay";
+
+ hym8563: rtc@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-output-names = "hym8563";
+ wakeup-source;
+ };
+};
+
&pinctrl {
vdd_sd {
vdd_sd_en: vdd-sd-en {
--
2.43.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2
2024-02-19 22:34 [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 efectn
` (7 preceding siblings ...)
2024-02-19 22:34 ` [PATCH 9/9] arm64: dts: rockchip: Add RTC " efectn
@ 2024-03-30 11:25 ` efectn
2024-04-11 18:29 ` Heiko Stuebner
9 siblings, 0 replies; 11+ messages in thread
From: efectn @ 2024-03-30 11:25 UTC (permalink / raw)
To: heiko
Cc: conor+dt, devicetree, efectn, krzysztof.kozlowski+dt,
linux-arm-kernel, linux-kernel, linux-rockchip, robh+dt,
sebastian.reichel
Hi Heiko,
Sorry if i bother you. Can you review the series? If there is a problem i will send the v2.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2
2024-02-19 22:34 [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 efectn
` (8 preceding siblings ...)
2024-03-30 11:25 ` [PATCH 1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys " efectn
@ 2024-04-11 18:29 ` Heiko Stuebner
9 siblings, 0 replies; 11+ messages in thread
From: Heiko Stuebner @ 2024-04-11 18:29 UTC (permalink / raw)
To: linux-rockchip, efectn
Cc: Heiko Stuebner, linux-kernel, Muhammed Efe Cetin,
krzysztof.kozlowski+dt, conor+dt, devicetree, sebastian.reichel,
linux-arm-kernel, robh+dt
On Tue, 20 Feb 2024 01:34:17 +0300, efectn@6tel.net wrote:
> From: Muhammed Efe Cetin <efectn@protonmail.com>
>
> This commit adds 5V fixed power regulator and CPU regulators to Khadas
> Edge 2.
>
>
Applied, thanks!
[1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2
commit: 925273ba9e71184a6dcde0f902b4245ed64885d1
[2/9] arm64: dts: rockchip: Add PMIC to Khadas Edge 2
commit: 3b5d2327cb749017322ce09f7107cdc82f1a92fa
[3/9] arm64: dts: rockchip: Add TF card to Khadas Edge 2
commit: 4a3afe9cf3711f222a9dadf50bd2e9770bb6a095
[4/9] arm64: dts: rockchip: USB2, USB3 Host, PCIe2 to Khadas Edge 2
commit: f786eda805aa91340e151322ccc6c0ba4a591f9f
[5/9] arm64: dts: rockchip: Add ir receiver and leds to Khadas Edge 2
commit: af6943f502b6db1ba3bc5199069c662218e23261
[6/9] arm64: dts: rockchip: Add saradc and adc buttons to Khadas Edge 2 and enable tsadc
commit: 25e31aaebed4b0e242d9a71170f8dfdf9cc8a304
[7/9] arm64: dts: rockchip: Add SFC to Khadas Edge 2
commit: 8711dca3b5f7a3834ae1129512f98a2367940a07
[8/9] arm64: dts: rockchip: Add UART9 (bluetooth) to Khadas Edge 2
commit: e438acfda8a0088a3c7f450a7ffefeb56074e41e
[9/9] arm64: dts: rockchip: Add RTC to Khadas Edge 2
commit: c0b3c764b64a5c8eee056e62580de0f44e7dcd0f
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 11+ messages in thread