From: Maxime Ripard <mripard@kernel.org>
To: Sean Nyekjaer <sean@geanix.com>
Cc: Yannick Fertre <yannick.fertre@foss.st.com>,
Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>,
Philippe Cornu <philippe.cornu@foss.st.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Robert Foss <rfoss@kernel.org>,
Antonio Borneo <antonio.borneo@foss.st.com>,
dri-devel@lists.freedesktop.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] drm/stm: dsi: relax mode_valid clock tolerance
Date: Tue, 30 Apr 2024 09:48:05 +0200 [thread overview]
Message-ID: <20240430-exuberant-ludicrous-caiman-bc7dac@houat> (raw)
In-Reply-To: <cvzecixldubeq7pwn77cggs7tcwc5on3arlnboj4fbpqgdygtu@hat3r6afzu7y>
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Hi,
On Mon, Apr 29, 2024 at 10:17:45AM +0200, Sean Nyekjaer wrote:
> On Wed, Apr 24, 2024 at 09:21:17AM UTC, Maxime Ripard wrote:
> > Hi,
> >
> > Sorry, my previous review didn't go through.
> >
> > On Fri, Mar 22, 2024 at 11:47:31AM +0100, Sean Nyekjaer wrote:
> > > When using the DSI interface via DSI2LVDS bridge, it seems a bit harsh
> > > to reguire the requested and the actual px clock to be within
> > > 50Hz. A typical LVDS display requires the px clock to be within +-10%.
> > >
> > > In case for HDMI .5% tolerance is required.
> > >
> > > Fixes: e01356d18273 ("drm/stm: dsi: provide the implementation of mode_valid()")
> > > Signed-off-by: Sean Nyekjaer <sean@geanix.com>
> > > ---
> > > drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 7 +++----
> > > 1 file changed, 3 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
> > > index d5f8c923d7bc..97936b0ef702 100644
> > > --- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
> > > +++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c
> > > @@ -322,8 +322,6 @@ dw_mipi_dsi_phy_get_timing(void *priv_data, unsigned int lane_mbps,
> > > return 0;
> > > }
> > >
> > > -#define CLK_TOLERANCE_HZ 50
> > > -
> > > static enum drm_mode_status
> > > dw_mipi_dsi_stm_mode_valid(void *priv_data,
> > > const struct drm_display_mode *mode,
> > > @@ -375,9 +373,10 @@ dw_mipi_dsi_stm_mode_valid(void *priv_data,
> > > /*
> > > * Filter modes according to the clock value, particularly useful for
> > > * hdmi modes that require precise pixel clocks.
> > > + * Check that px_clock is within .5% tolerance.
> > > */
> > > - if (px_clock_hz < target_px_clock_hz - CLK_TOLERANCE_HZ ||
> > > - px_clock_hz > target_px_clock_hz + CLK_TOLERANCE_HZ)
> > > + if (px_clock_hz < mult_frac(target_px_clock_hz, 995, 1000) ||
> > > + px_clock_hz > mult_frac(target_px_clock_hz, 1005, 1000))
> > > return MODE_CLOCK_RANGE;
> >
> > I wonder if it's not something that should be made into a helper. We
> > have a couple of drivers doing it already, so it might be worth creating
> > a function that checks for a given struct clk pointer and pixel clock if
> > it's within parameters.
> >
> > Maxime
>
> Yes agree, if the same calculation is happening other places.
> I can't identify where it happens though.
sun4i has one:
https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/sun4i/sun4i_rgb.c#L123
> Would that helper function exist in drivers/gpu/drm/drm_hdmi_helper.c ?
There's nothing related to HDMI per se, so in drm_modes is probably
better.
Maxime
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prev parent reply other threads:[~2024-04-30 7:48 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-22 10:47 [PATCH] drm/stm: dsi: relax mode_valid clock tolerance Sean Nyekjaer
2024-04-22 14:05 ` Sean Nyekjaer
2024-04-23 13:32 ` Robert Foss
2024-05-15 6:39 ` Yannick FERTRE
2024-05-15 7:42 ` Sean Nyekjaer
2024-05-16 7:57 ` Maxime Ripard
2024-04-24 7:21 ` Maxime Ripard
2024-04-29 8:17 ` Sean Nyekjaer
2024-04-30 7:48 ` Maxime Ripard [this message]
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