From: Nishanth Menon <nm@ti.com>
To: Dhruva Gole <d-gole@ti.com>
Cc: Conor Dooley <conor+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Rob Herring <robh@kernel.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Tero Kristo <kristo@kernel.org>,
Vignesh Raghavendra <vigneshr@ti.com>,
Vaishnav Achath <vaishnav.a@ti.com>,
Jared McArthur <j-mcarthur@ti.com>, Bryan Brattlof <bb@ti.com>
Subject: Re: [PATCH 1/3] arm64: dts: ti: k3-pinctrl: Define a generic GPIO MUX Mode
Date: Wed, 19 Jun 2024 08:02:40 -0500 [thread overview]
Message-ID: <20240619130240.azkb4fwhrnwlsv45@uneasily> (raw)
In-Reply-To: <20240619045258.xy4pwqv6ut5wzk63@dhruva>
On 10:22-20240619, Dhruva Gole wrote:
> Hi Nishanth,
>
> On Jun 18, 2024 at 12:31:21 -0500, Nishanth Menon wrote:
> > Introduce a GPIO mux mode macro for easier readability. All K3 devices
> > use mux mode 7 to switch to GPIO mux.
> >
> > Signed-off-by: Nishanth Menon <nm@ti.com>
> > ---
> > arch/arm64/boot/dts/ti/k3-pinctrl.h | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/ti/k3-pinctrl.h b/arch/arm64/boot/dts/ti/k3-pinctrl.h
> > index 4cd2df467d0b..b1a0415e6611 100644
> > --- a/arch/arm64/boot/dts/ti/k3-pinctrl.h
> > +++ b/arch/arm64/boot/dts/ti/k3-pinctrl.h
> > @@ -38,6 +38,8 @@
> > #define PIN_DEBOUNCE_CONF5 (5 << DEBOUNCE_SHIFT)
> > #define PIN_DEBOUNCE_CONF6 (6 << DEBOUNCE_SHIFT)
> >
> > +#define PIN_GPIO_MUX_MODE (7)
> > +
>
> While I do agree that this is a standard thing, don't you think that
> updating it everywhere else (k3 DTs) makes sense? Having the number 7 in some
> places and others having PIN_GPIO_MUX_MODE will give rise to confusion I
> feel.
>
Yes, thinking again, we will repeat using this for other SoCs as well for
gpio-ranges. I think it might be better if we did this instead:
/* Default mux configuration for gpio-ranges use with pinctrl */
#define PIN_GPIO_RANGE_IOPAD (PIN_INPUT | 7)
* Clears up the understanding what the define is for.
* Consistent usage across K3 SoCs.
* Prevents mis-understanding where to use the macro.
Thoughts?
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
next prev parent reply other threads:[~2024-06-19 13:03 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-18 17:31 [PATCH 0/3] arm64: dts: ti: k3-am62p/j722s: Add gpio-ranges properties Nishanth Menon
2024-06-18 17:31 ` [PATCH 1/3] arm64: dts: ti: k3-pinctrl: Define a generic GPIO MUX Mode Nishanth Menon
2024-06-19 4:52 ` Dhruva Gole
2024-06-19 13:02 ` Nishanth Menon [this message]
2024-06-18 17:31 ` [PATCH 2/3] arm64: dts: ti: k3-am62p: Add gpio-ranges properties Nishanth Menon
2024-06-19 8:00 ` Dhruva Gole
2024-06-18 17:31 ` [PATCH 3/3] arm64: dts: ti: k3-j722s: " Nishanth Menon
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