From: Will Deacon <will@kernel.org>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: robin.murphy@arm.com, joro@8bytes.org, jgg@nvidia.com,
thierry.reding@gmail.com, vdumpa@nvidia.com,
jonathanh@nvidia.com, linux-kernel@vger.kernel.org,
iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-tegra@vger.kernel.org
Subject: Re: [PATCH v9 4/6] iommu/arm-smmu-v3: Add CS_NONE quirk for CONFIG_TEGRA241_CMDQV
Date: Mon, 8 Jul 2024 12:43:26 +0100 [thread overview]
Message-ID: <20240708114326.GE11567@willie-the-truck> (raw)
In-Reply-To: <20240708112928.GB11567@willie-the-truck>
On Mon, Jul 08, 2024 at 12:29:28PM +0100, Will Deacon wrote:
> On Fri, Jul 05, 2024 at 11:10:42AM -0700, Nicolin Chen wrote:
> > But if you insist on having an smmu option, we still have to take in the
> > PATCH-3 in this series, enforcing an arm_smmu_cmdq_build_sync_cmd() call
> > in the IRQ handler too. So, it would eventually look like [attachment].
>
> With my hacks, I think you can just call arm_smmu_cmdq_build_sync_cmd()
> from the irqhandler and it will work.
Hmm, actually, that will mean we end up using MSIs for the error case on
hardware which supports it, which is a strange change in behaviour.
What does your hardware do if it sees SIG_SEV in a CMD_SYNC? Is it just
a case of failing to generate the event on completion, or does it treat
it as an invalid opcode?
Will
next prev parent reply other threads:[~2024-07-08 11:43 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-12 21:45 [PATCH v9 0/6] Add Tegra241 (Grace) CMDQV Support (part 1/2) Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 1/6] iommu/arm-smmu-v3: Make symbols public for CONFIG_TEGRA241_CMDQV Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 2/6] iommu/arm-smmu-v3: Issue a batch of commands to the same cmdq Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 3/6] iommu/arm-smmu-v3: Enforce arm_smmu_cmdq_build_sync_cmd Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 4/6] iommu/arm-smmu-v3: Add CS_NONE quirk for CONFIG_TEGRA241_CMDQV Nicolin Chen
2024-07-02 17:43 ` Will Deacon
2024-07-02 18:19 ` Nicolin Chen
2024-07-02 18:49 ` Will Deacon
2024-07-02 19:47 ` Nicolin Chen
2024-07-02 20:10 ` Nicolin Chen
2024-07-05 15:27 ` Will Deacon
2024-07-05 18:10 ` Nicolin Chen
2024-07-06 0:32 ` Nicolin Chen
2024-07-08 11:31 ` Will Deacon
2024-07-08 18:02 ` Nicolin Chen
2024-07-08 11:29 ` Will Deacon
2024-07-08 11:43 ` Will Deacon [this message]
2024-07-08 18:05 ` Nicolin Chen
2024-07-08 17:59 ` Nicolin Chen
2024-07-09 18:29 ` Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 5/6] iommu/arm-smmu-v3: Add in-kernel support for NVIDIA Tegra241 (Grace) CMDQV Nicolin Chen
2024-07-02 17:41 ` Will Deacon
2024-07-02 19:23 ` Nicolin Chen
2024-06-12 21:45 ` [PATCH v9 6/6] iommu/tegra241-cmdqv: Limit CMDs for guest owned VINTF Nicolin Chen
2024-06-28 19:26 ` [PATCH v9 0/6] Add Tegra241 (Grace) CMDQV Support (part 1/2) Pavel Machek
2024-06-28 21:29 ` Nicolin Chen
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