From: Anshuman Khandual <anshuman.khandual@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: mark.rutland@arm.com, Anshuman Khandual <anshuman.khandual@arm.com>
Subject: [boot-wrapper 0/3] aarch64: Enable access for FEAT_D128 registers in EL1/EL2
Date: Tue, 23 Jul 2024 16:36:27 +0530 [thread overview]
Message-ID: <20240723110630.483871-1-anshuman.khandual@arm.com> (raw)
This series enables access for FEAT_D128 relevant registers in EL1/EL2 via
setting respective bits in SCR_EL3, when their corresponding features are
detected.
--------------------------------------------------------------
| FEAT_D128 | ID_AA64MMFR3_EL1_D128 | SCR_EL3_D128En |
| FEAT_SCTLR2 | ID_AA64MMFR3_EL1_SCTLRX | SCR_EL3_SCTLR2En |
| FEAT_THE | ID_AA64PFR1_EL1_THE | SCR_EL3_RCWMASKEn |
--------------------------------------------------------------
Anshuman Khandual (3):
aarch64: Enable access into 128 bit system registers from EL2 and below
aarch64: Enable access into SCTLR2_ELx registers from EL2 and below
aarch64: Enable access into RCW[S]MASK_EL1 registers from EL2 and below
arch/aarch64/include/asm/cpu.h | 8 +++++++-
arch/aarch64/init.c | 9 +++++++++
2 files changed, 16 insertions(+), 1 deletion(-)
--
2.25.1
next reply other threads:[~2024-07-23 11:07 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-23 11:06 Anshuman Khandual [this message]
2024-07-23 11:06 ` [boot-wrapper 1/3] aarch64: Enable access into 128 bit system registers from EL2 and below Anshuman Khandual
2024-07-25 8:44 ` Mark Rutland
2024-07-26 7:12 ` Anshuman Khandual
2024-07-23 11:06 ` [boot-wrapper 2/3] aarch64: Enable access into SCTLR2_ELx " Anshuman Khandual
2024-07-25 8:40 ` Mark Rutland
2024-07-26 6:55 ` Anshuman Khandual
2024-07-26 8:45 ` Mark Rutland
2024-07-23 11:06 ` [boot-wrapper 3/3] aarch64: Enable access into RCW[S]MASK_EL1 " Anshuman Khandual
2024-07-25 8:51 ` Mark Rutland
2024-07-26 8:31 ` Anshuman Khandual
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