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From: Leo Yan <leo.yan@arm.com>
To: Arnaldo Carvalho de Melo <acme@kernel.org>,
	Will Deacon <will@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	James Clark <james.clark@linaro.org>,
	John Garry <john.g.garry@oracle.com>,
	Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	"Liang, Kan" <kan.liang@linux.intel.com>,
	Jonathan Cameron <jonathan.cameron@huawei.com>,
	Yicong Yang <yangyicong@hisilicon.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, coresight@lists.linaro.org,
	linux-perf-users@vger.kernel.org
Cc: Leo Yan <leo.yan@arm.com>
Subject: [PATCH v1 7/9] perf arm-spe: Save per CPU information in metadata
Date: Tue, 27 Aug 2024 17:44:15 +0100	[thread overview]
Message-ID: <20240827164417.3309560-8-leo.yan@arm.com> (raw)
In-Reply-To: <20240827164417.3309560-1-leo.yan@arm.com>

An Arm SPE event can include all CPUs or just a subset of CPUs in a
system.

Instead of storing the Arm SPE event parameters in a single metadata
entry, save the Arm SPE information on a per-CPU basis. This approach
aligns with how Arm SPE traces are recorded per CPU, making it easier
to match metadata with trace data.

Signed-off-by: Leo Yan <leo.yan@arm.com>
---
 tools/perf/arch/arm64/util/arm-spe.c | 73 ++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

diff --git a/tools/perf/arch/arm64/util/arm-spe.c b/tools/perf/arch/arm64/util/arm-spe.c
index f8126283dad2..d0cff3ac7c1f 100644
--- a/tools/perf/arch/arm64/util/arm-spe.c
+++ b/tools/perf/arch/arm64/util/arm-spe.c
@@ -73,14 +73,74 @@ arm_spe_info_priv_size(struct auxtrace_record *itr __maybe_unused,
 	return size;
 }
 
+static int arm_spe_save_cpu_header(struct auxtrace_record *itr,
+				   struct perf_cpu cpu, __u64 data[])
+{
+	struct arm_spe_recording *sper =
+			container_of(itr, struct arm_spe_recording, itr);
+	struct perf_pmu *pmu = NULL;
+	struct perf_pmu tmp_pmu;
+	char cpu_id_str[16];
+	char *cpuid = NULL;
+	u64 val;
+	int i;
+
+	snprintf(cpu_id_str, sizeof(cpu_id_str), "%d", cpu.cpu);
+	tmp_pmu.cpus = perf_cpu_map__new(cpu_id_str);
+	if (!tmp_pmu.cpus)
+		return -ENOMEM;
+
+	/* Read CPU MIDR */
+	cpuid = perf_pmu__getcpuid(&tmp_pmu);
+	if (!cpuid)
+		return -ENOMEM;
+	val = strtol(cpuid, NULL, 16);
+	perf_cpu_map__put(tmp_pmu.cpus);
+
+	data[ARM_SPE_CPU] = cpu.cpu;
+	data[ARM_SPE_CPU_MIDR] = val;
+
+	/* Find the associate Arm SPE PMU for the CPU */
+	for (i = 0; i < sper->nr_pmu; i++) {
+		if (perf_cpu_map__has(sper->pmu[i]->cpus, cpu)) {
+			pmu = sper->pmu[i];
+			break;
+		}
+	}
+
+	if (!pmu) {
+		/* No Arm SPE PMU is found */
+		data[ARM_SPE_CPU_PMU_TYPE] = ULLONG_MAX;
+		data[ARM_SPE_CAP_MIN_IVAL] = 0;
+		data[ARM_SPE_CAP_LDS] = 0;
+	} else {
+		data[ARM_SPE_CPU_PMU_TYPE] = pmu->type;
+
+		if (perf_pmu__scan_file(pmu, "caps/min_interval", "%lu", &val) != 1)
+			val = 0;
+		data[ARM_SPE_CAP_MIN_IVAL] = val;
+
+		if (perf_pmu__scan_file(pmu, "caps/lds", "%lu", &val) != 1)
+			val = 0;
+		data[ARM_SPE_CAP_LDS] = val;
+	}
+
+	return ARM_SPE_PER_CPU_PRIV_MAX;
+}
+
 static int arm_spe_info_fill(struct auxtrace_record *itr,
 			     struct perf_session *session,
 			     struct perf_record_auxtrace_info *auxtrace_info,
 			     size_t priv_size)
 {
+	int i, ret;
+	size_t offset;
 	struct arm_spe_recording *sper =
 			container_of(itr, struct arm_spe_recording, itr);
 	struct perf_pmu *arm_spe_pmu = sper->pmu[0];
+	struct perf_cpu_map *cpu_map = arm_spe_find_cpus(session->evlist);
+	struct perf_cpu cpu;
+	__u64 *data;
 
 	if (priv_size != arm_spe_info_priv_size(itr, session->evlist))
 		return -EINVAL;
@@ -90,7 +150,20 @@ static int arm_spe_info_fill(struct auxtrace_record *itr,
 
 	auxtrace_info->type = PERF_AUXTRACE_ARM_SPE;
 	auxtrace_info->priv[ARM_SPE_PMU_TYPE] = arm_spe_pmu->type;
+	auxtrace_info->priv[ARM_SPE_HEADER_VERSION] = ARM_SPE_HEADER_CURRENT_VERSION;
+	auxtrace_info->priv[ARM_SPE_CPU_NUM] = perf_cpu_map__nr(cpu_map);
+
+	offset = ARM_SPE_CPU_NUM + 1;
+	perf_cpu_map__for_each_cpu(cpu, i, cpu_map) {
+		assert(offset < priv_size);
+		data = &auxtrace_info->priv[offset];
+		ret = arm_spe_save_cpu_header(itr, cpu, data);
+		if (ret < 0)
+			return ret;
+		offset += ret;
+	}
 
+	perf_cpu_map__put(cpu_map);
 	return 0;
 }
 
-- 
2.34.1



  parent reply	other threads:[~2024-08-27 16:51 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-27 16:44 [PATCH v1 0/9] perf arm-spe: Introduce metadata version 2 Leo Yan
2024-08-27 16:44 ` [PATCH v1 1/9] perf: arm_spe: Introduce 'lds' capacity Leo Yan
2024-08-30 10:38   ` Will Deacon
2024-08-30 12:12     ` Leo Yan
2024-08-30 13:09       ` Will Deacon
2024-08-31 11:37         ` Leo Yan
2024-09-04 12:35           ` Will Deacon
2024-09-04 14:02             ` Leo Yan
2024-08-27 16:44 ` [PATCH v1 2/9] perf auxtrace arm: Refactor error handling Leo Yan
2024-08-27 16:44 ` [PATCH v1 3/9] perf auxtrace arm: Introduce find_auxtrace_pmus_by_name() Leo Yan
2024-08-27 16:44 ` [PATCH v1 4/9] perf: arm-spe: Record multiple PMUs Leo Yan
2024-08-27 16:44 ` [PATCH v1 5/9] perf arm-spe: Extend meta data header for version 2 Leo Yan
2024-08-27 16:44 ` [PATCH v1 6/9] perf arm-spe: Calculate meta data size Leo Yan
2024-08-27 16:44 ` Leo Yan [this message]
2024-08-27 16:44 ` [PATCH v1 8/9] perf arm-spe: Support metadata version 2 Leo Yan
2024-08-27 16:44 ` [PATCH v1 9/9] perf arm-spe: Dump metadata with " Leo Yan
2024-08-28 16:20   ` James Clark
2024-08-30  7:54     ` Leo Yan

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