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From: Conor Dooley <conor@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: conor@kernel.org, Conor Dooley <conor.dooley@microchip.com>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	pierre-henry.moussay@microchip.com,
	valentina.fernandezalanis@microchip.com,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Jassi Brar <jassisinghbrar@gmail.com>, Lee Jones <lee@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v1 01/11] dt-bindings: mailbox: mpfs: fix reg properties
Date: Wed,  2 Oct 2024 11:47:59 +0100	[thread overview]
Message-ID: <20241002-stingily-condone-576e948e6d67@spud> (raw)
In-Reply-To: <20241002-private-unequal-33cfa6101338@spud>

From: Conor Dooley <conor.dooley@microchip.com>

When the binding for this was originally written, and later modified,
mistakes were made - and the precise nature of the later modification
should have been a giveaway, but alas I was naive at the time.

A more correct modelling of the hardware is to use two syscons and have
a single reg entry for the mailbox, containing the mailbox region. The
two syscons contain the general control/status registers for the mailbox
and the interrupt related registers respectively. The reason for two
syscons is that the same mailbox is present on the non-SoC version of
the FPGA, which has no interrupt controller, and the shared part of the
rtl was unchanged between devices.

This is now coming to a head, because the control/status registers share
a register region with the "tvs" (temperature & voltage sensors)
registers and, as it turns out, people do want to monitor temperatures
and voltages...

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../bindings/mailbox/microchip,mpfs-mailbox.yaml    | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
index 404477910f029..1332aab9a888f 100644
--- a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
+++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
@@ -15,6 +15,8 @@ properties:
 
   reg:
     oneOf:
+      - items:
+          - description: mailbox data registers
       - items:
           - description: mailbox control & data registers
           - description: mailbox interrupt registers
@@ -23,6 +25,7 @@ properties:
           - description: mailbox control registers
           - description: mailbox interrupt registers
           - description: mailbox data registers
+        deprecated: true
 
   interrupts:
     maxItems: 1
@@ -41,12 +44,12 @@ additionalProperties: false
 examples:
   - |
     soc {
-      #address-cells = <2>;
-      #size-cells = <2>;
-      mbox: mailbox@37020000 {
+      #address-cells = <1>;
+      #size-cells = <1>;
+
+      mailbox@37020800 {
         compatible = "microchip,mpfs-mailbox";
-        reg = <0x0 0x37020000 0x0 0x58>, <0x0 0x2000318C 0x0 0x40>,
-              <0x0 0x37020800 0x0 0x100>;
+        reg = <0x37020800 0x100>;
         interrupt-parent = <&L1>;
         interrupts = <96>;
         #mbox-cells = <1>;
-- 
2.45.2



  reply	other threads:[~2024-10-02 10:51 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-02 10:47 [PATCH v1 00/11] Redo PolarFire SoC's mailbox/clock devicestrees and related code Conor Dooley
2024-10-02 10:47 ` Conor Dooley [this message]
2024-10-02 23:13   ` [PATCH v1 01/11] dt-bindings: mailbox: mpfs: fix reg properties Rob Herring (Arm)
2024-10-02 10:48 ` [PATCH v1 02/11] mailbox: mpfs: support new, syscon based, devicetree configuration Conor Dooley
2024-10-02 10:48 ` [PATCH v1 03/11] dt-bindings: mfd: syscon document the non simple-mfd syscon on PolarFire SoC Conor Dooley
2024-10-02 23:28   ` Rob Herring (Arm)
2024-10-09 16:12   ` (subset) " Lee Jones
2024-10-02 10:48 ` [PATCH v1 04/11] dt-bindings: soc: microchip: document the two simple-mfd syscons " Conor Dooley
2024-10-02 23:28   ` Rob Herring
2024-10-02 10:48 ` [PATCH v1 05/11] soc: microchip: add mfd drivers for two syscon regions " Conor Dooley
2024-10-02 10:48 ` [PATCH v1 06/11] reset: mpfs: add non-auxiliary bus probing Conor Dooley
2024-10-02 11:59   ` Philipp Zabel
2024-10-02 10:48 ` [PATCH v1 07/11] dt-bindings: clk: microchip: mpfs: remove first reg region Conor Dooley
2024-10-02 23:36   ` Rob Herring (Arm)
2024-10-02 10:48 ` [PATCH v1 08/11] clk: move meson clk-regmap implementation to common code Conor Dooley
2024-10-02 11:20   ` Neil Armstrong
2024-10-02 13:21     ` Jerome Brunet
2024-10-03 11:33       ` Conor Dooley
2024-11-06 12:56         ` Conor Dooley
2024-11-15  1:29           ` Stephen Boyd
2024-11-28 10:36             ` Conor Dooley
2024-12-03 22:50               ` Stephen Boyd
2024-12-06 13:56                 ` Conor Dooley
2025-01-21 17:38                   ` Conor Dooley
2025-02-20 15:29                     ` Conor Dooley
2024-10-02 10:48 ` [PATCH v1 09/11] clk: microchip: mpfs: use regmap clock types Conor Dooley
2024-10-02 10:48 ` [PATCH v1 10/11] riscv: dts: microchip: fix mailbox description Conor Dooley
2024-10-14 15:41   ` Conor Dooley
2024-10-02 10:48 ` [PATCH v1 11/11] riscv: dts: microchip: convert clock and reset to use syscon Conor Dooley

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