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From: Eric Biggers <ebiggers@kernel.org>
To: Ard Biesheuvel <ardb+git@google.com>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
	herbert@gondor.apana.org.au, will@kernel.org,
	catalin.marinas@arm.com, Ard Biesheuvel <ardb@kernel.org>,
	Kees Cook <kees@kernel.org>
Subject: Re: [PATCH v4 2/3] arm64/crc32: Reorganize bit/byte ordering macros
Date: Fri, 18 Oct 2024 16:54:13 -0700	[thread overview]
Message-ID: <20241018235413.GA2589@sol.localdomain> (raw)
In-Reply-To: <20241018075347.2821102-7-ardb+git@google.com>

On Fri, Oct 18, 2024 at 09:53:50AM +0200, Ard Biesheuvel wrote:
> From: Ard Biesheuvel <ardb@kernel.org>
> 
> In preparation for a new user, reorganize the bit/byte ordering macros
> that are used to parameterize the crc32 template code and instantiate
> CRC-32, CRC-32c and 'big endian' CRC-32.
> 
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
> ---
>  arch/arm64/lib/crc32.S | 91 +++++++++-----------
>  1 file changed, 39 insertions(+), 52 deletions(-)

Reviewed-by: Eric Biggers <ebiggers@google.com>

- Eric


  reply	other threads:[~2024-10-18 23:57 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-18  7:53 [PATCH v4 0/3] arm64: Speed up CRC-32 using PMULL instructions Ard Biesheuvel
2024-10-18  7:53 ` [PATCH v4 1/3] arm64/lib: Handle CRC-32 alternative in C code Ard Biesheuvel
2024-10-18  7:53 ` [PATCH v4 2/3] arm64/crc32: Reorganize bit/byte ordering macros Ard Biesheuvel
2024-10-18 23:54   ` Eric Biggers [this message]
2024-10-18  7:53 ` [PATCH v4 3/3] arm64/crc32: Implement 4-way interleave using PMULL Ard Biesheuvel
2024-10-18 23:56   ` Eric Biggers
2024-10-22 11:36 ` [PATCH v4 0/3] arm64: Speed up CRC-32 using PMULL instructions Catalin Marinas

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