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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: kw@linux.com, bhelgaas@google.com, lpieralisi@kernel.org,
	frank.li@nxp.com, l.stach@pengutronix.de, robh+dt@kernel.org,
	conor+dt@kernel.org, shawnguo@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, festevam@gmail.com,
	s.hauer@pengutronix.de, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	kernel@pengutronix.de, imx@lists.linux.dev
Subject: Re: [PATCH v4 9/9] arm64: dts: imx95: Add ref clock for i.MX95 PCIe
Date: Tue, 22 Oct 2024 22:50:59 +0530	[thread overview]
Message-ID: <20241022172059.wuw5xel7m4vobarq@thinkpad> (raw)
In-Reply-To: <1728981213-8771-10-git-send-email-hongxing.zhu@nxp.com>

On Tue, Oct 15, 2024 at 04:33:33PM +0800, Richard Zhu wrote:
> Add ref clock for i.MX95 PCIe.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 18 ++++++++++++++----
>  1 file changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 03661e76550f..5cb504b5f851 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -1473,6 +1473,14 @@ smmu: iommu@490d0000 {
>  			};
>  		};
>  
> +		hsio_blk_ctl: syscon@4c0100c0 {
> +			compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> +			reg = <0x0 0x4c0100c0 0x0 0x4>;
> +			#clock-cells = <1>;
> +			clocks = <&dummy>;
> +			power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> +		};

This is an internal reference clock, right? Please mention it in patch
description since the controller supports external reference clock also.

- Mani

> +
>  		pcie0: pcie@4c300000 {
>  			compatible = "fsl,imx95-pcie";
>  			reg = <0 0x4c300000 0 0x10000>,
> @@ -1500,8 +1508,9 @@ pcie0: pcie@4c300000 {
>  			clocks = <&scmi_clk IMX95_CLK_HSIO>,
>  				 <&scmi_clk IMX95_CLK_HSIOPLL>,
>  				 <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> -				 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> -			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> +				 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> +				 <&hsio_blk_ctl 0>;
> +			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
>  			assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
>  					 <&scmi_clk IMX95_CLK_HSIOPLL>,
>  					 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> @@ -1528,8 +1537,9 @@ pcie0_ep: pcie-ep@4c300000 {
>  			clocks = <&scmi_clk IMX95_CLK_HSIO>,
>  				 <&scmi_clk IMX95_CLK_HSIOPLL>,
>  				 <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> -				 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> -			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> +				 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> +				 <&hsio_blk_ctl 0>;
> +			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
>  			assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
>  					 <&scmi_clk IMX95_CLK_HSIOPLL>,
>  					 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> -- 
> 2.37.1
> 

-- 
மணிவண்ணன் சதாசிவம்


  reply	other threads:[~2024-10-22 17:42 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-15  8:33 [PATCH v4 0/9] A bunch of changes to refine i.MX PCIe driver Richard Zhu
2024-10-15  8:33 ` [PATCH v4 1/9] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe RC Richard Zhu
2024-10-18 23:13   ` Bjorn Helgaas
2024-10-21 15:26     ` Frank Li
2024-10-22 16:38     ` Manivannan Sadhasivam
2024-10-15  8:33 ` [PATCH v4 2/9] PCI: imx6: Add ref clock for i.MX95 PCIe Richard Zhu
2024-10-22 16:46   ` Manivannan Sadhasivam
2024-10-24  7:42     ` Hongxing Zhu
2024-10-15  8:33 ` [PATCH v4 3/9] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Richard Zhu
2024-10-22 16:48   ` Manivannan Sadhasivam
2024-10-22 19:56     ` Frank Li
2024-10-15  8:33 ` [PATCH v4 4/9] PCI: imx6: Correct controller_id generation logic for i.MX7D Richard Zhu
2024-10-22 16:55   ` Manivannan Sadhasivam
2024-10-24  7:42     ` Hongxing Zhu
2024-10-15  8:33 ` [PATCH v4 5/9] PCI: imx6: Make core reset assertion deassertion symmetric Richard Zhu
2024-10-22 16:59   ` Manivannan Sadhasivam
2024-10-15  8:33 ` [PATCH v4 6/9] PCI: imx6: Make *_enable_ref_clk() function symmetric Richard Zhu
2024-10-22 17:05   ` Manivannan Sadhasivam
2024-10-15  8:33 ` [PATCH v4 7/9] PCI: imx6: Use dwc common suspend resume method Richard Zhu
2024-10-22 17:18   ` Manivannan Sadhasivam
2024-10-22 19:42     ` Frank Li
2024-10-24  7:43     ` Hongxing Zhu
2024-10-15  8:33 ` [PATCH v4 8/9] PCI: imx6: Add i.MX8MQ i.MX8Q and i.MX95 PCIe PM support Richard Zhu
2024-10-15  8:33 ` [PATCH v4 9/9] arm64: dts: imx95: Add ref clock for i.MX95 PCIe Richard Zhu
2024-10-22 17:20   ` Manivannan Sadhasivam [this message]
2024-10-18  1:39 ` [PATCH v4 0/9] A bunch of changes to refine i.MX PCIe driver Hongxing Zhu

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