From: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Andi Shyti <andi.shyti@kernel.org>,
Mark Brown <broonie@kernel.org>,
Alim Akhtar <alim.akhtar@samsung.com>,
Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 4/5] arm64: dts: exynos8895: Add serial_0/1 nodes
Date: Wed, 23 Oct 2024 12:17:33 +0300 [thread overview]
Message-ID: <20241023091734.538682-5-ivo.ivanov.ivanov1@gmail.com> (raw)
In-Reply-To: <20241023091734.538682-1-ivo.ivanov.ivanov1@gmail.com>
Add nodes for serial_0 (UART_DBG) and serial_1 (UART_BT), which
allows using them.
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
---
arch/arm64/boot/dts/exynos/exynos8895.dtsi | 26 ++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
index e6c8a4966..ad50cd4f6 100644
--- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
@@ -218,6 +218,19 @@ cmu_peric0: clock-controller@10400000 {
"usi1", "usi2", "usi3";
};
+ serial_0: serial@10430000 {
+ compatible = "samsung,exynos8895-uart";
+ reg = <0x10430000 0x100>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_UART_DBG_PCLK>,
+ <&cmu_peric0 CLK_GOUT_PERIC0_UART_DBG_EXT_UCLK>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_bus>;
+ samsung,uart-fifosize = <256>;
+ status = "disabled";
+ };
+
pinctrl_peric0: pinctrl@104d0000 {
compatible = "samsung,exynos8895-pinctrl";
reg = <0x104d0000 0x1000>;
@@ -250,6 +263,19 @@ cmu_peric1: clock-controller@10800000 {
"usi10", "usi11", "usi12", "usi13";
};
+ serial_1: serial@10830000 {
+ compatible = "samsung,exynos8895-uart";
+ reg = <0x10830000 0x100>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_UART_BT_PCLK>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_UART_BT_EXT_UCLK>;
+ clock-names = "uart", "clk_uart_baud0";
+ interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_bus>;
+ samsung,uart-fifosize = <256>;
+ status = "disabled";
+ };
+
pinctrl_peric1: pinctrl@10980000 {
compatible = "samsung,exynos8895-pinctrl";
reg = <0x10980000 0x1000>;
--
2.43.0
next prev parent reply other threads:[~2024-10-23 9:49 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-23 9:17 [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1 Ivaylo Ivanov
2024-10-23 9:17 ` [PATCH v2 1/5] dt-bindings: timer: exynos4210-mct: Add samsung,exynos8895-mct compatible Ivaylo Ivanov
2024-10-23 9:17 ` [PATCH v2 2/5] arm64: dts: exynos8895: Add clock management unit nodes Ivaylo Ivanov
2024-10-23 9:17 ` [PATCH v2 3/5] arm64: dts: exynos8895: Add Multi Core Timer (MCT) node Ivaylo Ivanov
2024-10-23 9:17 ` Ivaylo Ivanov [this message]
2024-12-02 8:53 ` (subset) [PATCH v2 4/5] arm64: dts: exynos8895: Add serial_0/1 nodes Krzysztof Kozlowski
2024-10-23 9:17 ` [PATCH v2 5/5] arm64: dts: exynos8895: Add spi_0/1 nodes Ivaylo Ivanov
2024-10-23 11:59 ` [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1 Ivaylo Ivanov
2024-10-26 11:53 ` Krzysztof Kozlowski
2024-10-26 11:59 ` Ivaylo Ivanov
2024-10-26 12:02 ` Krzysztof Kozlowski
2024-10-26 12:12 ` Krzysztof Kozlowski
2024-10-26 12:18 ` Ivaylo Ivanov
2024-11-07 16:02 ` Ivaylo Ivanov
2024-11-08 11:11 ` Krzysztof Kozlowski
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