From: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Andi Shyti <andi.shyti@kernel.org>,
Mark Brown <broonie@kernel.org>,
Alim Akhtar <alim.akhtar@samsung.com>,
Rob Herring <robh@kernel.org>, Conor Dooley <conor+dt@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>
Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 5/5] arm64: dts: exynos8895: Add spi_0/1 nodes
Date: Wed, 23 Oct 2024 12:17:34 +0300 [thread overview]
Message-ID: <20241023091734.538682-6-ivo.ivanov.ivanov1@gmail.com> (raw)
In-Reply-To: <20241023091734.538682-1-ivo.ivanov.ivanov1@gmail.com>
Add nodes for spi_0 (SPI_CAM0) and spi_1 (SPI_CAM1), which
allows using them.
Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
---
arch/arm64/boot/dts/exynos/exynos8895.dtsi | 30 ++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
index ad50cd4f6..ee393f4f0 100644
--- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
@@ -282,6 +282,36 @@ pinctrl_peric1: pinctrl@10980000 {
interrupts = <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
};
+ spi_0: spi@109d0000 {
+ compatible = "samsung,exynos8895-spi",
+ "samsung,exynos850-spi";
+ reg = <0x109d0000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_PCLK>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_SPI_EXT_CLK>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&spi0_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
+ spi_1: spi@109e0000 {
+ compatible = "samsung,exynos8895-spi",
+ "samsung,exynos850-spi";
+ reg = <0x109e0000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_PCLK>,
+ <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_SPI_EXT_CLK>;
+ clock-names = "spi", "spi_busclk0";
+ interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-0 = <&spi1_bus>;
+ pinctrl-names = "default";
+ status = "disabled";
+ };
+
cmu_fsys0: clock-controller@11000000 {
compatible = "samsung,exynos8895-cmu-fsys0";
reg = <0x11000000 0x8000>;
--
2.43.0
next prev parent reply other threads:[~2024-10-23 9:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-23 9:17 [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1 Ivaylo Ivanov
2024-10-23 9:17 ` [PATCH v2 1/5] dt-bindings: timer: exynos4210-mct: Add samsung,exynos8895-mct compatible Ivaylo Ivanov
2024-10-23 9:17 ` [PATCH v2 2/5] arm64: dts: exynos8895: Add clock management unit nodes Ivaylo Ivanov
2024-10-23 9:17 ` [PATCH v2 3/5] arm64: dts: exynos8895: Add Multi Core Timer (MCT) node Ivaylo Ivanov
2024-10-23 9:17 ` [PATCH v2 4/5] arm64: dts: exynos8895: Add serial_0/1 nodes Ivaylo Ivanov
2024-12-02 8:53 ` (subset) " Krzysztof Kozlowski
2024-10-23 9:17 ` Ivaylo Ivanov [this message]
2024-10-23 11:59 ` [PATCH v2 0/5] arm64: dts: exynos8895: Add cmu, mct, serial_0/1 and spi_0/1 Ivaylo Ivanov
2024-10-26 11:53 ` Krzysztof Kozlowski
2024-10-26 11:59 ` Ivaylo Ivanov
2024-10-26 12:02 ` Krzysztof Kozlowski
2024-10-26 12:12 ` Krzysztof Kozlowski
2024-10-26 12:18 ` Ivaylo Ivanov
2024-11-07 16:02 ` Ivaylo Ivanov
2024-11-08 11:11 ` Krzysztof Kozlowski
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