From: "Krzysztof Wilczyński" <kw@linux.com>
To: Siddharth Vadapalli <s-vadapalli@ti.com>
Cc: bhelgaas@google.com, lpieralisi@kernel.org, robh@kernel.org,
vigneshr@ti.com, manivannan.sadhasivam@linaro.org,
thomas.richard@bootlin.com, linux-omap@vger.kernel.org,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, srk@ti.com
Subject: Re: [PATCH] PCI: j721e: Deassert PERST# after a delay of PCIE_T_PVPERL_MS ms
Date: Sat, 2 Nov 2024 23:19:14 +0900 [thread overview]
Message-ID: <20241102141914.GA3440781@rocinante> (raw)
In-Reply-To: <20241022083147.2773123-1-s-vadapalli@ti.com>
Hello,
> According to Section 2.2 of the PCI Express Card Electromechanical
> Specification (Revision 5.1), in order to ensure that the power and the
> reference clock are stable, PERST# has to be deasserted after a delay of
> 100 milliseconds (TPVPERL). Currently, it is being assumed that the power
> is already stable, which is not necessarily true. Hence, change the delay
> to PCIE_T_PVPERL_MS to guarantee that power and reference clock are stable.
[...]
> This patch is based on commit
> c2ee9f594da8 KVM: selftests: Fix build on on non-x86 architectures
> of Mainline Linux.
Why KVM? Do you have the link to this commit handy?
[...]
> if (pcie->reset_gpio) {
> - fsleep(PCIE_T_PERST_CLK_US);
> + msleep(PCIE_T_PVPERL_MS);
fsleep() with the same macro and for the same reason is also used in the
j721e_pcie_probe() callback. I think, we would want both changed.
Krzysztof
next prev parent reply other threads:[~2024-11-02 14:21 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-22 8:31 [PATCH] PCI: j721e: Deassert PERST# after a delay of PCIE_T_PVPERL_MS ms Siddharth Vadapalli
2024-11-02 14:19 ` Krzysztof Wilczyński [this message]
2024-11-04 7:08 ` Siddharth Vadapalli
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