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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Richard Zhu <hongxing.zhu@nxp.com>
Cc: l.stach@pengutronix.de, bhelgaas@google.com,
	lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org,
	frank.li@nxp.com, s.hauer@pengutronix.de, festevam@gmail.com,
	imx@lists.linux.dev, kernel@pengutronix.de,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 10/10] arm64: dts: imx95: Add ref clock for i.MX95 PCIe
Date: Fri, 15 Nov 2024 12:46:05 +0530	[thread overview]
Message-ID: <20241115071605.qwy4hfqmrnaknokl@thinkpad> (raw)
In-Reply-To: <20241101070610.1267391-11-hongxing.zhu@nxp.com>

On Fri, Nov 01, 2024 at 03:06:10PM +0800, Richard Zhu wrote:
> Add ref clock for i.MX95 PCIe here, when the internal PLL is used as
> PCIe reference clock.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> Reviewed-by: Frank Li <Frank.Li@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx95.dtsi | 18 ++++++++++++++----
>  1 file changed, 14 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> index 03661e76550f..5cb504b5f851 100644
> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> @@ -1473,6 +1473,14 @@ smmu: iommu@490d0000 {
>  			};
>  		};
>  
> +		hsio_blk_ctl: syscon@4c0100c0 {
> +			compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> +			reg = <0x0 0x4c0100c0 0x0 0x4>;
> +			#clock-cells = <1>;
> +			clocks = <&dummy>;

What does this 'dummy' clock do? Looks like it doesn't have a frequency at all.
Is bootloader updating it? But the name looks wierd.

- Mani

> +			power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>;
> +		};
> +
>  		pcie0: pcie@4c300000 {
>  			compatible = "fsl,imx95-pcie";
>  			reg = <0 0x4c300000 0 0x10000>,
> @@ -1500,8 +1508,9 @@ pcie0: pcie@4c300000 {
>  			clocks = <&scmi_clk IMX95_CLK_HSIO>,
>  				 <&scmi_clk IMX95_CLK_HSIOPLL>,
>  				 <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> -				 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> -			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> +				 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> +				 <&hsio_blk_ctl 0>;
> +			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
>  			assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
>  					 <&scmi_clk IMX95_CLK_HSIOPLL>,
>  					 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> @@ -1528,8 +1537,9 @@ pcie0_ep: pcie-ep@4c300000 {
>  			clocks = <&scmi_clk IMX95_CLK_HSIO>,
>  				 <&scmi_clk IMX95_CLK_HSIOPLL>,
>  				 <&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
> -				 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> -			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux";
> +				 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>,
> +				 <&hsio_blk_ctl 0>;
> +			clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux", "ref";
>  			assigned-clocks =<&scmi_clk IMX95_CLK_HSIOPLL_VCO>,
>  					 <&scmi_clk IMX95_CLK_HSIOPLL>,
>  					 <&scmi_clk IMX95_CLK_HSIOPCIEAUX>;
> -- 
> 2.37.1
> 

-- 
மணிவண்ணன் சதாசிவம்


  reply	other threads:[~2024-11-15  7:17 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-01  7:06 [PATCH v6 0/10] A bunch of changes to refine i.MX PCIe driver Richard Zhu
2024-11-01  7:06 ` [PATCH v6 01/10] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe RC Richard Zhu
2024-11-01  7:06 ` [PATCH v6 02/10] PCI: imx6: Add ref clock for i.MX95 PCIe Richard Zhu
2024-11-15  6:38   ` Manivannan Sadhasivam
2024-11-18  2:59     ` Hongxing Zhu
2024-11-19  5:38       ` Hongxing Zhu
2024-11-22 16:44         ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 03/10] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Richard Zhu
2024-11-15  6:41   ` Manivannan Sadhasivam
2024-11-18  2:59     ` Hongxing Zhu
2024-11-22 17:10       ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 04/10] PCI: imx6: Correct controller_id generation logic for i.MX7D Richard Zhu
2024-11-15  6:43   ` Manivannan Sadhasivam
2024-11-18  2:59     ` Hongxing Zhu
2024-11-22 17:10       ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 05/10] PCI: imx6: Make core reset assertion deassertion symmetric Richard Zhu
2024-11-15  6:52   ` Manivannan Sadhasivam
2024-11-18  2:59     ` Hongxing Zhu
2024-11-22 17:07       ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 06/10] PCI: imx6: Fix the missing reference clock disable logic Richard Zhu
2024-11-15  6:54   ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 07/10] PCI: imx6: Clean up codes by removing imx7d_pcie_init_phy() Richard Zhu
2024-11-15  6:57   ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 08/10] PCI: imx6: Use dwc common suspend resume method Richard Zhu
2024-11-04 14:24   ` kernel test robot
2024-11-15  7:09   ` Manivannan Sadhasivam
2024-11-15 17:38     ` Frank Li
2024-11-22 16:57       ` Manivannan Sadhasivam
2024-11-18  3:00     ` Hongxing Zhu
2024-11-22 16:47       ` Manivannan Sadhasivam
2024-11-25  8:44         ` Hongxing Zhu
2024-11-01  7:06 ` [PATCH v6 09/10] PCI: imx6: Add i.MX8MQ i.MX8Q and i.MX95 PCIe PM support Richard Zhu
2024-11-15  7:12   ` Manivannan Sadhasivam
2024-11-01  7:06 ` [PATCH v6 10/10] arm64: dts: imx95: Add ref clock for i.MX95 PCIe Richard Zhu
2024-11-15  7:16   ` Manivannan Sadhasivam [this message]
2024-11-15 17:28     ` Frank Li
2024-11-22 17:13       ` Manivannan Sadhasivam

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