From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Frank Li <Frank.li@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>,
l.stach@pengutronix.de, bhelgaas@google.com,
lpieralisi@kernel.org, kw@linux.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org,
s.hauer@pengutronix.de, festevam@gmail.com, imx@lists.linux.dev,
kernel@pengutronix.de, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 10/10] arm64: dts: imx95: Add ref clock for i.MX95 PCIe
Date: Fri, 22 Nov 2024 22:43:40 +0530 [thread overview]
Message-ID: <20241122171340.4uwlddrwadg3vyz4@thinkpad> (raw)
In-Reply-To: <ZzeE0lR8DGG214qq@lizhi-Precision-Tower-5810>
On Fri, Nov 15, 2024 at 12:28:50PM -0500, Frank Li wrote:
> On Fri, Nov 15, 2024 at 12:46:05PM +0530, Manivannan Sadhasivam wrote:
> > On Fri, Nov 01, 2024 at 03:06:10PM +0800, Richard Zhu wrote:
> > > Add ref clock for i.MX95 PCIe here, when the internal PLL is used as
> > > PCIe reference clock.
> > >
> > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > > Reviewed-by: Frank Li <Frank.Li@nxp.com>
> > > ---
> > > arch/arm64/boot/dts/freescale/imx95.dtsi | 18 ++++++++++++++----
> > > 1 file changed, 14 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > > index 03661e76550f..5cb504b5f851 100644
> > > --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
> > > @@ -1473,6 +1473,14 @@ smmu: iommu@490d0000 {
> > > };
> > > };
> > >
> > > + hsio_blk_ctl: syscon@4c0100c0 {
> > > + compatible = "nxp,imx95-hsio-blk-ctl", "syscon";
> > > + reg = <0x0 0x4c0100c0 0x0 0x4>;
> > > + #clock-cells = <1>;
> > > + clocks = <&dummy>;
> >
> > What does this 'dummy' clock do? Looks like it doesn't have a frequency at all.
> > Is bootloader updating it? But the name looks wierd.
>
> dummy clock is not used for this instance, which needn't at all. Leave here
> just keep compatible with the other instance.
>
> Some instance of "nxp,imx95-hsio-blk-ctl" required input clocks. but this
> one is not, so put dummy here.
>
DT should describe the hardware and hardware cannot have dummy clock. If the IP
requires a clock, then pass relevant clock (even if it is a fixed-clock).
- Mani
--
மணிவண்ணன் சதாசிவம்
prev parent reply other threads:[~2024-11-22 17:14 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-01 7:06 [PATCH v6 0/10] A bunch of changes to refine i.MX PCIe driver Richard Zhu
2024-11-01 7:06 ` [PATCH v6 01/10] dt-bindings: imx6q-pcie: Add ref clock for i.MX95 PCIe RC Richard Zhu
2024-11-01 7:06 ` [PATCH v6 02/10] PCI: imx6: Add ref clock for i.MX95 PCIe Richard Zhu
2024-11-15 6:38 ` Manivannan Sadhasivam
2024-11-18 2:59 ` Hongxing Zhu
2024-11-19 5:38 ` Hongxing Zhu
2024-11-22 16:44 ` Manivannan Sadhasivam
2024-11-01 7:06 ` [PATCH v6 03/10] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Richard Zhu
2024-11-15 6:41 ` Manivannan Sadhasivam
2024-11-18 2:59 ` Hongxing Zhu
2024-11-22 17:10 ` Manivannan Sadhasivam
2024-11-01 7:06 ` [PATCH v6 04/10] PCI: imx6: Correct controller_id generation logic for i.MX7D Richard Zhu
2024-11-15 6:43 ` Manivannan Sadhasivam
2024-11-18 2:59 ` Hongxing Zhu
2024-11-22 17:10 ` Manivannan Sadhasivam
2024-11-01 7:06 ` [PATCH v6 05/10] PCI: imx6: Make core reset assertion deassertion symmetric Richard Zhu
2024-11-15 6:52 ` Manivannan Sadhasivam
2024-11-18 2:59 ` Hongxing Zhu
2024-11-22 17:07 ` Manivannan Sadhasivam
2024-11-01 7:06 ` [PATCH v6 06/10] PCI: imx6: Fix the missing reference clock disable logic Richard Zhu
2024-11-15 6:54 ` Manivannan Sadhasivam
2024-11-01 7:06 ` [PATCH v6 07/10] PCI: imx6: Clean up codes by removing imx7d_pcie_init_phy() Richard Zhu
2024-11-15 6:57 ` Manivannan Sadhasivam
2024-11-01 7:06 ` [PATCH v6 08/10] PCI: imx6: Use dwc common suspend resume method Richard Zhu
2024-11-04 14:24 ` kernel test robot
2024-11-15 7:09 ` Manivannan Sadhasivam
2024-11-15 17:38 ` Frank Li
2024-11-22 16:57 ` Manivannan Sadhasivam
2024-11-18 3:00 ` Hongxing Zhu
2024-11-22 16:47 ` Manivannan Sadhasivam
2024-11-25 8:44 ` Hongxing Zhu
2024-11-01 7:06 ` [PATCH v6 09/10] PCI: imx6: Add i.MX8MQ i.MX8Q and i.MX95 PCIe PM support Richard Zhu
2024-11-15 7:12 ` Manivannan Sadhasivam
2024-11-01 7:06 ` [PATCH v6 10/10] arm64: dts: imx95: Add ref clock for i.MX95 PCIe Richard Zhu
2024-11-15 7:16 ` Manivannan Sadhasivam
2024-11-15 17:28 ` Frank Li
2024-11-22 17:13 ` Manivannan Sadhasivam [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241122171340.4uwlddrwadg3vyz4@thinkpad \
--to=manivannan.sadhasivam@linaro.org \
--cc=Frank.li@nxp.com \
--cc=bhelgaas@google.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=festevam@gmail.com \
--cc=hongxing.zhu@nxp.com \
--cc=imx@lists.linux.dev \
--cc=kernel@pengutronix.de \
--cc=krzk+dt@kernel.org \
--cc=kw@linux.com \
--cc=l.stach@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=robh@kernel.org \
--cc=s.hauer@pengutronix.de \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox