From: Jason-JH Lin <jason-jh.lin@mediatek.com>
To: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jassi Brar <jassisinghbrar@gmail.com>,
Chun-Kuang Hu <chunkuang.hu@kernel.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Mauro Carvalho Chehab <mchehab@kernel.org>
Cc: Matthias Brugger <matthias.bgg@gmail.com>,
Jason-JH Lin <jason-jh.lin@mediatek.com>,
Nancy Lin <nancy.lin@mediatek.com>,
Singo Chang <singo.chang@mediatek.com>,
Moudy Ho <moudy.ho@mediatek.com>,
Xavier Chang <xavier.chang@mediatek.com>,
Xiandong Wang <xiandong.wang@mediatek.com>,
Sirius Wang <sirius.wang@mediatek.com>,
Fei Shao <fshao@chromium.org>,
Pin-yen Lin <treapking@chromium.org>,
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<dri-devel@lists.freedesktop.org>,
<linux-mediatek@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-media@vger.kernel.org>
Subject: [PATCH v4 4/8] soc: mediatek: mtk-cmdq: Add pa_base parsing for unsupported subsys ID hardware
Date: Tue, 18 Feb 2025 13:41:49 +0800 [thread overview]
Message-ID: <20250218054405.2017918-5-jason-jh.lin@mediatek.com> (raw)
In-Reply-To: <20250218054405.2017918-1-jason-jh.lin@mediatek.com>
When GCE executes instructions, the corresponding hardware register
can be found through the subsys ID. For hardware that does not support
subsys ID, its subsys ID will be set to invalid value and its physical
address needs to be used to generate GCE instructions.
This commit adds a pa_base parsing flow to the cmdq_client_reg structure
for these unsupported subsys ID hardware.
Signed-off-by: Jason-JH Lin <jason-jh.lin@mediatek.com>
---
drivers/soc/mediatek/mtk-cmdq-helper.c | 18 ++++++++++++++++--
include/linux/soc/mediatek/mtk-cmdq.h | 3 +++
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
index 455221e8de24..aa9853100d78 100644
--- a/drivers/soc/mediatek/mtk-cmdq-helper.c
+++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
@@ -8,6 +8,7 @@
#include <linux/module.h>
#include <linux/mailbox_controller.h>
#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/soc/mediatek/mtk-cmdq.h>
#define CMDQ_WRITE_ENABLE_MASK BIT(0)
@@ -60,20 +61,30 @@ int cmdq_dev_get_client_reg(struct device *dev,
struct cmdq_client_reg *client_reg, int idx)
{
struct of_phandle_args spec;
+ struct resource res;
int err;
if (!client_reg)
return -ENOENT;
+ if (of_address_to_resource(dev->of_node, 0, &res) != 0) {
+ dev_err(dev, "Missing reg in %s node\n", dev->of_node->full_name);
+ return -EINVAL;
+ }
+ client_reg->pa_base = res.start;
+
err = of_parse_phandle_with_fixed_args(dev->of_node,
"mediatek,gce-client-reg",
3, idx, &spec);
if (err < 0) {
- dev_warn(dev,
+ dev_dbg(dev,
"error %d can't parse gce-client-reg property (%d)",
err, idx);
- return err;
+ /* make subsys invalid */
+ client_reg->subsys = CMDQ_SUBSYS_INVALID;
+
+ return 0;
}
client_reg->subsys = (u8)spec.args[0];
@@ -130,6 +141,9 @@ int cmdq_pkt_create(struct cmdq_client *client, struct cmdq_pkt *pkt, size_t siz
pkt->buf_size = size;
+ /* need to use pkt->cl->chan later to call mbox APIs when generating instruction */
+ pkt->cl = (void *)client;
+
dev = client->chan->mbox->dev;
dma_addr = dma_map_single(dev, pkt->va_base, pkt->buf_size,
DMA_TO_DEVICE);
diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
index 0c3906e8ad19..3578cc9200e9 100644
--- a/include/linux/soc/mediatek/mtk-cmdq.h
+++ b/include/linux/soc/mediatek/mtk-cmdq.h
@@ -23,6 +23,8 @@
#define CMDQ_THR_SPR_IDX2 (2)
#define CMDQ_THR_SPR_IDX3 (3)
+#define CMDQ_SUBSYS_INVALID (U8_MAX)
+
struct cmdq_pkt;
enum cmdq_logic_op {
@@ -52,6 +54,7 @@ struct cmdq_operand {
struct cmdq_client_reg {
u8 subsys;
+ phys_addr_t pa_base;
u16 offset;
u16 size;
};
--
2.43.0
next prev parent reply other threads:[~2025-02-18 5:48 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-18 5:41 [PATCH v4 0/8] Add GCE support for MT8196 Jason-JH Lin
2025-02-18 5:41 ` [PATCH v4 1/8] dt-bindings: mailbox: mediatek: Add support for MT8196 GCE mailbox Jason-JH Lin
2025-02-18 8:12 ` Krzysztof Kozlowski
2025-02-18 5:41 ` [PATCH v4 2/8] arm64: dts: mediatek: Add GCE header for MT8196 Jason-JH Lin
2025-02-18 5:41 ` [PATCH v4 3/8] mailbox: mtk-cmdq: Add driver data to support " Jason-JH Lin
2025-02-18 9:25 ` CK Hu (胡俊光)
2025-02-22 10:44 ` Jason-JH Lin (林睿祥)
2025-03-04 9:32 ` AngeloGioacchino Del Regno
2025-03-05 8:36 ` Jason-JH Lin (林睿祥)
2025-03-05 12:05 ` AngeloGioacchino Del Regno
2025-03-06 11:00 ` Jason-JH Lin (林睿祥)
2025-03-06 13:08 ` AngeloGioacchino Del Regno
2025-03-07 1:11 ` Jason-JH Lin (林睿祥)
2025-02-18 5:41 ` Jason-JH Lin [this message]
2025-03-04 9:35 ` [PATCH v4 4/8] soc: mediatek: mtk-cmdq: Add pa_base parsing for unsupported subsys ID hardware AngeloGioacchino Del Regno
2025-03-05 9:46 ` Jason-JH Lin (林睿祥)
2025-03-05 11:03 ` AngeloGioacchino Del Regno
2025-03-05 15:58 ` Jason-JH Lin (林睿祥)
2025-03-05 17:40 ` AngeloGioacchino Del Regno
2025-02-18 5:41 ` [PATCH v4 5/8] soc: mediatek: mtk-cmdq: Add mminfra_offset compatibility for DRAM address Jason-JH Lin
2025-03-04 9:37 ` AngeloGioacchino Del Regno
2025-03-05 16:26 ` Jason-JH Lin (林睿祥)
2025-02-18 5:41 ` [PATCH v4 6/8] soc: mediatek: Add programming flow for unsupported subsys ID hardware Jason-JH Lin
2025-03-04 9:41 ` AngeloGioacchino Del Regno
2025-03-05 16:12 ` Jason-JH Lin (林睿祥)
2025-03-05 18:08 ` AngeloGioacchino Del Regno
2025-03-06 11:05 ` Jason-JH Lin (林睿祥)
2025-02-18 5:41 ` [PATCH v4 7/8] drm/mediatek: " Jason-JH Lin
2025-03-06 9:47 ` AngeloGioacchino Del Regno
2025-03-06 11:10 ` Jason-JH Lin (林睿祥)
2025-02-18 5:41 ` [PATCH v4 8/8] media: mediatek: mdp3: " Jason-JH Lin
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