From: "Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>
To: "robh@kernel.org" <robh@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"mchehab@kernel.org" <mchehab@kernel.org>,
"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>,
"jassisinghbrar@gmail.com" <jassisinghbrar@gmail.com>
Cc: "linux-media@vger.kernel.org" <linux-media@vger.kernel.org>,
"Sirius Wang (王皓昱)" <Sirius.Wang@mediatek.com>,
"Moudy Ho (何宗原)" <Moudy.Ho@mediatek.com>,
"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
"Xiandong Wang (王先冬)" <Xiandong.Wang@mediatek.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Project_Global_Chrome_Upstream_Group
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"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
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"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
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<linux-arm-kernel@lists.infradead.org>,
"Xavier Chang (張獻文)" <Xavier.Chang@mediatek.com>,
"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
"treapking@chromium.org" <treapking@chromium.org>
Subject: Re: [PATCH v4 5/8] soc: mediatek: mtk-cmdq: Add mminfra_offset compatibility for DRAM address
Date: Wed, 5 Mar 2025 16:26:55 +0000 [thread overview]
Message-ID: <524d152b9e9261981b0ee3aa2ff43376a26be294.camel@mediatek.com> (raw)
In-Reply-To: <c1395546-9cfe-4da9-b87a-e5cc392910f6@collabora.com>
On Tue, 2025-03-04 at 10:37 +0100, AngeloGioacchino Del Regno wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>
>
> Il 18/02/25 06:41, Jason-JH Lin ha scritto:
> > Since GCE has been moved to mminfra in MT8196, all transactions
> > from
> > mminfra to DRAM will have their addresses adjusted by subtracting a
> > mminfra offset.
> > This information should be handled inside the CMDQ driver, allowing
> > CMDQ users to call CMDQ APIs as usual.
> >
> > Therefore, CMDQ driver needs to use the mbox API to get the
> > mminfra_offset value of the SoC, and then add it to the DRAM
> > address
> > when generating instructions to ensure GCE accesses the correct
> > DRAM
> > address.
> >
> > Signed-off-by: Jason-JH Lin <jason-jh.lin@mediatek.com>
> > ---
> > drivers/soc/mediatek/mtk-cmdq-helper.c | 35
> > ++++++++++++++++++++++++--
> > 1 file changed, 33 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c
> > b/drivers/soc/mediatek/mtk-cmdq-helper.c
> > index aa9853100d78..f2853a74af01 100644
> > --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
> > +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
> > @@ -314,10 +314,22 @@ EXPORT_SYMBOL(cmdq_pkt_write_s_mask_value);
> >
> > int cmdq_pkt_mem_move(struct cmdq_pkt *pkt, dma_addr_t src_addr,
> > dma_addr_t dst_addr)
> > {
> > + struct cmdq_client *cl = (struct cmdq_client *)pkt->cl;
> > const u16 high_addr_reg_idx = CMDQ_THR_SPR_IDX0;
> > const u16 value_reg_idx = CMDQ_THR_SPR_IDX1;
> > int ret;
> >
> > + if (!cl) {
> > + pr_err("%s %d: pkt->cl is NULL!\n", __func__,
> > __LINE__);
> > + return -EINVAL;
> > + }
> > +
> > + if (cmdq_addr_need_offset(cl->chan, src_addr))
> > + src_addr += cmdq_get_offset_pa(cl->chan);
>
> If the offset is just DRAM IOSTART, you could manage that differently
> in the cmdq
> helper as well as the cmdq mailbox... :-)
>
The offset_pa is not DRAM IOSTART, it is the MMINFRA subtracting
offset.
CMDQ helper is used to generate the instruction to the command buffer.
Since this offset_pa is added for the PA put into the instruction, I
think adding the offset_pa here is more suitable than CMDQ mailbox.
Does that make sense? :-)
Regards,
Jason-JH Lin
> > +
> > + if (cmdq_addr_need_offset(cl->chan, dst_addr))
> > + dst_addr += cmdq_get_offset_pa(cl->chan);
> > +
> Cheers,
> Angelo
next prev parent reply other threads:[~2025-03-05 16:29 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-18 5:41 [PATCH v4 0/8] Add GCE support for MT8196 Jason-JH Lin
2025-02-18 5:41 ` [PATCH v4 1/8] dt-bindings: mailbox: mediatek: Add support for MT8196 GCE mailbox Jason-JH Lin
2025-02-18 8:12 ` Krzysztof Kozlowski
2025-02-18 5:41 ` [PATCH v4 2/8] arm64: dts: mediatek: Add GCE header for MT8196 Jason-JH Lin
2025-02-18 5:41 ` [PATCH v4 3/8] mailbox: mtk-cmdq: Add driver data to support " Jason-JH Lin
2025-02-18 9:25 ` CK Hu (胡俊光)
2025-02-22 10:44 ` Jason-JH Lin (林睿祥)
2025-03-04 9:32 ` AngeloGioacchino Del Regno
2025-03-05 8:36 ` Jason-JH Lin (林睿祥)
2025-03-05 12:05 ` AngeloGioacchino Del Regno
2025-03-06 11:00 ` Jason-JH Lin (林睿祥)
2025-03-06 13:08 ` AngeloGioacchino Del Regno
2025-03-07 1:11 ` Jason-JH Lin (林睿祥)
2025-02-18 5:41 ` [PATCH v4 4/8] soc: mediatek: mtk-cmdq: Add pa_base parsing for unsupported subsys ID hardware Jason-JH Lin
2025-03-04 9:35 ` AngeloGioacchino Del Regno
2025-03-05 9:46 ` Jason-JH Lin (林睿祥)
2025-03-05 11:03 ` AngeloGioacchino Del Regno
2025-03-05 15:58 ` Jason-JH Lin (林睿祥)
2025-03-05 17:40 ` AngeloGioacchino Del Regno
2025-02-18 5:41 ` [PATCH v4 5/8] soc: mediatek: mtk-cmdq: Add mminfra_offset compatibility for DRAM address Jason-JH Lin
2025-03-04 9:37 ` AngeloGioacchino Del Regno
2025-03-05 16:26 ` Jason-JH Lin (林睿祥) [this message]
2025-02-18 5:41 ` [PATCH v4 6/8] soc: mediatek: Add programming flow for unsupported subsys ID hardware Jason-JH Lin
2025-03-04 9:41 ` AngeloGioacchino Del Regno
2025-03-05 16:12 ` Jason-JH Lin (林睿祥)
2025-03-05 18:08 ` AngeloGioacchino Del Regno
2025-03-06 11:05 ` Jason-JH Lin (林睿祥)
2025-02-18 5:41 ` [PATCH v4 7/8] drm/mediatek: " Jason-JH Lin
2025-03-06 9:47 ` AngeloGioacchino Del Regno
2025-03-06 11:10 ` Jason-JH Lin (林睿祥)
2025-02-18 5:41 ` [PATCH v4 8/8] media: mediatek: mdp3: " Jason-JH Lin
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