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From: Richard Zhu <hongxing.zhu@nxp.com>
To: frank.li@nxp.com, l.stach@pengutronix.de, lpieralisi@kernel.org,
	kw@linux.com, manivannan.sadhasivam@linaro.org, robh@kernel.org,
	bhelgaas@google.com, shawnguo@kernel.org, s.hauer@pengutronix.de,
	kernel@pengutronix.de, festevam@gmail.com
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	imx@lists.linux.dev, linux-kernel@vger.kernel.org,
	Richard Zhu <hongxing.zhu@nxp.com>
Subject: [PATCH v2 3/6] PCI: imx6: Workaround i.MX95 PCIe may not exit L23 ready
Date: Wed, 26 Mar 2025 15:59:12 +0800	[thread overview]
Message-ID: <20250326075915.4073725-4-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <20250326075915.4073725-1-hongxing.zhu@nxp.com>

ERR051624: The Controller Without Vaux Cannot Exit L23 Ready Through Beacon
or PERST# De-assertion

When the auxiliary power is not available, the controller cannot exit from
L23 Ready with beacon or PERST# de-assertion when main power is not
removed.

Workaround: Set SS_RW_REG_1[SYS_AUX_PWR_DET] to 1.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 13e53311cc0e..fbab5a4621aa 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -48,6 +48,8 @@
 #define IMX95_PCIE_SS_RW_REG_0			0xf0
 #define IMX95_PCIE_REF_CLKEN			BIT(23)
 #define IMX95_PCIE_PHY_CR_PARA_SEL		BIT(9)
+#define IMX95_PCIE_SS_RW_REG_1			0xf4
+#define IMX95_PCIE_SYS_AUX_PWR_DET		BIT(31)
 
 #define IMX95_PE0_GEN_CTRL_1			0x1050
 #define IMX95_PCIE_DEVICE_TYPE			GENMASK(3, 0)
@@ -227,6 +229,19 @@ static unsigned int imx_pcie_grp_offset(const struct imx_pcie *imx_pcie)
 
 static int imx95_pcie_init_phy(struct imx_pcie *imx_pcie)
 {
+	/*
+	 * ERR051624: The Controller Without Vaux Cannot Exit L23 Ready
+	 * Through Beacon or PERST# De-assertion
+	 *
+	 * When the auxiliary power is not available, the controller
+	 * cannot exit from L23 Ready with beacon or PERST# de-assertion
+	 * when main power is not removed.
+	 *
+	 * Workaround: Set SS_RW_REG_1[SYS_AUX_PWR_DET] to 1.
+	 */
+	regmap_set_bits(imx_pcie->iomuxc_gpr, IMX95_PCIE_SS_RW_REG_1,
+			IMX95_PCIE_SYS_AUX_PWR_DET);
+
 	regmap_update_bits(imx_pcie->iomuxc_gpr,
 			IMX95_PCIE_SS_RW_REG_0,
 			IMX95_PCIE_PHY_CR_PARA_SEL,
-- 
2.37.1



  parent reply	other threads:[~2025-03-26  8:11 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-03-26  7:59 [PATCH v2 0/6] Add some enhancements for i.MX95 PCIe Richard Zhu
2025-03-26  7:59 ` [PATCH v2 1/6] PCI: imx6: Start link directly when workaround is not required Richard Zhu
2025-03-26 14:28   ` Frank Li
2025-03-26  7:59 ` [PATCH v2 2/6] PCI: imx6: Toggle the cold reset for i.MX95 PCIe Richard Zhu
2025-03-26 14:31   ` Frank Li
2025-03-26  7:59 ` Richard Zhu [this message]
2025-03-26 14:34   ` [PATCH v2 3/6] PCI: imx6: Workaround i.MX95 PCIe may not exit L23 ready Frank Li
2025-03-26  7:59 ` [PATCH v2 4/6] PCI: imx6: Let i.MX95 PCIe compliance with 8GT/s Receiver Impedance ECN Richard Zhu
2025-03-26 14:39   ` Frank Li
2025-03-26  7:59 ` [PATCH v2 5/6] PCI: imx6: Add PLL clock lock check for i.MX95 PCIe Richard Zhu
2025-03-26 14:42   ` Frank Li
2025-03-26  7:59 ` [PATCH v2 6/6] PCI: imx6: Save and restore the LUT setting " Richard Zhu
2025-03-26 15:00   ` Frank Li

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