[PATCH v3 0/2] PCI: imx6: Correct the epc_features of i.MX8M EPs

[PATCH v3 0/2] PCI: imx6: Correct the epc_features of i.MX8M EPs

[Richard Zhu]

IMX8MQ_EP has three 64-bit BAR0/2/4 capable and programmable BARs. For
IMX8MQ_EP, use imx8q_pcie_epc_features (64-bit BARs 0, 2, 4) instead
of imx8m_pcie_epc_features (64-bit BARs 0, 2).

For IMX8MM_EP and IMX8MP_EP, add fixed 256-byte BAR 4 and reserved BAR 5
in imx8m_pcie_epc_features.

Main changes in v3:
Seperate the patch into two commits and update the commit logs refer to
Bjorn's suggestions.
v2: https://lkml.org/lkml/2025/6/17/267

[PATCH v3 1/2] PCI: imx6: Correct the epc_features of IMX8MQ_EP
[PATCH v3 2/2] PCI: imx6: Correct the epc_features of IMX8MM_EP and

drivers/pci/controller/dwc/pci-imx6.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

[PATCH v3 1/2] PCI: imx6: Correct the epc_features of IMX8MQ_EP

[Richard Zhu]

IMX8MQ_EP has three 64-bit BAR0/2/4 capable and programmable BARs. For
IMX8MQ_EP, use imx8q_pcie_epc_features (64-bit BARs 0, 2, 4) instead
of imx8m_pcie_epc_features (64-bit BARs 0, 2).

Fixes: 75c2f26da03f ("PCI: imx6: Add i.MX PCIe EP mode support")
Cc: stable@vger.kernel.org
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 5a38cfaf989b..7d15bcb7c107 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -1912,7 +1912,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
 		.mode_mask[0] = IMX6Q_GPR12_DEVICE_TYPE,
 		.mode_off[1] = IOMUXC_GPR12,
 		.mode_mask[1] = IMX8MQ_GPR12_PCIE2_CTRL_DEVICE_TYPE,
-		.epc_features = &imx8m_pcie_epc_features,
+		.epc_features = &imx8q_pcie_epc_features,
 		.init_phy = imx8mq_pcie_init_phy,
 		.enable_ref_clk = imx8mm_pcie_enable_ref_clk,
 	},
-- 
2.37.1

[PATCH v3 2/2] PCI: imx6: Correct the epc_features of IMX8MM_EP and IMX8MP_EP

[Richard Zhu]

For IMX8MM_EP and IMX8MP_EP, add fixed 256-byte BAR 4 and reserved BAR 5
in imx8m_pcie_epc_features.

Fixes: 75c2f26da03f ("PCI: imx6: Add i.MX PCIe EP mode support")
Cc: stable@vger.kernel.org
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
---
 drivers/pci/controller/dwc/pci-imx6.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 7d15bcb7c107..9754cc6e09b9 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -1385,6 +1385,8 @@ static const struct pci_epc_features imx8m_pcie_epc_features = {
 	.msix_capable = false,
 	.bar[BAR_1] = { .type = BAR_RESERVED, },
 	.bar[BAR_3] = { .type = BAR_RESERVED, },
+	.bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = SZ_256, },
+	.bar[BAR_5] = { .type = BAR_RESERVED, },
 	.align = SZ_64K,
 };
 
-- 
2.37.1

Re: [PATCH v3 0/2] PCI: imx6: Correct the epc_features of i.MX8M EPs

[Bjorn Helgaas]

On Tue, Jul 08, 2025 at 05:10:01PM +0800, Richard Zhu wrote:
> IMX8MQ_EP has three 64-bit BAR0/2/4 capable and programmable BARs. For
> IMX8MQ_EP, use imx8q_pcie_epc_features (64-bit BARs 0, 2, 4) instead
> of imx8m_pcie_epc_features (64-bit BARs 0, 2).
> 
> For IMX8MM_EP and IMX8MP_EP, add fixed 256-byte BAR 4 and reserved BAR 5
> in imx8m_pcie_epc_features.
> 
> Main changes in v3:
> Seperate the patch into two commits and update the commit logs refer to
> Bjorn's suggestions.
> v2: https://lkml.org/lkml/2025/6/17/267
> 
> [PATCH v3 1/2] PCI: imx6: Correct the epc_features of IMX8MQ_EP
> [PATCH v3 2/2] PCI: imx6: Correct the epc_features of IMX8MM_EP and
> 
> drivers/pci/controller/dwc/pci-imx6.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)

Thanks, Richard, I updated pci/controller/imx6 with these patches.