From: Conor Dooley <conor@kernel.org>
To: Elaine Zhang <zhangqing@rock-chips.com>
Cc: mturquette@baylibre.com, sboyd@kernel.org,
sugar.zhang@rock-chips.com, heiko@sntech.de, robh@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-clk@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-kernel@vger.kernel.org, huangtao@rock-chips.com
Subject: Re: [PATCH v3 2/5] dt-bindings: clock, reset: Add support for rv1126b
Date: Mon, 20 Oct 2025 18:27:46 +0100 [thread overview]
Message-ID: <20251020-glorify-stalling-784a52342283@spud> (raw)
In-Reply-To: <20251020023724.2723372-3-zhangqing@rock-chips.com>
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On Mon, Oct 20, 2025 at 10:37:21AM +0800, Elaine Zhang wrote:
> Add clock and reset ID defines for rv1126b.
> Also add documentation for the rv1126b CRU core.
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
> ---
> .../bindings/clock/rockchip,rv1126b-cru.yaml | 52 +++
> .../dt-bindings/clock/rockchip,rv1126b-cru.h | 392 +++++++++++++++++
> .../dt-bindings/reset/rockchip,rv1126b-cru.h | 405 ++++++++++++++++++
> 3 files changed, 849 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rv1126b-cru.yaml
> create mode 100644 include/dt-bindings/clock/rockchip,rv1126b-cru.h
> create mode 100644 include/dt-bindings/reset/rockchip,rv1126b-cru.h
>
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rv1126b-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rv1126b-cru.yaml
> new file mode 100644
> index 000000000000..61bfcde9b16a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rv1126b-cru.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/rockchip,rv1126b-cru.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip RV1126B Clock and Reset Unit
> +
> +maintainers:
> + - Elaine Zhang <zhangqing@rock-chips.com>
> + - Heiko Stuebner <heiko@sntech.de>
> +
> +description:
> + The rv1126b clock controller generates the clock and also implements a
> + reset controller for SoC peripherals.
> +
> +properties:
> + compatible:
> + enum:
> + - rockchip,rv1126b-cru
> +
> + reg:
> + maxItems: 1
> +
> + "#clock-cells":
> + const: 1
> +
> + "#reset-cells":
> + const: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + const: xin24m
> +
> +required:
> + - compatible
> + - reg
> + - "#clock-cells"
> + - "#reset-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + cru: clock-controller@20000000 {
Drop this label, and then
Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: changes-requested
Cheers,
Conor.
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next prev parent reply other threads:[~2025-10-20 17:28 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-20 2:37 [PATCH v3 0/5] clk: rockchip: Add clock controller for the RV1126B Elaine Zhang
2025-10-20 2:37 ` [PATCH v3 1/5] clk: rockchip: Implement rockchip_clk_register_armclk_multi_pll() Elaine Zhang
2025-10-20 2:37 ` [PATCH v3 2/5] dt-bindings: clock, reset: Add support for rv1126b Elaine Zhang
2025-10-20 17:27 ` Conor Dooley [this message]
2025-10-20 2:37 ` [PATCH v3 3/5] clk: rockchip: Add clock controller for the RV1126B Elaine Zhang
2025-10-20 2:37 ` [PATCH v3 4/5] dt-bindings: clock: Add support for rockchip pvtpll Elaine Zhang
2025-10-20 9:38 ` Diederik de Haas
2025-10-20 17:25 ` Conor Dooley
2025-10-20 17:26 ` Conor Dooley
2025-10-20 2:37 ` [PATCH v3 5/5] clk: rockchip: add support for pvtpll clk Elaine Zhang
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