[PATCH 0/8] MediaTek UART DMA: Fixes, improvements and new SoCs

[PATCH 0/8] MediaTek UART DMA: Fixes, improvements and new SoCs

[AngeloGioacchino Del Regno]

This series performs fixes the MediaTek UART DMA driver to be able
to correctly program AP_DMA controllers that support extended
addressing, performs some cleanups to improve code readability
and adds support for *all* of the SoCs generations that are upstream.

This includes MT6795, MT7988, MT8173, MT8183, MT8186, MT8188, MT8195,
other than all of their Genio variants (where applicable), all of
their Smartphone variants (where applicable), and also some newer
generation SoCs that are in the process of being upstreamed, like
MT8196 and MT8189.

Devicetrees are also already done, but not included here, and will be
sent in a different series (probably after this one gets upstreamed,
as I have to decide what to do with MT8196 - integrate it in the first
devicetree submission/commit or add it later - depends on whether this
one gets upstreamed first or not).

AngeloGioacchino Del Regno (8):
  dt-bindings: dma: mediatek,uart-dma: Allow MT6795 single compatible
  dt-bindings: dma: mediatek,uart-dma: Deprecate mediatek,dma-33bits
  dt-bindings: dma: mediatek,uart-dma: Support all SoC generations
  dmaengine: mediatek: uart-apdma: Get addressing bits from match data
  dmaengine: mediatek: uart-apdma: Fix above 4G addressing TX/RX
  dmaengine: mediatek: mtk-uart-apdma: Rename support_33bits to
    support_ext_addr
  dmaengine: mediatek: mtk-uart-apdma: Add support for Dimensity 6300
  dmaengine: mediatek: mtk-uart-apdma: Add support for Dimensity 9200

 .../bindings/dma/mediatek,uart-dma.yaml       | 20 +++++++++++
 drivers/dma/mediatek/mtk-uart-apdma.c         | 35 ++++++++++---------
 2 files changed, 38 insertions(+), 17 deletions(-)

-- 
2.51.1

[PATCH 1/8] dt-bindings: dma: mediatek,uart-dma: Allow MT6795 single compatible

[AngeloGioacchino Del Regno]

While it is true that this SoC is compatible with the MT6577 APDMA
IP, that is valid only when the IP is used in 32-bits addressing
mode, and, by the way there is no good reason to do so.

Since the APDMA IP in MT6795 supports 33 bits addressing, this
means that it is a newer revision compared to the one found in
MT6577, hence only partially compatible with it.

Allow nodes to specify "mediatek,mt6795-uart-dma" as their only
compatible in the case of MT6795; this is done in lieu of the fact
that there are other SoCs integrating the same version of this IP
as MT6795, and those will eventually get their own compatible that
expresses full compatibility with this SoC.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
index dab468a88942..10fc92b60de5 100644
--- a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
@@ -28,6 +28,7 @@ properties:
           - const: mediatek,mt6577-uart-dma
       - enum:
           - mediatek,mt6577-uart-dma
+          - mediatek,mt6795-uart-dma
 
   reg:
     minItems: 1
-- 
2.51.1

Re: [PATCH 1/8] dt-bindings: dma: mediatek,uart-dma: Allow MT6795 single compatible

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 75 bytes --]

Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[PATCH 2/8] dt-bindings: dma: mediatek,uart-dma: Deprecate mediatek,dma-33bits

[AngeloGioacchino Del Regno]

While this property wants to express a capability of the hardware,
this is only used by the driver itself to vary the DMA bits during
probe.

Different hardware shall instead have different compatible strings.

Following the driver cleanup and the introduction of a specific
compatible string for the APDMA IP version found in MT6795, set
the "mediatek,dma-33bits" vendor property as deprecated.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
index 10fc92b60de5..4d927726df93 100644
--- a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
@@ -59,6 +59,7 @@ properties:
 
   mediatek,dma-33bits:
     type: boolean
+    deprecated: true
     description: Enable 33-bits UART APDMA support
 
 required:
-- 
2.51.1

Re: [PATCH 2/8] dt-bindings: dma: mediatek,uart-dma: Deprecate mediatek,dma-33bits

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 75 bytes --]

Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[PATCH 3/8] dt-bindings: dma: mediatek,uart-dma: Support all SoC generations

[AngeloGioacchino Del Regno]

Add support for the APDMA IP found in all of the SoC generations
that are currently supported upstream; this includes:
 - MT8173, MT8183, fully compatible with MT6577 (32-bits)
 - MT7988, MT8186, MT8188, MT8192, MT8195 and MT6835 (34-bits)
 - MT6991, MT8196 and MT6985 (35-bits)

...where:
 - MT6835 is the first SoC where the AP_DMA IP supports 34-bits
   addressing; and
 - MT6985 is the first SoC where the AP_DMA IP supports 35-bits
   addressing.

While at it, also add myself in the maintainers list.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 .../bindings/dma/mediatek,uart-dma.yaml        | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
index 4d927726df93..3708518fe7fc 100644
--- a/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
@@ -7,6 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
 title: MediaTek UART APDMA controller
 
 maintainers:
+  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
   - Long Cheng <long.cheng@mediatek.com>
 
 description: |
@@ -23,12 +24,29 @@ properties:
           - enum:
               - mediatek,mt2712-uart-dma
               - mediatek,mt6795-uart-dma
+              - mediatek,mt8173-uart-dma
+              - mediatek,mt8183-uart-dma
               - mediatek,mt8365-uart-dma
               - mediatek,mt8516-uart-dma
           - const: mediatek,mt6577-uart-dma
+      - items:
+          - enum:
+              - mediatek,mt7988-uart-dma
+              - mediatek,mt8186-uart-dma
+              - mediatek,mt8188-uart-dma
+              - mediatek,mt8192-uart-dma
+              - mediatek,mt8195-uart-dma
+          - const: mediatek,mt6835-uart-dma
+      - items:
+          - enum:
+              - mediatek,mt6991-uart-dma
+              - mediatek,mt8196-uart-dma
+          - const: mediatek,mt6985-uart-dma
       - enum:
           - mediatek,mt6577-uart-dma
           - mediatek,mt6795-uart-dma
+          - mediatek,mt6835-uart-dma
+          - mediatek,mt6985-uart-dma
 
   reg:
     minItems: 1
-- 
2.51.1

Re: [PATCH 3/8] dt-bindings: dma: mediatek,uart-dma: Support all SoC generations

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 75 bytes --]

Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[PATCH 4/8] dmaengine: mediatek: uart-apdma: Get addressing bits from match data

[AngeloGioacchino Del Regno]

The only SoC that declares mediatek,dma-33bits in its devicetree
currently is MT6795, which obviously also declares a SoC-specific
compatible string: in preparation for adding new SoCs with 34 bits
addressing, replace the parsing of said vendor property with logic
to get the number of addressing bits from platform data associated
to compatible strings.

While at it, also make the bit_mask variable unsigned and move the
`int rc` declaration as last to beautify the code.

Thanks to the correct declaration of the APDMA node is in all of
the MediaTek device trees that are currently upstream, this commit
brings no functional differences.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/dma/mediatek/mtk-uart-apdma.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/dma/mediatek/mtk-uart-apdma.c b/drivers/dma/mediatek/mtk-uart-apdma.c
index 08e15177427b..b906e59f4c6d 100644
--- a/drivers/dma/mediatek/mtk-uart-apdma.c
+++ b/drivers/dma/mediatek/mtk-uart-apdma.c
@@ -468,7 +468,8 @@ static void mtk_uart_apdma_free(struct mtk_uart_apdmadev *mtkd)
 }
 
 static const struct of_device_id mtk_uart_apdma_match[] = {
-	{ .compatible = "mediatek,mt6577-uart-dma", },
+	{ .compatible = "mediatek,mt6577-uart-dma", .data = (void *)32 },
+	{ .compatible = "mediatek,mt6795-uart-dma", .data = (void *)33 },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, mtk_uart_apdma_match);
@@ -477,9 +478,9 @@ static int mtk_uart_apdma_probe(struct platform_device *pdev)
 {
 	struct device_node *np = pdev->dev.of_node;
 	struct mtk_uart_apdmadev *mtkd;
-	int bit_mask = 32, rc;
 	struct mtk_chan *c;
-	unsigned int i;
+	unsigned int bit_mask, i;
+	int rc;
 
 	mtkd = devm_kzalloc(&pdev->dev, sizeof(*mtkd), GFP_KERNEL);
 	if (!mtkd)
@@ -492,12 +493,10 @@ static int mtk_uart_apdma_probe(struct platform_device *pdev)
 		return rc;
 	}
 
-	if (of_property_read_bool(np, "mediatek,dma-33bits"))
+	bit_mask = (unsigned int)(uintptr_t)of_device_get_match_data(&pdev->dev);
+	if (bit_mask > 32)
 		mtkd->support_33bits = true;
 
-	if (mtkd->support_33bits)
-		bit_mask = 33;
-
 	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(bit_mask));
 	if (rc)
 		return rc;
-- 
2.51.1

Re: [PATCH 4/8] dmaengine: mediatek: uart-apdma: Get addressing bits from match data

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 285 bytes --]

On Thu, Nov 13, 2025 at 01:22:25PM +0100, AngeloGioacchino Del Regno wrote:
> The only SoC that declares mediatek,dma-33bits in its devicetree
> currently is MT6795, which obviously also declares a SoC-specific
> compatible string:

Acked-by: Conor Dooley <conor.dooley@microchip.com>

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

[PATCH 5/8] dmaengine: mediatek: uart-apdma: Fix above 4G addressing TX/RX

[AngeloGioacchino Del Regno]

The VFF_4G_SUPPORT register is named differently in datasheets,
and its name is "VFF_ADDR2"; was this named correctly from the
beginning it would've been clearer that there was a mistake in
the programming sequence.

This register is supposed to hold the high bits to support the
DMA addressing above 4G (so, more than 32 bits) and not a bit
to "enable" the support for VFF 4G.

Fix the name of this register, and also fix its usage by writing
the upper 32 bits of the dma_addr_t on it when the SoC supports
such feature.

Fixes: 9135408c3ace ("dmaengine: mediatek: Add MediaTek UART APDMA support")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/dma/mediatek/mtk-uart-apdma.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/dma/mediatek/mtk-uart-apdma.c b/drivers/dma/mediatek/mtk-uart-apdma.c
index b906e59f4c6d..2398b440b12a 100644
--- a/drivers/dma/mediatek/mtk-uart-apdma.c
+++ b/drivers/dma/mediatek/mtk-uart-apdma.c
@@ -41,7 +41,7 @@
 #define VFF_STOP_CLR_B		0
 #define VFF_EN_CLR_B		0
 #define VFF_INT_EN_CLR_B	0
-#define VFF_4G_SUPPORT_CLR_B	0
+#define VFF_ADDR2_CLR_B		0
 
 /*
  * interrupt trigger level for tx
@@ -72,7 +72,7 @@
 /* TX: the buffer size SW can write. RX: the buffer size HW can write. */
 #define VFF_LEFT_SIZE		0x40
 #define VFF_DEBUG_STATUS	0x50
-#define VFF_4G_SUPPORT		0x54
+#define VFF_ADDR2		0x54
 
 struct mtk_uart_apdmadev {
 	struct dma_device ddev;
@@ -149,7 +149,7 @@ static void mtk_uart_apdma_start_tx(struct mtk_chan *c)
 		mtk_uart_apdma_write(c, VFF_INT_FLAG, VFF_TX_INT_CLR_B);
 
 		if (mtkd->support_33bits)
-			mtk_uart_apdma_write(c, VFF_4G_SUPPORT, VFF_4G_EN_B);
+			mtk_uart_apdma_write(c, VFF_ADDR2, upper_32_bits(d->addr));
 	}
 
 	mtk_uart_apdma_write(c, VFF_EN, VFF_EN_B);
@@ -192,7 +192,7 @@ static void mtk_uart_apdma_start_rx(struct mtk_chan *c)
 		mtk_uart_apdma_write(c, VFF_INT_FLAG, VFF_RX_INT_CLR_B);
 
 		if (mtkd->support_33bits)
-			mtk_uart_apdma_write(c, VFF_4G_SUPPORT, VFF_4G_EN_B);
+			mtk_uart_apdma_write(c, VFF_ADDR2, upper_32_bits(d->addr));
 	}
 
 	mtk_uart_apdma_write(c, VFF_INT_EN, VFF_RX_INT_EN_B);
@@ -298,7 +298,7 @@ static int mtk_uart_apdma_alloc_chan_resources(struct dma_chan *chan)
 	}
 
 	if (mtkd->support_33bits)
-		mtk_uart_apdma_write(c, VFF_4G_SUPPORT, VFF_4G_SUPPORT_CLR_B);
+		mtk_uart_apdma_write(c, VFF_ADDR2, VFF_ADDR2_CLR_B);
 
 err_pm:
 	pm_runtime_put_noidle(mtkd->ddev.dev);
-- 
2.51.1

[PATCH 6/8] dmaengine: mediatek: mtk-uart-apdma: Rename support_33bits to support_ext_addr

[AngeloGioacchino Del Regno]

In preparation for adding support for SoCs with APDMA IP versions
supporting more than 33 bits addressing, rename the support_33bits
variable to support_ext_addr to signal support for extended, above
4GB, addressing.

This change is cosmetic only, and brings no functional differences.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/dma/mediatek/mtk-uart-apdma.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/dma/mediatek/mtk-uart-apdma.c b/drivers/dma/mediatek/mtk-uart-apdma.c
index 2398b440b12a..802a4d6c11fa 100644
--- a/drivers/dma/mediatek/mtk-uart-apdma.c
+++ b/drivers/dma/mediatek/mtk-uart-apdma.c
@@ -77,7 +77,7 @@
 struct mtk_uart_apdmadev {
 	struct dma_device ddev;
 	struct clk *clk;
-	bool support_33bits;
+	bool support_ext_addr;
 	unsigned int dma_requests;
 };
 
@@ -148,7 +148,7 @@ static void mtk_uart_apdma_start_tx(struct mtk_chan *c)
 		mtk_uart_apdma_write(c, VFF_WPT, 0);
 		mtk_uart_apdma_write(c, VFF_INT_FLAG, VFF_TX_INT_CLR_B);
 
-		if (mtkd->support_33bits)
+		if (mtkd->support_ext_addr)
 			mtk_uart_apdma_write(c, VFF_ADDR2, upper_32_bits(d->addr));
 	}
 
@@ -191,7 +191,7 @@ static void mtk_uart_apdma_start_rx(struct mtk_chan *c)
 		mtk_uart_apdma_write(c, VFF_RPT, 0);
 		mtk_uart_apdma_write(c, VFF_INT_FLAG, VFF_RX_INT_CLR_B);
 
-		if (mtkd->support_33bits)
+		if (mtkd->support_ext_addr)
 			mtk_uart_apdma_write(c, VFF_ADDR2, upper_32_bits(d->addr));
 	}
 
@@ -297,7 +297,7 @@ static int mtk_uart_apdma_alloc_chan_resources(struct dma_chan *chan)
 		goto err_pm;
 	}
 
-	if (mtkd->support_33bits)
+	if (mtkd->support_ext_addr)
 		mtk_uart_apdma_write(c, VFF_ADDR2, VFF_ADDR2_CLR_B);
 
 err_pm:
@@ -495,7 +495,7 @@ static int mtk_uart_apdma_probe(struct platform_device *pdev)
 
 	bit_mask = (unsigned int)(uintptr_t)of_device_get_match_data(&pdev->dev);
 	if (bit_mask > 32)
-		mtkd->support_33bits = true;
+		mtkd->support_ext_addr = true;
 
 	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(bit_mask));
 	if (rc)
-- 
2.51.1

[PATCH 7/8] dmaengine: mediatek: mtk-uart-apdma: Add support for Dimensity 6300

[AngeloGioacchino Del Regno]

Add a compatible string and match data for the APDMA IP version
found in the MediaTek Dimensity 6300 MT6835 SoC; this supports
extended addressing with up to 34 bits.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/dma/mediatek/mtk-uart-apdma.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/dma/mediatek/mtk-uart-apdma.c b/drivers/dma/mediatek/mtk-uart-apdma.c
index 802a4d6c11fa..dfcfc618bb8c 100644
--- a/drivers/dma/mediatek/mtk-uart-apdma.c
+++ b/drivers/dma/mediatek/mtk-uart-apdma.c
@@ -470,6 +470,7 @@ static void mtk_uart_apdma_free(struct mtk_uart_apdmadev *mtkd)
 static const struct of_device_id mtk_uart_apdma_match[] = {
 	{ .compatible = "mediatek,mt6577-uart-dma", .data = (void *)32 },
 	{ .compatible = "mediatek,mt6795-uart-dma", .data = (void *)33 },
+	{ .compatible = "mediatek,mt6835-uart-dma", .data = (void *)34 },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, mtk_uart_apdma_match);
-- 
2.51.1

[PATCH 8/8] dmaengine: mediatek: mtk-uart-apdma: Add support for Dimensity 9200

[AngeloGioacchino Del Regno]

Add a compatible string and match data for the APDMA IP version
found in the MediaTek Dimensity 9200 MT6985 SoC; this supports
extended addressing with up to 35 bits.

Other SoCs with this IP version also include the Dimensity 9400
MT6991 and Kompanio Ultra MT8196 (which don't need a specific
compatible in this driver and can reuse the mt6985 one).

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 drivers/dma/mediatek/mtk-uart-apdma.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/dma/mediatek/mtk-uart-apdma.c b/drivers/dma/mediatek/mtk-uart-apdma.c
index dfcfc618bb8c..ead00636b048 100644
--- a/drivers/dma/mediatek/mtk-uart-apdma.c
+++ b/drivers/dma/mediatek/mtk-uart-apdma.c
@@ -471,6 +471,7 @@ static const struct of_device_id mtk_uart_apdma_match[] = {
 	{ .compatible = "mediatek,mt6577-uart-dma", .data = (void *)32 },
 	{ .compatible = "mediatek,mt6795-uart-dma", .data = (void *)33 },
 	{ .compatible = "mediatek,mt6835-uart-dma", .data = (void *)34 },
+	{ .compatible = "mediatek,mt6985-uart-dma", .data = (void *)35 },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, mtk_uart_apdma_match);
-- 
2.51.1

Re: [PATCH 0/8] MediaTek UART DMA: Fixes, improvements and new SoCs

[Vinod Koul]

On Thu, 13 Nov 2025 13:22:21 +0100, AngeloGioacchino Del Regno wrote:
> This series performs fixes the MediaTek UART DMA driver to be able
> to correctly program AP_DMA controllers that support extended
> addressing, performs some cleanups to improve code readability
> and adds support for *all* of the SoCs generations that are upstream.
> 
> This includes MT6795, MT7988, MT8173, MT8183, MT8186, MT8188, MT8195,
> other than all of their Genio variants (where applicable), all of
> their Smartphone variants (where applicable), and also some newer
> generation SoCs that are in the process of being upstreamed, like
> MT8196 and MT8189.
> 
> [...]

Applied, thanks!

[1/8] dt-bindings: dma: mediatek,uart-dma: Allow MT6795 single compatible
      commit: 4b9ce35ca5924c195df1a6bbccdc9aae4f5cb422
[2/8] dt-bindings: dma: mediatek,uart-dma: Deprecate mediatek,dma-33bits
      commit: ebc5e9176e0f9b7effc259b58a7387019ac8811d
[3/8] dt-bindings: dma: mediatek,uart-dma: Support all SoC generations
      commit: fd7843f0da58b37072c1dafa779d128bb36912bf
[4/8] dmaengine: mediatek: uart-apdma: Get addressing bits from match data
      commit: ff81a68a87b1dbf5c1b819f240f83715c701ef0d
[5/8] dmaengine: mediatek: uart-apdma: Fix above 4G addressing TX/RX
      commit: 58ab9d7b6651d21e1cff1777529f2d3dd0b4e851
[6/8] dmaengine: mediatek: mtk-uart-apdma: Rename support_33bits to support_ext_addr
      commit: 7cb173936858f2278d9cf8b2f5d7d52fd000e54e
[7/8] dmaengine: mediatek: mtk-uart-apdma: Add support for Dimensity 6300
      commit: 391e20f21cfdee2f55f2274e83b37c03199062ea
[8/8] dmaengine: mediatek: mtk-uart-apdma: Add support for Dimensity 9200
      commit: 3587b2b6bf7681835c7c366c6083e2cd9e4b519d

Best regards,
-- 
~Vinod