[PATCH v3 0/2] clk: visconti: Add support for VIIF on Toshiba Visconti TMPV770x SoC

[PATCH v3 0/2] clk: visconti: Add support for VIIF on Toshiba Visconti TMPV770x SoC

[Yuji Ishikawa]

This series adds support for Video Input Interface (VIIF) module to the
clock and reset driver of Toshiba Visconti TMPV770x SoC. The first patch
provides the identifiers for clocks and resets. The second patch privides
the control sequence of registers.

This patchset depends on https://lore.kernel.org/all/20251114065358.854817-1-yuji2.ishikawa@toshiba.co.jp/

Changelog v2:
- dt-bindings: Do not modify existing identifiers to avoid breaking ABI.
- clk: Update clk_gate_tables to reflect changes in bindings identifiers.

Changelog v3:
- dt-bindings:
  - Only add new clock/reset identifiers.
  - Remove TMPV770X_NR_CLK and others in a preceding patch
- clk: Obtain the number of clocks in the driver source.

Yuji Ishikawa (2):
  dt-bindings: clock: tmpv770x: Add VIIF clocks
  clk: visconti: Add VIIF clocks

 drivers/clk/visconti/clkc-tmpv770x.c         | 75 +++++++++++++++++++-
 include/dt-bindings/clock/toshiba,tmpv770x.h | 11 +++
 include/dt-bindings/reset/toshiba,tmpv770x.h |  8 +++
 3 files changed, 92 insertions(+), 2 deletions(-)

-- 
2.34.1

[PATCH v3 1/2] dt-bindings: clock: tmpv770x: Add VIIF clocks

[Yuji Ishikawa]

Add clock and reset identifiers for the Video Input Interface.
These identifiers support two instances: VIIF0 and VIIF1.

Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
---
Changelog v2:
- Do not modify existing identifiers to avoid breaking ABI.
  Keep existing identfiers for VIIF0.
  Introduce new idenfifiers for VIIF1, following the same naming conventions.

Changelog v3:
- Only add new clock/reset identifiers.
- Remove TMPV770X_NR_CLK and others in a preceding patch
---
 include/dt-bindings/clock/toshiba,tmpv770x.h | 11 +++++++++++
 include/dt-bindings/reset/toshiba,tmpv770x.h |  8 ++++++++
 2 files changed, 19 insertions(+)

diff --git a/include/dt-bindings/clock/toshiba,tmpv770x.h b/include/dt-bindings/clock/toshiba,tmpv770x.h
index 89189c4f6..a36c89266 100644
--- a/include/dt-bindings/clock/toshiba,tmpv770x.h
+++ b/include/dt-bindings/clock/toshiba,tmpv770x.h
@@ -140,6 +140,9 @@
 #define TMPV770X_CLK_PIREFCLK		124
 #define TMPV770X_CLK_SBUS		125
 #define TMPV770X_CLK_BUSLCK		126
+#define TMPV770X_CLK_VIIFBS1_L2ISP	127
+#define TMPV770X_CLK_VIIFBS1_L1ISP	128
+#define TMPV770X_CLK_VIIFBS1_PROC	129
 
 /* Reset */
 #define TMPV770X_RESET_PIETHER_2P5M	0
@@ -174,5 +177,13 @@
 #define TMPV770X_RESET_PIPCMIF		29
 #define TMPV770X_RESET_PICKMON		30
 #define TMPV770X_RESET_SBUSCLK		31
+#define TMPV770X_RESET_VIIFBS0		32
+#define TMPV770X_RESET_VIIFBS0_APB	33
+#define TMPV770X_RESET_VIIFBS0_L2ISP	34
+#define TMPV770X_RESET_VIIFBS0_L1ISP	35
+#define TMPV770X_RESET_VIIFBS1		36
+#define TMPV770X_RESET_VIIFBS1_APB	37
+#define TMPV770X_RESET_VIIFBS1_L2ISP	38
+#define TMPV770X_RESET_VIIFBS1_L1ISP	39
 
 #endif /*_DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ */
diff --git a/include/dt-bindings/reset/toshiba,tmpv770x.h b/include/dt-bindings/reset/toshiba,tmpv770x.h
index bedfe253f..9452bef31 100644
--- a/include/dt-bindings/reset/toshiba,tmpv770x.h
+++ b/include/dt-bindings/reset/toshiba,tmpv770x.h
@@ -36,5 +36,13 @@
 #define TMPV770X_RESET_PIPCMIF		29
 #define TMPV770X_RESET_PICKMON		30
 #define TMPV770X_RESET_SBUSCLK		31
+#define TMPV770X_RESET_VIIFBS0		32
+#define TMPV770X_RESET_VIIFBS0_APB	33
+#define TMPV770X_RESET_VIIFBS0_L2ISP	34
+#define TMPV770X_RESET_VIIFBS0_L1ISP	35
+#define TMPV770X_RESET_VIIFBS1		36
+#define TMPV770X_RESET_VIIFBS1_APB	37
+#define TMPV770X_RESET_VIIFBS1_L2ISP	38
+#define TMPV770X_RESET_VIIFBS1_L1ISP	39
 
 #endif /*_DT_BINDINGS_RESET_TOSHIBA_TMPV770X_H_ */
-- 
2.34.1

[PATCH v3 2/2] clk: visconti: Add VIIF clocks

[Yuji Ishikawa]

Add the control sequence of register bits to handle the clocks and the
resets of Video Input Interface.

Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
---
Changelog v2:
- Update clk_gate_tables to reflect changes in bindings identifiers.

Changelog v3:
- Obtain the number of clocks in the driver source.
---
 drivers/clk/visconti/clkc-tmpv770x.c | 75 +++++++++++++++++++++++++++-
 1 file changed, 73 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/visconti/clkc-tmpv770x.c b/drivers/clk/visconti/clkc-tmpv770x.c
index 94a736da6..1e2e8d643 100644
--- a/drivers/clk/visconti/clkc-tmpv770x.c
+++ b/drivers/clk/visconti/clkc-tmpv770x.c
@@ -18,8 +18,8 @@
 #include "reset.h"
 
 /* Must be equal to the last clock/reset ID increased by one */
-#define CLKS_NR	(TMPV770X_CLK_BUSLCK + 1)
-#define RESETS_NR	(TMPV770X_RESET_SBUSCLK + 1)
+#define CLKS_NR	(TMPV770X_CLK_VIIFBS1_PROC + 1)
+#define RESETS_NR	(TMPV770X_RESET_VIIFBS1_L1ISP + 1)
 
 static DEFINE_SPINLOCK(tmpv770x_clk_lock);
 static DEFINE_SPINLOCK(tmpv770x_rst_lock);
@@ -32,6 +32,10 @@ static const struct clk_parent_data pietherplls_parent_data[] = {
 	{ .fw_name = "pietherpll", .name = "pietherpll", },
 };
 
+static const struct clk_parent_data pidnnplls_parent_data[] = {
+	{ .fw_name = "pidnnpll", .name = "pidnnpll", },
+};
+
 static const struct visconti_fixed_clk fixed_clk_tables[] = {
 	/* PLL1 */
 	/* PICMPT0/1, PITSC, PIUWDT, PISWDT, PISBUS, PIPMU, PIGPMU, PITMU */
@@ -68,6 +72,41 @@ static const struct visconti_clk_gate_table pietherpll_clk_gate_tables[] = {
 		TMPV770X_RESET_PIETHER_125M, },
 };
 
+static const struct visconti_clk_gate_table pidnnpll_clk_gate_tables[] = {
+	{ TMPV770X_CLK_VIIFBS0, "viifbs0",
+		pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data),
+		0, 0x58, 0x158, 1, 1,
+		NO_RESET, },
+	{ TMPV770X_CLK_VIIFBS0_PROC, "viifbs0_proc",
+		pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data),
+		0, 0x58, 0x158, 18, 1,
+		NO_RESET, },
+	{ TMPV770X_CLK_VIIFBS0_L1ISP, "viifbs0_l1isp",
+		pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data),
+		0, 0x58, 0x158, 17, 1,
+		NO_RESET, },
+	{ TMPV770X_CLK_VIIFBS0_L2ISP, "viifbs0_l2isp",
+		pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data),
+		0, 0x58, 0x158, 16, 1,
+		NO_RESET, },
+	{ TMPV770X_CLK_VIIFBS1, "viifbs1",
+		pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data),
+		0, 0x58, 0x158, 5, 1,
+		NO_RESET, },
+	{ TMPV770X_CLK_VIIFBS1_PROC, "viifbs1_proc",
+		pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data),
+		0, 0x58, 0x158, 22, 1,
+		NO_RESET, },
+	{ TMPV770X_CLK_VIIFBS1_L1ISP, "viifbs1_l1isp",
+		pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data),
+		0, 0x58, 0x158, 21, 1,
+		NO_RESET, },
+	{ TMPV770X_CLK_VIIFBS1_L2ISP, "viifbs1_l2isp",
+		pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data),
+		0, 0x58, 0x158, 20, 1,
+		NO_RESET, },
+};
+
 static const struct visconti_clk_gate_table clk_gate_tables[] = {
 	{ TMPV770X_CLK_HOX, "hox",
 		clks_parent_data, ARRAY_SIZE(clks_parent_data),
@@ -189,6 +228,22 @@ static const struct visconti_clk_gate_table clk_gate_tables[] = {
 		clks_parent_data, ARRAY_SIZE(clks_parent_data),
 		0, 0x14, 0x114, 0, 4,
 		TMPV770X_RESET_SBUSCLK, },
+	{ TMPV770X_CLK_VIIF0_CFGCLK, "csi2rx0cfg",
+		clks_parent_data, ARRAY_SIZE(clks_parent_data),
+		0, 0x58, 0x158, 0, 24,
+		NO_RESET, },
+	{ TMPV770X_CLK_VIIF0_APBCLK, "csi2rx0apb",
+		clks_parent_data, ARRAY_SIZE(clks_parent_data),
+		0, 0x58, 0x158, 2, 4,
+		NO_RESET, },
+	{ TMPV770X_CLK_VIIF1_CFGCLK, "csi2rx1cfg",
+		clks_parent_data, ARRAY_SIZE(clks_parent_data),
+		0, 0x58, 0x158, 4, 24,
+		NO_RESET, },
+	{ TMPV770X_CLK_VIIF1_APBCLK, "csi2rx1apb",
+		clks_parent_data, ARRAY_SIZE(clks_parent_data),
+		0, 0x58, 0x158, 6, 4,
+		NO_RESET, },
 };
 
 static const struct visconti_reset_data clk_reset_data[] = {
@@ -224,6 +279,14 @@ static const struct visconti_reset_data clk_reset_data[] = {
 	[TMPV770X_RESET_PIPCMIF]	= { 0x464, 0x564, 0, },
 	[TMPV770X_RESET_PICKMON]	= { 0x410, 0x510, 8, },
 	[TMPV770X_RESET_SBUSCLK]	= { 0x414, 0x514, 0, },
+	[TMPV770X_RESET_VIIFBS0]	= { 0x458, 0x558, 0, },
+	[TMPV770X_RESET_VIIFBS0_APB]	= { 0x458, 0x558, 1, },
+	[TMPV770X_RESET_VIIFBS0_L2ISP]	= { 0x458, 0x558, 16, },
+	[TMPV770X_RESET_VIIFBS0_L1ISP]	= { 0x458, 0x558, 17, },
+	[TMPV770X_RESET_VIIFBS1]	= { 0x458, 0x558, 4, },
+	[TMPV770X_RESET_VIIFBS1_APB]	= { 0x458, 0x558, 5, },
+	[TMPV770X_RESET_VIIFBS1_L2ISP]	= { 0x458, 0x558, 20, },
+	[TMPV770X_RESET_VIIFBS1_L1ISP]	= { 0x458, 0x558, 21, },
 };
 
 static int visconti_clk_probe(struct platform_device *pdev)
@@ -276,6 +339,14 @@ static int visconti_clk_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	ret = visconti_clk_register_gates(ctx, pidnnpll_clk_gate_tables,
+				    ARRAY_SIZE(pidnnpll_clk_gate_tables),
+				    clk_reset_data, &tmpv770x_clk_lock);
+	if (ret) {
+		dev_err(dev, "Failed to register pidnnpll clock gate: %d\n", ret);
+		return ret;
+	}
+
 	return of_clk_add_hw_provider(np, of_clk_hw_onecell_get, &ctx->clk_data);
 }
 
-- 
2.34.1

Re: [PATCH v3 1/2] dt-bindings: clock: tmpv770x: Add VIIF clocks

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 546 bytes --]

On Fri, Nov 14, 2025 at 04:05:11PM +0900, Yuji Ishikawa wrote:
> Add clock and reset identifiers for the Video Input Interface.
> These identifiers support two instances: VIIF0 and VIIF1.
> 
> Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
> ---
> Changelog v2:
> - Do not modify existing identifiers to avoid breaking ABI.
>   Keep existing identfiers for VIIF0.
>   Introduce new idenfifiers for VIIF1, following the same naming conventions.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
pw-bot: not-applicable

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH v3 2/2] clk: visconti: Add VIIF clocks

[Stephen Boyd]

Quoting Yuji Ishikawa (2025-11-13 23:05:12)
> Add the control sequence of register bits to handle the clocks and the
> resets of Video Input Interface.
> 
> Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
> ---

Applied to clk-next but see below.

> diff --git a/drivers/clk/visconti/clkc-tmpv770x.c b/drivers/clk/visconti/clkc-tmpv770x.c
> index 94a736da6..1e2e8d643 100644
> --- a/drivers/clk/visconti/clkc-tmpv770x.c
> +++ b/drivers/clk/visconti/clkc-tmpv770x.c
> @@ -18,8 +18,8 @@
>  #include "reset.h"
>  
>  /* Must be equal to the last clock/reset ID increased by one */
> -#define CLKS_NR        (TMPV770X_CLK_BUSLCK + 1)
> -#define RESETS_NR      (TMPV770X_RESET_SBUSCLK + 1)
> +#define CLKS_NR        (TMPV770X_CLK_VIIFBS1_PROC + 1)
> +#define RESETS_NR      (TMPV770X_RESET_VIIFBS1_L1ISP + 1)
>  
>  static DEFINE_SPINLOCK(tmpv770x_clk_lock);
>  static DEFINE_SPINLOCK(tmpv770x_rst_lock);
> @@ -32,6 +32,10 @@ static const struct clk_parent_data pietherplls_parent_data[] = {
>         { .fw_name = "pietherpll", .name = "pietherpll", },
>  };
>  
> +static const struct clk_parent_data pidnnplls_parent_data[] = {
> +       { .fw_name = "pidnnpll", .name = "pidnnpll", },
> +};

This is wrong. There's no "pidnnpll" in the DT binding for
toshiba,tmpv770x-pismu 'clocks' property. Please send a follow up patch
that cleans up the usage of clk_parent_data in this driver.

Re: [PATCH v3 1/2] dt-bindings: clock: tmpv770x: Add VIIF clocks

[Stephen Boyd]

Quoting Yuji Ishikawa (2025-11-13 23:05:11)
> Add clock and reset identifiers for the Video Input Interface.
> These identifiers support two instances: VIIF0 and VIIF1.
> 
> Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
> ---

Applied to clk-next

RE: [PATCH v3 2/2] clk: visconti: Add VIIF clocks

[yuji.ishikawa.x51]

> -----Original Message-----
> From: Stephen Boyd <sboyd@kernel.org>
> Sent: Friday, November 21, 2025 11:57 AM
> To: Conor Dooley <conor+dt@kernel.org>; Krzysztof Kozlowski
> <krzk+dt@kernel.org>; Michael Turquette <mturquette@baylibre.com>;
> iwamatsu nobuhiro(岩松 信洋 □ＤＩＴＣ○ＣＰＴ)
> <nobuhiro.iwamatsu.x90@mail.toshiba>; Philipp Zabel
> <p.zabel@pengutronix.de>; Rob Herring <robh@kernel.org>; ishikawa yuji(石
> 川 悠司 □ＡＩＤＣ○ＥＡ開) <yuji2.ishikawa@toshiba.co.jp>
> Cc: linux-clk@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> linux-kernel@vger.kernel.org; devicetree@vger.kernel.org; ishikawa yuji(石川
> 悠司 □ＡＩＤＣ○ＥＡ開) <yuji2.ishikawa@toshiba.co.jp>
> Subject: Re: [PATCH v3 2/2] clk: visconti: Add VIIF clocks
> 
> Quoting Yuji Ishikawa (2025-11-13 23:05:12)
> > Add the control sequence of register bits to handle the clocks and the
> > resets of Video Input Interface.
> >
> > Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
> > ---
> 
> Applied to clk-next but see below.
> 
> > diff --git a/drivers/clk/visconti/clkc-tmpv770x.c
> > b/drivers/clk/visconti/clkc-tmpv770x.c
> > index 94a736da6..1e2e8d643 100644
> > --- a/drivers/clk/visconti/clkc-tmpv770x.c
> > +++ b/drivers/clk/visconti/clkc-tmpv770x.c
> > @@ -18,8 +18,8 @@
> >  #include "reset.h"
> >
> >  /* Must be equal to the last clock/reset ID increased by one */
> > -#define CLKS_NR        (TMPV770X_CLK_BUSLCK + 1)
> > -#define RESETS_NR      (TMPV770X_RESET_SBUSCLK + 1)
> > +#define CLKS_NR        (TMPV770X_CLK_VIIFBS1_PROC + 1)
> > +#define RESETS_NR      (TMPV770X_RESET_VIIFBS1_L1ISP + 1)
> >
> >  static DEFINE_SPINLOCK(tmpv770x_clk_lock);
> >  static DEFINE_SPINLOCK(tmpv770x_rst_lock);
> > @@ -32,6 +32,10 @@ static const struct clk_parent_data
> pietherplls_parent_data[] = {
> >         { .fw_name = "pietherpll", .name = "pietherpll", },  };
> >
> > +static const struct clk_parent_data pidnnplls_parent_data[] = {
> > +       { .fw_name = "pidnnpll", .name = "pidnnpll", }, };
> 
> This is wrong. There's no "pidnnpll" in the DT binding for
> toshiba,tmpv770x-pismu 'clocks' property. Please send a follow up patch that
> cleans up the usage of clk_parent_data in this driver.

Thank you for pointing this out. I'll check the driver and consider how to clean up the usage.

Regards,
Yuji Ishikawa