From: Richard Zhu <hongxing.zhu@nxp.com>
To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
bhelgaas@google.com, frank.li@nxp.com, l.stach@pengutronix.de,
lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, imx@lists.linux.dev,
linux-kernel@vger.kernel.org, Richard Zhu <hongxing.zhu@nxp.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Subject: [PATCH v8 1/5] dt-bindings: PCI: imx6q-pcie: Change maxItems of clocks and clock-names to 6
Date: Tue, 24 Mar 2026 10:30:32 +0800 [thread overview]
Message-ID: <20260324023036.784466-2-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <20260324023036.784466-1-hongxing.zhu@nxp.com>
Previous commit 1352f58d7c8d ("dt-bindings: PCI: pci-imx6: Add external
reference clock input") was incomplete.
The constraints for "clocks" and "clock-names" still enforce an incorrect
number of items. Update maxItems for both properties to 6 to match the
actual hardware configuration.
Fixes: 1352f58d7c8d ("dt-bindings: PCI: pci-imx6: Add external reference clock input")
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
---
.../devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml | 4 ++--
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 3 ++-
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
index cddbe21f99f2..0488c942092d 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
@@ -17,11 +17,11 @@ description:
properties:
clocks:
minItems: 3
- maxItems: 5
+ maxItems: 6
clock-names:
minItems: 3
- maxItems: 5
+ maxItems: 6
num-lanes:
const: 1
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
index 12a01f7a5744..21dda8066014 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
@@ -40,7 +40,8 @@ properties:
- description: PCIe PHY clock.
- description: Additional required clock entry for imx6sx-pcie,
imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
- - description: PCIe reference clock.
+ - description: PCIe internal reference clock.
+ - description: PCIe additional external reference clock.
clock-names:
minItems: 3
--
2.37.1
next prev parent reply other threads:[~2026-03-24 2:29 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-24 2:30 [PATCH v8 0/5] Add i.MX943 PCIe supports Richard Zhu
2026-03-24 2:30 ` Richard Zhu [this message]
2026-03-24 2:30 ` [PATCH v8 2/5] dt-bindings: PCI: imx6q-pcie: Add i.MX94 and i.MX943 PCIe compatible strings Richard Zhu
2026-03-25 0:54 ` Rob Herring (Arm)
2026-03-24 2:30 ` [PATCH v8 3/5] arm64: dts: imx94: Add pcie0 and pcie0-ep supports Richard Zhu
2026-05-04 21:18 ` Frank Li
2026-05-06 4:01 ` Hongxing Zhu
2026-03-24 2:30 ` [PATCH v8 4/5] arm64: dts: imx943: Add pcie1 and pcie1-ep supports Richard Zhu
2026-03-24 2:30 ` [PATCH v8 5/5] arm64: dts: imx943-evk: Add pcie[0,1] and pcie-ep[0,1] support Richard Zhu
2026-03-24 8:10 ` Manivannan Sadhasivam
2026-04-04 10:42 ` (subset) [PATCH v8 0/5] Add i.MX943 PCIe supports Manivannan Sadhasivam
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