public inbox for linux-arm-kernel@lists.infradead.org
 help / color / mirror / Atom feed
From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org
Cc: Joey Gouly <joey.gouly@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oupton@kernel.org>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Sascha Bischoff <sascha.bischoff@arm.com>
Subject: [PATCH 00/18] KVM: arm64: Second batch of vgic fixes for 7.1
Date: Wed, 15 Apr 2026 12:55:41 +0100	[thread overview]
Message-ID: <20260415115559.2227718-1-maz@kernel.org> (raw)

With the GICv5 PPi support merged in, it has become obvious that a few
things could be improved, both from the correctness and
maintainability angles.

Sascha and I have been working on this, and this series is the sum of
our collective efforts.

The most important bits are related to the changes affecting the timer
for v3-on V5, and the corresponding change in the GICv5 host driver,
aligning it with its GICv3 counterpart.

Patches on top of kvmarm/next.

Marc Zyngier (9):
  KVM: arm64: vgic-v5: Add for_each_visible_v5_ppi() iterator
  KVM: arm64: vgic-v5: Move PPI caps into kvm_vgic_global_state
  KVM: arm64: vgic-v5: Remove use of __assign_bit() with a constant
  KVM: arm64: vgic-v5: Drop pointless ARM64_HAS_GICV5_CPUIF check
  KVM: arm64: vgic: Constify struct irq_ops usage
  KVM: arm64: vgic: Consolidate vgic_allocate_private_irqs_locked()
  KVM: arm64: vgic-v5: Drop defensive checks from
    vgic_v5_ppi_queue_irq_unlock()
  KVM: arm64: vgic: Rationalise per-CPU irq accessor
  KVM: arm64: vgic-v5: Limit support to 64 PPIs

Sascha Bischoff (9):
  KVM: arm64: vgic-v5: Add missing trap handing for NV triage
  KVM: arm64: vgic-v5: Atomically assign bits to PPI DVI bitmap
  KVM: arm64: selftests: Add missing GIC CDEN to no-vgic-v5 selftest
  KVM: arm64: selftests: Cleanup unused vars in GICv5 PPI selftest
  KVM: arm64: selftests: Improve error handling for GICv5 PPI selftest
  Documentation: KVM: Fix typos in VGICv5 documentation
  Documentation: KVM: Clarify that PMU_V3_IRQ IntID requirements for
    GICv5
  irqchip/gic-v5: Immediately exec priority drop following activate
  KVM: arm64: Fix arch timer interrupts for GICv3-on-GICv5 guests

 .../virt/kvm/devices/arm-vgic-v5.rst          |  6 +-
 Documentation/virt/kvm/devices/vcpu.rst       |  7 +-
 arch/arm64/kvm/arch_timer.c                   | 31 +++----
 arch/arm64/kvm/emulate-nested.c               |  8 ++
 arch/arm64/kvm/hyp/vgic-v5-sr.c               | 82 ++++---------------
 arch/arm64/kvm/sys_regs.c                     | 19 ++---
 arch/arm64/kvm/vgic/vgic-init.c               | 45 ++++------
 arch/arm64/kvm/vgic/vgic-kvm-device.c         |  9 +-
 arch/arm64/kvm/vgic/vgic-v5.c                 | 51 ++++--------
 arch/arm64/kvm/vgic/vgic.c                    | 27 +++---
 arch/arm64/kvm/vgic/vgic.h                    |  3 +
 drivers/irqchip/irq-gic-v5.c                  | 13 +--
 include/kvm/arm_vgic.h                        | 19 +++--
 tools/testing/selftests/kvm/arm64/no-vgic.c   |  1 +
 tools/testing/selftests/kvm/arm64/vgic_v5.c   | 10 +--
 15 files changed, 132 insertions(+), 199 deletions(-)

-- 
2.47.3



             reply	other threads:[~2026-04-15 11:56 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-15 11:55 Marc Zyngier [this message]
2026-04-15 11:55 ` [PATCH 01/18] KVM: arm64: vgic-v5: Add for_each_visible_v5_ppi() iterator Marc Zyngier
2026-04-15 11:55 ` [PATCH 02/18] KVM: arm64: vgic-v5: Move PPI caps into kvm_vgic_global_state Marc Zyngier
2026-04-15 11:55 ` [PATCH 03/18] KVM: arm64: vgic-v5: Remove use of __assign_bit() with a constant Marc Zyngier
2026-04-15 11:55 ` [PATCH 04/18] KVM: arm64: vgic-v5: Drop pointless ARM64_HAS_GICV5_CPUIF check Marc Zyngier
2026-04-15 11:55 ` [PATCH 05/18] KVM: arm64: vgic: Constify struct irq_ops usage Marc Zyngier
2026-04-15 11:55 ` [PATCH 06/18] KVM: arm64: vgic: Consolidate vgic_allocate_private_irqs_locked() Marc Zyngier
2026-04-15 11:55 ` [PATCH 07/18] KVM: arm64: vgic-v5: Drop defensive checks from vgic_v5_ppi_queue_irq_unlock() Marc Zyngier
2026-04-15 11:55 ` [PATCH 08/18] KVM: arm64: vgic: Rationalise per-CPU irq accessor Marc Zyngier
2026-04-17 15:21   ` Joey Gouly
2026-04-15 11:55 ` [PATCH 09/18] KVM: arm64: vgic-v5: Limit support to 64 PPIs Marc Zyngier
2026-04-17 16:10   ` Joey Gouly
2026-04-15 11:55 ` [PATCH 10/18] KVM: arm64: vgic-v5: Add missing trap handing for NV triage Marc Zyngier
2026-04-15 11:55 ` [PATCH 11/18] KVM: arm64: vgic-v5: Atomically assign bits to PPI DVI bitmap Marc Zyngier
2026-04-15 11:55 ` [PATCH 12/18] KVM: arm64: selftests: Add missing GIC CDEN to no-vgic-v5 selftest Marc Zyngier
2026-04-15 11:55 ` [PATCH 13/18] KVM: arm64: selftests: Cleanup unused vars in GICv5 PPI selftest Marc Zyngier
2026-04-15 11:55 ` [PATCH 14/18] KVM: arm64: selftests: Improve error handling for " Marc Zyngier
2026-04-15 11:55 ` [PATCH 15/18] Documentation: KVM: Fix typos in VGICv5 documentation Marc Zyngier
2026-04-17 15:29   ` Joey Gouly
2026-04-15 11:55 ` [PATCH 16/18] Documentation: KVM: Clarify that PMU_V3_IRQ IntID requirements for GICv5 Marc Zyngier
2026-04-15 11:55 ` [PATCH 17/18] irqchip/gic-v5: Immediately exec priority drop following activate Marc Zyngier
2026-04-15 11:55 ` [PATCH 18/18] KVM: arm64: Fix arch timer interrupts for GICv3-on-GICv5 guests Marc Zyngier

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260415115559.2227718-1-maz@kernel.org \
    --to=maz@kernel.org \
    --cc=joey.gouly@arm.com \
    --cc=kvmarm@lists.linux.dev \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=oupton@kernel.org \
    --cc=sascha.bischoff@arm.com \
    --cc=suzuki.poulose@arm.com \
    --cc=yuzenghui@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox