* [PATCH v2 1/3] arm64: dts: ti: k3-j722s: Use ti,j7200-padconf compatible
2026-04-27 14:28 [PATCH v2 0/3] J722s: s2r: use ti,j7200-padconf Richard Genoud (TI)
@ 2026-04-27 14:28 ` Richard Genoud (TI)
2026-04-27 14:29 ` [PATCH v2 2/3] arm64: dts: ti: k3-j722s: Add mcu domain peripherals specific to J722S Richard Genoud (TI)
2026-04-27 14:29 ` [PATCH v2 3/3] arm64: dts: ti: k3-j722s: Add wakeup " Richard Genoud (TI)
2 siblings, 0 replies; 4+ messages in thread
From: Richard Genoud (TI) @ 2026-04-27 14:28 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: Thomas Petazzoni, Gregory CLEMENT, Thomas Richard, Udit Kumar,
Abhash Kumar, linux-arm-kernel, devicetree, linux-kernel,
Richard Genoud (TI)
From: Abhash Kumar Jha <a-kumar2@ti.com>
The pinctrl contexts for j722s should be saved and restored during
suspend-to-ram, just like it is done for j7200 and j784s4 SoCs.
Use ti,j7200-padconf compatible to save and restore pinctrl contexts during
suspend-to-ram.
Signed-off-by: Abhash Kumar Jha <a-kumar2@ti.com>
Signed-off-by: Richard Genoud (TI) <richard.genoud@bootlin.com>
---
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
index ddf20e44f0ea..d14caa9d8619 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
@@ -432,6 +432,10 @@ &main_bcdma_csi {
/* MCU domain overrides */
+&mcu_pmx0 {
+ compatible = "ti,j7200-padconf", "pinctrl-single";
+};
+
&mcu_r5fss0_core0 {
firmware-name = "j722s-mcu-r5f0_0-fw";
};
@@ -473,6 +477,10 @@ &inta_main_dmss {
ti,interrupt-ranges = <7 71 21>;
};
+&main_pmx0 {
+ compatible = "ti,j7200-padconf", "pinctrl-single";
+};
+
&main_gpio0 {
gpio-ranges = <&main_pmx0 0 0 32>, <&main_pmx0 32 33 38>,
<&main_pmx0 70 72 17>;
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v2 2/3] arm64: dts: ti: k3-j722s: Add mcu domain peripherals specific to J722S
2026-04-27 14:28 [PATCH v2 0/3] J722s: s2r: use ti,j7200-padconf Richard Genoud (TI)
2026-04-27 14:28 ` [PATCH v2 1/3] arm64: dts: ti: k3-j722s: Use ti,j7200-padconf compatible Richard Genoud (TI)
@ 2026-04-27 14:29 ` Richard Genoud (TI)
2026-04-27 14:29 ` [PATCH v2 3/3] arm64: dts: ti: k3-j722s: Add wakeup " Richard Genoud (TI)
2 siblings, 0 replies; 4+ messages in thread
From: Richard Genoud (TI) @ 2026-04-27 14:29 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: Thomas Petazzoni, Gregory CLEMENT, Thomas Richard, Udit Kumar,
Abhash Kumar, linux-arm-kernel, devicetree, linux-kernel,
Richard Genoud (TI)
Introduce the "k3-j722s-mcu.dtsi" file to contain mcu domain peripherals
that are specific to J722S SoC and are not shared with AM62P.
Previously, those nodes were squatting the k3-j722s-main.dtsi file which
should contain only main domain peripherals.
Signed-off-by: Richard Genoud (TI) <richard.genoud@bootlin.com>
---
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 10 ----------
arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi | 15 +++++++++++++++
arch/arm64/boot/dts/ti/k3-j722s.dtsi | 1 +
3 files changed, 16 insertions(+), 10 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
index d14caa9d8619..2a8aba13bd73 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
@@ -430,16 +430,6 @@ &main_bcdma_csi {
ti,sci-rm-range-tchan = <0x22>;
};
-/* MCU domain overrides */
-
-&mcu_pmx0 {
- compatible = "ti,j7200-padconf", "pinctrl-single";
-};
-
-&mcu_r5fss0_core0 {
- firmware-name = "j722s-mcu-r5f0_0-fw";
-};
-
/* Wakeup domain overrides */
&wkup_r5fss0_core0 {
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi
new file mode 100644
index 000000000000..ab43a7e49f37
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j722s-mcu.dtsi
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Device Tree file for the J722S MCU domain peripherals
+ *
+ * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2026 Bootlin
+ */
+
+&mcu_pmx0 {
+ compatible = "ti,j7200-padconf", "pinctrl-single";
+};
+
+&mcu_r5fss0_core0 {
+ firmware-name = "j722s-mcu-r5f0_0-fw";
+};
diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
index 1b36dcf37925..ad477dd66963 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
@@ -238,3 +238,4 @@ cbass_wakeup: bus@b00000 {
/* Include J722S specific peripherals */
#include "k3-j722s-main.dtsi"
+#include "k3-j722s-mcu.dtsi"
^ permalink raw reply related [flat|nested] 4+ messages in thread* [PATCH v2 3/3] arm64: dts: ti: k3-j722s: Add wakeup domain peripherals specific to J722S
2026-04-27 14:28 [PATCH v2 0/3] J722s: s2r: use ti,j7200-padconf Richard Genoud (TI)
2026-04-27 14:28 ` [PATCH v2 1/3] arm64: dts: ti: k3-j722s: Use ti,j7200-padconf compatible Richard Genoud (TI)
2026-04-27 14:29 ` [PATCH v2 2/3] arm64: dts: ti: k3-j722s: Add mcu domain peripherals specific to J722S Richard Genoud (TI)
@ 2026-04-27 14:29 ` Richard Genoud (TI)
2 siblings, 0 replies; 4+ messages in thread
From: Richard Genoud (TI) @ 2026-04-27 14:29 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: Thomas Petazzoni, Gregory CLEMENT, Thomas Richard, Udit Kumar,
Abhash Kumar, linux-arm-kernel, devicetree, linux-kernel,
Richard Genoud (TI)
Introduce the "k3-j722s-mcu.dtsi" file to contain wakeup domain peripherals
that are specific to J722S SoC and are not shared with AM62P.
Previously, those nodes were squatting the k3-j722s-main.dtsi file which
should contain only main domain peripherals.
Signed-off-by: Richard Genoud (TI) <richard.genoud@bootlin.com>
---
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 14 --------------
arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi | 18 ++++++++++++++++++
arch/arm64/boot/dts/ti/k3-j722s.dtsi | 1 +
3 files changed, 19 insertions(+), 14 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
index 2a8aba13bd73..d1dbf1e24fbf 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
@@ -430,13 +430,6 @@ &main_bcdma_csi {
ti,sci-rm-range-tchan = <0x22>;
};
-/* Wakeup domain overrides */
-
-&wkup_r5fss0_core0 {
- firmware-name = "j722s-wkup-r5f0_0-fw";
-};
-
-/* MAIN domain overrides */
&hsm {
firmware-name = "j722s-hsm-m4f-fw";
};
@@ -451,13 +444,6 @@ serdes_ln_ctrl: mux-controller@4080 {
};
};
-&wkup_conf {
- pcie0_ctrl: pcie0-ctrl@4070 {
- compatible = "ti,j784s4-pcie-ctrl", "syscon";
- reg = <0x4070 0x4>;
- };
-};
-
&oc_sram {
reg = <0x00 0x70000000 0x00 0x40000>;
ranges = <0x00 0x00 0x70000000 0x40000>;
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi
new file mode 100644
index 000000000000..1297813f4829
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j722s-wakeup.dtsi
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Device Tree file for the J722S WAKEUP domain peripherals
+ *
+ * Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/
+ * Copyright (C) 2026 Bootlin
+ */
+
+&wkup_conf {
+ pcie0_ctrl: pcie0-ctrl@4070 {
+ compatible = "ti,j784s4-pcie-ctrl", "syscon";
+ reg = <0x4070 0x4>;
+ };
+};
+
+&wkup_r5fss0_core0 {
+ firmware-name = "j722s-wkup-r5f0_0-fw";
+};
diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
index ad477dd66963..ca10c6904b69 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
@@ -239,3 +239,4 @@ cbass_wakeup: bus@b00000 {
/* Include J722S specific peripherals */
#include "k3-j722s-main.dtsi"
#include "k3-j722s-mcu.dtsi"
+#include "k3-j722s-wakeup.dtsi"
^ permalink raw reply related [flat|nested] 4+ messages in thread