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From: Sebastian Reichel <sebastian.reichel@collabora.com>
To: Vinod Koul <vkoul@kernel.org>,
	 Neil Armstrong <neil.armstrong@linaro.org>,
	 Heiko Stuebner <heiko@sntech.de>,
	Frank Wang <frank.wang@rock-chips.com>,
	 Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	 Conor Dooley <conor+dt@kernel.org>
Cc: Andy Yan <andy.yan@rock-chips.com>,
	Dmitry Baryshkov <lumag@kernel.org>,
	 Yubing Zhang <yubing.zhang@rock-chips.com>,
	 Alexey Charkov <alchark@gmail.com>,
	linux-phy@lists.infradead.org,
	 linux-arm-kernel@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	 linux-kernel@vger.kernel.org, kernel@collabora.com,
	 devicetree@vger.kernel.org,
	 Sebastian Reichel <sebastian.reichel@collabora.com>
Subject: [PATCH v4 11/16] phy: rockchip: usbdp: Register DP aux bridge
Date: Tue, 28 Apr 2026 18:13:50 +0200	[thread overview]
Message-ID: <20260428-rockchip-usbdp-cleanup-v4-11-7775671ece22@collabora.com> (raw)
In-Reply-To: <20260428-rockchip-usbdp-cleanup-v4-0-7775671ece22@collabora.com>

Add support to use USB-C connectors with the DP altmode helper code on
devicetree based platforms. To get this working there must be a DRM
bridge chain from the DisplayPort controller to the USB-C connector.
E.g. on Rockchip RK3576:

root@rk3576 # cat /sys/kernel/debug/dri/0/encoder-0/bridges
bridge[0]: dw_dp_bridge_funcs
        refcount: 7
        type: [10] DP
        OF: /soc/dp@27e40000:rockchip,rk3576-dp
        ops: [0x47] detect edid hpd
bridge[1]: drm_aux_bridge_funcs
        refcount: 4
        type: [0] Unknown
        OF: /soc/phy@2b010000:rockchip,rk3576-usbdp-phy
        ops: [0x0]
bridge[2]: drm_aux_hpd_bridge_funcs
        refcount: 5
        type: [10] DP
        OF: /soc/i2c@2ac50000/typec-portc@22/connector:usb-c-connector
        ops: [0x4] hpd

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
 drivers/phy/rockchip/Kconfig              |  2 ++
 drivers/phy/rockchip/phy-rockchip-usbdp.c | 14 ++++++++++++++
 2 files changed, 16 insertions(+)

diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig
index 14698571b607..39759bb2fa1d 100644
--- a/drivers/phy/rockchip/Kconfig
+++ b/drivers/phy/rockchip/Kconfig
@@ -136,8 +136,10 @@ config PHY_ROCKCHIP_USBDP
 	tristate "Rockchip USBDP COMBO PHY Driver"
 	depends on ARCH_ROCKCHIP && OF
 	depends on TYPEC
+	depends on DRM || DRM=n
 	select GENERIC_PHY
 	select USB_COMMON
+	select DRM_AUX_BRIDGE if DRM_BRIDGE
 	help
 	  Enable this to support the Rockchip USB3.0/DP combo PHY with
 	  Samsung IP block. This is required for USB3 support on RK3588.
diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c
index beab20e4c512..77ad2a89d4f2 100644
--- a/drivers/phy/rockchip/phy-rockchip-usbdp.c
+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c
@@ -6,6 +6,7 @@
  * Copyright (C) 2024 Collabora Ltd
  */
 
+#include <drm/bridge/aux-bridge.h>
 #include <dt-bindings/phy/phy.h>
 #include <linux/bitfield.h>
 #include <linux/bits.h>
@@ -1434,6 +1435,7 @@ static int rk_udphy_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct phy_provider *phy_provider;
+	struct fwnode_handle *dp_aux_ep;
 	struct resource *res;
 	struct rk_udphy *udphy;
 	void __iomem *base;
@@ -1492,6 +1494,18 @@ static int rk_udphy_probe(struct platform_device *pdev)
 			return ret;
 	}
 
+	/*
+	 * Only register the DRM bridge, if the DP aux channel is connected.
+	 * Some boards use the USBDP PHY only for its USB3 capabilities.
+	 */
+	dp_aux_ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), 3, 0, 0);
+	if (dp_aux_ep) {
+		ret = drm_aux_bridge_register(dev);
+		fwnode_handle_put(dp_aux_ep);
+		if (ret)
+			return ret;
+	}
+
 	udphy->phy_u3 = devm_phy_create(dev, dev->of_node, &rk_udphy_usb3_phy_ops);
 	if (IS_ERR(udphy->phy_u3)) {
 		ret = PTR_ERR(udphy->phy_u3);

-- 
2.53.0



  parent reply	other threads:[~2026-04-28 16:14 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-28 16:13 [PATCH v4 00/16] phy: rockchip: usbdp: Fixes, DP 1-lane support and cleanups Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 01/16] dt-bindings: phy: rockchip-usbdp: add improved ports scheme Sebastian Reichel
2026-05-05 15:44   ` Rob Herring
2026-05-05 15:45   ` Rob Herring (Arm)
2026-04-28 16:13 ` [PATCH v4 02/16] phy: rockchip: usbdp: Do not loose USB3 PHY status Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 03/16] phy: rockchip: usbdp: Keep clocks running on PHY re-init Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 04/16] phy: rockchip: usbdp: Amend SSC modulation deviation Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 05/16] phy: rockchip: usbdp: Fix LFPS detect threshold control Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 06/16] phy: rockchip: usbdp: Add missing mode_change update Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 07/16] phy: rockchip: usbdp: Support single-lane DP Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 08/16] phy: rockchip: usbdp: Rename DP lane functions Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 09/16] phy: rockchip: usbdp: Use FIELD_PREP_WM16_CONST Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 10/16] phy: rockchip: usbdp: Cleanup DP lane selection function Sebastian Reichel
2026-04-28 16:13 ` Sebastian Reichel [this message]
2026-04-28 16:13 ` [PATCH v4 12/16] phy: rockchip: usbdp: Drop DP HPD handling Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 13/16] phy: rockchip: usbdp: Rename mode_change to phy_needs_reinit Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 14/16] phy: rockchip: usbdp: Re-init the PHY on orientation change Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 15/16] phy: rockchip: usbdp: Factor out lane_mux_sel setup Sebastian Reichel
2026-04-28 16:13 ` [PATCH v4 16/16] phy: rockchip: usbdp: Use guard functions for mutex Sebastian Reichel
2026-05-03 16:50 ` [PATCH v4 00/16] phy: rockchip: usbdp: Fixes, DP 1-lane support and cleanups Vinod Koul
2026-05-03 19:12   ` Heiko Stuebner

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