* [PATCH 01/13] arm64: dts: ti: k3-am642-hummingboard-t: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:34 ` Josua Mayer
2026-05-05 11:06 ` [PATCH 02/13] arm64: dts: ti: k3-am642-phyboard-electra-rdk: " Siddharth Vadapalli
` (11 subsequent siblings)
12 siblings, 1 reply; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: e2b691804319 ("arm64: dts: ti: k3-am642-hummingboard-t: Convert overlay to board dts")
Fixes: bbef42084cc1 ("arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3")
Cc: <stable@vger.kernel.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts
index ee9bd618f370..90a158531f60 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts
@@ -15,6 +15,14 @@ / {
model = "SolidRun AM642 HummingBoard-T with USB-3.1 Gen 1";
};
+&serdes_wiz0 {
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
+};
+
&serdes0 {
#address-cells = <1>;
#size-cells = <0>;
@@ -23,6 +31,7 @@ serdes0_link: phy@0 {
reg = <0>;
cdns,num-lanes = <1>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
#phy-cells = <0>;
resets = <&serdes_wiz0 1>;
};
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH 01/13] arm64: dts: ti: k3-am642-hummingboard-t: fix USB clocking for compliance
2026-05-05 11:06 ` [PATCH 01/13] arm64: dts: ti: k3-am642-hummingboard-t: fix USB clocking for compliance Siddharth Vadapalli
@ 2026-05-05 11:34 ` Josua Mayer
0 siblings, 0 replies; 19+ messages in thread
From: Josua Mayer @ 2026-05-05 11:34 UTC (permalink / raw)
To: Siddharth Vadapalli, nm@ti.com, vigneshr@ti.com,
kristo@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, w.egorov@phytec.de,
matthias.schiffer@ew.tq-group.com, d.haller@phytec.de,
francesco.dolcini@toradex.com, joao.goncalves@toradex.com,
emanuele.ghidoli@toradex.com, ernest.vanhoecke@toradex.com,
rogerq@kernel.org, eballetb@redhat.com, robertcnelson@gmail.com,
afd@ti.com, u-kumar1@ti.com
Cc: stable@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, luis.parga@ti.com,
srk@ti.com
Am 05.05.26 um 13:06 schrieb Siddharth Vadapalli:
> According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
> the USB 3.2 Specification, SSC should be enabled by default. This protects
> against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
>
> Fixes: e2b691804319 ("arm64: dts: ti: k3-am642-hummingboard-t: Convert overlay to board dts")
> Fixes: bbef42084cc1 ("arm64: dts: ti: hummingboard-t: add overlays for m.2 pci-e and usb-3")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts
> index ee9bd618f370..90a158531f60 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am642-hummingboard-t-usb3.dts
> @@ -15,6 +15,14 @@ / {
> model = "SolidRun AM642 HummingBoard-T with USB-3.1 Gen 1";
> };
>
> +&serdes_wiz0 {
> + ti,core-clk-sel = <1>; /* Select internal reference clock */
> + ti,ssc-enable; /* Enable SSC */
> + ti,ssc-type = <1>; /* 1 for Downspread */
> + ti,ssc-frequency-hz = <33000>; /* 33 KHz */
> + ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
> +};
> +
> &serdes0 {
> #address-cells = <1>;
> #size-cells = <0>;
> @@ -23,6 +31,7 @@ serdes0_link: phy@0 {
> reg = <0>;
> cdns,num-lanes = <1>;
> cdns,phy-type = <PHY_TYPE_USB3>;
> + cdns,ssc-mode = <2>; /* 2 for internal SSC */
> #phy-cells = <0>;
> resets = <&serdes_wiz0 1>;
> };
Acked-by: Josua Mayer <josua@solid-run.com>
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 02/13] arm64: dts: ti: k3-am642-phyboard-electra-rdk: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 01/13] arm64: dts: ti: k3-am642-hummingboard-t: fix USB clocking for compliance Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 03/13] arm64: dts: ti: k3-am642-sk: " Siddharth Vadapalli
` (10 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: c48ac0efe6d7 ("arm64: dts: ti: Add support for phyBOARD-Electra-AM642")
Cc: <stable@vger.kernel.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
index 793538f94942..a85d7d08bd1b 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
@@ -439,12 +439,21 @@ &sdhci1 {
status = "okay";
};
+&serdes_wiz0 {
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
+};
+
&serdes0 {
serdes0_pcie_usb_link: phy@0 {
reg = <0>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz0 1>;
};
};
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 03/13] arm64: dts: ti: k3-am642-sk: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 01/13] arm64: dts: ti: k3-am642-hummingboard-t: fix USB clocking for compliance Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 02/13] arm64: dts: ti: k3-am642-phyboard-electra-rdk: " Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 04/13] arm64: dts: ti: k3-am642-tqma64xxl: " Siddharth Vadapalli
` (9 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
From: Luis Parga <luis.parga@ti.com>
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: 4e8aa4e3559a ("arm64: dts: ti: k3-am642-sk: Enable USB Super-Speed HOST port")
Cc: <stable@vger.kernel.org>
Signed-off-by: Luis Parga <luis.parga@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index d28a38c87f32..9f63fea5e6a4 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -463,6 +463,11 @@ &serdes_refclk {
&serdes_wiz0 {
bootph-all;
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
};
&serdes0 {
@@ -473,6 +478,7 @@ serdes0_usb_link: phy@0 {
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz0 1>;
};
};
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 04/13] arm64: dts: ti: k3-am642-tqma64xxl: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
` (2 preceding siblings ...)
2026-05-05 11:06 ` [PATCH 03/13] arm64: dts: ti: k3-am642-sk: " Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 05/13] arm64: dts: ti: k3-am68-phyboard-izar: " Siddharth Vadapalli
` (8 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: 4717a36f31ec ("arm64: dts: ti: Add TQ-Systems TQMa64XxL SoM and MBaX4XxL carrier board Device Trees")
Cc: <stable@vger.kernel.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts
index 46be6824dd16..e5d1b2ebf2c8 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-tqma64xxl-mbax4xxl.dts
@@ -504,6 +504,14 @@ &serdes_refclk {
bootph-all;
};
+&serdes_wiz0 {
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
+};
+
&serdes0 {
serdes0_usb_link: phy@0 {
reg = <0>;
@@ -512,6 +520,7 @@ serdes0_usb_link: phy@0 {
bootph-all;
cdns,num-lanes = <1>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
};
};
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 05/13] arm64: dts: ti: k3-am68-phyboard-izar: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
` (3 preceding siblings ...)
2026-05-05 11:06 ` [PATCH 04/13] arm64: dts: ti: k3-am642-tqma64xxl: " Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 06/13] arm64: dts: ti: k3-am68-sk-baseboard: " Siddharth Vadapalli
` (7 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: 8bc3b1c86452 ("arm64: dts: ti: Add basic support for phyBOARD-Izar-AM68x")
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts
index 225fe7a7803b..d9b61e426ff8 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-phyboard-izar.dts
@@ -505,6 +505,14 @@ &serdes_refclk {
clock-frequency = <100000000>;
};
+&serdes_wiz0 {
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
+};
+
&serdes0 {
status = "okay";
@@ -522,6 +530,7 @@ serdes0_usb_link: phy@1 {
#phy-cells = <0>;
resets = <&serdes_wiz0 2>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
};
};
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 06/13] arm64: dts: ti: k3-am68-sk-baseboard: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
` (4 preceding siblings ...)
2026-05-05 11:06 ` [PATCH 05/13] arm64: dts: ti: k3-am68-phyboard-izar: " Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 07/13] arm64: dts: ti: k3-am69-aquila: " Siddharth Vadapalli
` (6 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: 067878e6cd25 ("arm64: dts: ti: k3-am68-sk: Add DT node for USB")
Cc: <stable@vger.kernel.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index 8178333fb2b4..d44c3685503c 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -793,6 +793,14 @@ &serdes_refclk {
clock-frequency = <100000000>;
};
+&serdes_wiz0 {
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
+};
+
&serdes0 {
status = "okay";
@@ -810,6 +818,7 @@ serdes0_usb_link: phy@2 {
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz0 3>;
};
};
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 07/13] arm64: dts: ti: k3-am69-aquila: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
` (5 preceding siblings ...)
2026-05-05 11:06 ` [PATCH 06/13] arm64: dts: ti: k3-am68-sk-baseboard: " Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:08 ` Francesco Dolcini
2026-05-05 11:06 ` [PATCH 08/13] arm64: dts: ti: k3-am69-sk: " Siddharth Vadapalli
` (5 subsequent siblings)
12 siblings, 1 reply; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: 39ac6623b1d8 ("arm64: dts: ti: Add Aquila AM69 Support")
Cc: <stable@vger.kernel.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi b/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi
index 5119baf62a4c..7c98ee81ccb5 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi
@@ -1423,6 +1423,7 @@ serdes0_usb0_ss_link: phy@3 {
resets = <&serdes_wiz0 4>;
cdns,num-lanes = <1>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
};
};
@@ -1502,6 +1503,11 @@ &serdes_ln_ctrl {
&serdes_wiz0 {
status = "okay";
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
};
&serdes_wiz1 {
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH 07/13] arm64: dts: ti: k3-am69-aquila: fix USB clocking for compliance
2026-05-05 11:06 ` [PATCH 07/13] arm64: dts: ti: k3-am69-aquila: " Siddharth Vadapalli
@ 2026-05-05 11:08 ` Francesco Dolcini
2026-05-05 11:38 ` Siddharth Vadapalli
0 siblings, 1 reply; 19+ messages in thread
From: Francesco Dolcini @ 2026-05-05 11:08 UTC (permalink / raw)
To: Siddharth Vadapalli
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1, stable, devicetree, linux-kernel,
linux-arm-kernel, luis.parga, srk
Hi Siddharth,
On Tue, May 05, 2026 at 04:36:08PM +0530, Siddharth Vadapalli wrote:
> According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
> the USB 3.2 Specification, SSC should be enabled by default. This protects
> against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
>
> Fixes: 39ac6623b1d8 ("arm64: dts: ti: Add Aquila AM69 Support")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi b/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi
> index 5119baf62a4c..7c98ee81ccb5 100644
> --- a/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi
> @@ -1423,6 +1423,7 @@ serdes0_usb0_ss_link: phy@3 {
> resets = <&serdes_wiz0 4>;
> cdns,num-lanes = <1>;
> cdns,phy-type = <PHY_TYPE_USB3>;
> + cdns,ssc-mode = <2>; /* 2 for internal SSC */
> };
> };
>
> @@ -1502,6 +1503,11 @@ &serdes_ln_ctrl {
>
> &serdes_wiz0 {
> status = "okay";
> + ti,core-clk-sel = <1>; /* Select internal reference clock */
> + ti,ssc-enable; /* Enable SSC */
> + ti,ssc-type = <1>; /* 1 for Downspread */
> + ti,ssc-frequency-hz = <33000>; /* 33 KHz */
> + ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
These properties must go before status. Please see the coding guideline.
Francesco
^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [PATCH 07/13] arm64: dts: ti: k3-am69-aquila: fix USB clocking for compliance
2026-05-05 11:08 ` Francesco Dolcini
@ 2026-05-05 11:38 ` Siddharth Vadapalli
0 siblings, 0 replies; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:38 UTC (permalink / raw)
To: Francesco Dolcini
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1, stable, devicetree, linux-kernel,
linux-arm-kernel, luis.parga, srk, s-vadapalli
On 05/05/26 16:38, Francesco Dolcini wrote:
> Hi Siddharth,
>
> On Tue, May 05, 2026 at 04:36:08PM +0530, Siddharth Vadapalli wrote:
>> According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
>> the USB 3.2 Specification, SSC should be enabled by default. This protects
>> against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
>>
>> Fixes: 39ac6623b1d8 ("arm64: dts: ti: Add Aquila AM69 Support")
>> Cc: <stable@vger.kernel.org>
>> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi | 6 ++++++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi b/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi
>> index 5119baf62a4c..7c98ee81ccb5 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi
>> @@ -1423,6 +1423,7 @@ serdes0_usb0_ss_link: phy@3 {
>> resets = <&serdes_wiz0 4>;
>> cdns,num-lanes = <1>;
>> cdns,phy-type = <PHY_TYPE_USB3>;
>> + cdns,ssc-mode = <2>; /* 2 for internal SSC */
>> };
>> };
>>
>> @@ -1502,6 +1503,11 @@ &serdes_ln_ctrl {
>>
>> &serdes_wiz0 {
>> status = "okay";
>> + ti,core-clk-sel = <1>; /* Select internal reference clock */
>> + ti,ssc-enable; /* Enable SSC */
>> + ti,ssc-type = <1>; /* 1 for Downspread */
>> + ti,ssc-frequency-hz = <33000>; /* 33 KHz */
>> + ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
>
> These properties must go before status. Please see the coding guideline.
Thank you for pointing it out. I will fix this in all relevant patches of
this series and post the v2 series in a day (to allow others to review as
well).
As indicated in the cover letter, I was able to test this series on all TI
Boards (EVMs / SKs). It will help if you could test this series on Toradex
boards.
Regards,
Siddharth.
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 08/13] arm64: dts: ti: k3-am69-sk: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
` (6 preceding siblings ...)
2026-05-05 11:06 ` [PATCH 07/13] arm64: dts: ti: k3-am69-aquila: " Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 09/13] arm64: dts: ti: k3-j721e-beagleboneai64: " Siddharth Vadapalli
` (4 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: ff7b5e93f16a ("arm64: dts: ti: k3-am69-sk: Add USB SuperSpeed support")
Cc: <stable@vger.kernel.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-am69-sk.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am69-sk.dts b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
index e56772a334c5..0412552a927f 100644
--- a/arch/arm64/boot/dts/ti/k3-am69-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am69-sk.dts
@@ -971,6 +971,11 @@ &serdes_ln_ctrl {
&serdes_wiz0 {
status = "okay";
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
};
&serdes0 {
@@ -997,6 +1002,7 @@ serdes0_usb_link: phy@3 {
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz0 4>;
};
};
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 09/13] arm64: dts: ti: k3-j721e-beagleboneai64: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
` (7 preceding siblings ...)
2026-05-05 11:06 ` [PATCH 08/13] arm64: dts: ti: k3-am69-sk: " Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 10/13] arm64: dts: ti: k3-j721e-common-proc-board: " Siddharth Vadapalli
` (3 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: fae14a1cb8dd ("arm64: dts: ti: Add k3-j721e-beagleboneai64")
Cc: <stable@vger.kernel.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
.../arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 8040b6528c18..1e87c6cf146a 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -578,6 +578,11 @@ &serdes_ln_ctrl {
&serdes_wiz3 {
typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_LOW>;
typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
};
&serdes3 {
@@ -586,6 +591,7 @@ serdes3_usb_link: phy@0 {
cdns,num-lanes = <2>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>;
};
};
@@ -621,12 +627,21 @@ &usb0 {
phy-names = "cdns3,usb3-phy";
};
+&serdes_wiz2 {
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
+};
+
&serdes2 {
serdes2_usb_link: phy@1 {
reg = <1>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz2 2>;
};
};
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 10/13] arm64: dts: ti: k3-j721e-common-proc-board: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
` (8 preceding siblings ...)
2026-05-05 11:06 ` [PATCH 09/13] arm64: dts: ti: k3-j721e-beagleboneai64: " Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 11/13] arm64: dts: ti: k3-j721e-sk: " Siddharth Vadapalli
` (2 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: 02c35dca2b48 ("arm64: dts: ti: k3-j721e: Enable Super-Speed support for USB0")
Cc: <stable@vger.kernel.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 53e7fbcef52b..b25bce995b64 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -531,6 +531,11 @@ &serdes_ln_ctrl {
&serdes_wiz3 {
typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>;
typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
};
&serdes3 {
@@ -539,6 +544,7 @@ serdes3_usb_link: phy@0 {
cdns,num-lanes = <2>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>;
bootph-all;
};
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 11/13] arm64: dts: ti: k3-j721e-sk: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
` (9 preceding siblings ...)
2026-05-05 11:06 ` [PATCH 10/13] arm64: dts: ti: k3-j721e-common-proc-board: " Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 12/13] arm64: dts: ti: k3-j722s-evm: " Siddharth Vadapalli
2026-05-05 11:06 ` [PATCH 13/13] arm64: dts: ti: k3-j784s4-j742s2-evm-common: " Siddharth Vadapalli
12 siblings, 0 replies; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: 1bfda92a3a36 ("arm64: dts: ti: Add support for J721E SK")
Cc: <stable@vger.kernel.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index 689ba2ff81f7..79927a34edff 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -960,6 +960,11 @@ &serdes_ln_ctrl {
&serdes_wiz3 {
typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>;
typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
};
&serdes3 {
@@ -968,6 +973,7 @@ serdes3_usb_link: phy@0 {
cdns,num-lanes = <2>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>;
bootph-all;
};
@@ -1006,12 +1012,21 @@ &usb0 {
bootph-all;
};
+&serdes_wiz2 {
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
+};
+
&serdes2 {
serdes2_usb_link: phy@1 {
reg = <1>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz2 2>;
};
};
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH 12/13] arm64: dts: ti: k3-j722s-evm: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
` (10 preceding siblings ...)
2026-05-05 11:06 ` [PATCH 11/13] arm64: dts: ti: k3-j721e-sk: " Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:09 ` Francesco Dolcini
2026-05-05 11:06 ` [PATCH 13/13] arm64: dts: ti: k3-j784s4-j742s2-evm-common: " Siddharth Vadapalli
12 siblings, 1 reply; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
From: Luis Parga <luis.parga@ti.com>
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: 485705df5d5f ("arm64: dts: ti: k3-j722s: Enable PCIe and USB support on J722S-EVM")
Cc: <stable@vger.kernel.org>
Signed-off-by: Luis Parga <luis.parga@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index e66330c71593..de62b7e135c6 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -746,6 +746,11 @@ &serdes_ln_ctrl {
&serdes_wiz0 {
status = "okay";
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
};
&serdes0 {
@@ -754,6 +759,7 @@ serdes0_usb_link: phy@0 {
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz0 1>;
};
};
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH 12/13] arm64: dts: ti: k3-j722s-evm: fix USB clocking for compliance
2026-05-05 11:06 ` [PATCH 12/13] arm64: dts: ti: k3-j722s-evm: " Siddharth Vadapalli
@ 2026-05-05 11:09 ` Francesco Dolcini
0 siblings, 0 replies; 19+ messages in thread
From: Francesco Dolcini @ 2026-05-05 11:09 UTC (permalink / raw)
To: Siddharth Vadapalli
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1, stable, devicetree, linux-kernel,
linux-arm-kernel, luis.parga, srk
On Tue, May 05, 2026 at 04:36:13PM +0530, Siddharth Vadapalli wrote:
> From: Luis Parga <luis.parga@ti.com>
>
> According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
> the USB 3.2 Specification, SSC should be enabled by default. This protects
> against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
>
> Fixes: 485705df5d5f ("arm64: dts: ti: k3-j722s: Enable PCIe and USB support on J722S-EVM")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Luis Parga <luis.parga@ti.com>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> index e66330c71593..de62b7e135c6 100644
> --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
> @@ -746,6 +746,11 @@ &serdes_ln_ctrl {
>
> &serdes_wiz0 {
> status = "okay";
> + ti,core-clk-sel = <1>; /* Select internal reference clock */
> + ti,ssc-enable; /* Enable SSC */
> + ti,ssc-type = <1>; /* 1 for Downspread */
> + ti,ssc-frequency-hz = <33000>; /* 33 KHz */
> + ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
before status
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH 13/13] arm64: dts: ti: k3-j784s4-j742s2-evm-common: fix USB clocking for compliance
2026-05-05 11:06 [PATCH 00/13] TI: K3 DTS: fix USB Clocking for Compliance Siddharth Vadapalli
` (11 preceding siblings ...)
2026-05-05 11:06 ` [PATCH 12/13] arm64: dts: ti: k3-j722s-evm: " Siddharth Vadapalli
@ 2026-05-05 11:06 ` Siddharth Vadapalli
2026-05-05 11:09 ` Francesco Dolcini
12 siblings, 1 reply; 19+ messages in thread
From: Siddharth Vadapalli @ 2026-05-05 11:06 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1
Cc: stable, devicetree, linux-kernel, linux-arm-kernel, luis.parga,
srk, s-vadapalli
According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
the USB 3.2 Specification, SSC should be enabled by default. This protects
against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
Fixes: 39b623c05c46 ("arm64: dts: ti: Refactor J784s4-evm to a common file")
Fixes: bed97e94ee2d ("arm64: dts: ti: k3-j784s4-evm: Enable USB3 support")
Cc: <stable@vger.kernel.org>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
index ff3a85cbc524..0884773ad230 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
@@ -1010,12 +1010,18 @@ serdes0_usb_link: phy@3 {
cdns,num-lanes = <1>;
#phy-cells = <0>;
cdns,phy-type = <PHY_TYPE_USB3>;
+ cdns,ssc-mode = <2>; /* 2 for internal SSC */
resets = <&serdes_wiz0 4>;
};
};
&serdes_wiz0 {
status = "okay";
+ ti,core-clk-sel = <1>; /* Select internal reference clock */
+ ti,ssc-enable; /* Enable SSC */
+ ti,ssc-type = <1>; /* 1 for Downspread */
+ ti,ssc-frequency-hz = <33000>; /* 33 KHz */
+ ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
};
&usb_serdes_mux {
--
2.51.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH 13/13] arm64: dts: ti: k3-j784s4-j742s2-evm-common: fix USB clocking for compliance
2026-05-05 11:06 ` [PATCH 13/13] arm64: dts: ti: k3-j784s4-j742s2-evm-common: " Siddharth Vadapalli
@ 2026-05-05 11:09 ` Francesco Dolcini
0 siblings, 0 replies; 19+ messages in thread
From: Francesco Dolcini @ 2026-05-05 11:09 UTC (permalink / raw)
To: Siddharth Vadapalli
Cc: nm, vigneshr, kristo, robh, krzk+dt, conor+dt, josua, w.egorov,
matthias.schiffer, d.haller, francesco.dolcini, joao.goncalves,
emanuele.ghidoli, ernest.vanhoecke, rogerq, eballetb,
robertcnelson, afd, u-kumar1, stable, devicetree, linux-kernel,
linux-arm-kernel, luis.parga, srk
On Tue, May 05, 2026 at 04:36:14PM +0530, Siddharth Vadapalli wrote:
> According to section "6.5.3 Normative Spread Spectrum Clocking (SSC)" of
> the USB 3.2 Specification, SSC should be enabled by default. This protects
> against EMI violations. Hence, enable internal SSC for USB SuperSpeed.
>
> Fixes: 39b623c05c46 ("arm64: dts: ti: Refactor J784s4-evm to a common file")
> Fixes: bed97e94ee2d ("arm64: dts: ti: k3-j784s4-evm: Enable USB3 support")
> Cc: <stable@vger.kernel.org>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
> index ff3a85cbc524..0884773ad230 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi
> @@ -1010,12 +1010,18 @@ serdes0_usb_link: phy@3 {
> cdns,num-lanes = <1>;
> #phy-cells = <0>;
> cdns,phy-type = <PHY_TYPE_USB3>;
> + cdns,ssc-mode = <2>; /* 2 for internal SSC */
> resets = <&serdes_wiz0 4>;
> };
> };
>
> &serdes_wiz0 {
> status = "okay";
> + ti,core-clk-sel = <1>; /* Select internal reference clock */
> + ti,ssc-enable; /* Enable SSC */
> + ti,ssc-type = <1>; /* 1 for Downspread */
> + ti,ssc-frequency-hz = <33000>; /* 33 KHz */
> + ti,ssc-depth-per-mil = <5>; /* 0.5% depth */
before status
^ permalink raw reply [flat|nested] 19+ messages in thread