From: Francesco Dolcini <francesco@dolcini.it>
To: Judith Mendez <jm@ti.com>
Cc: Nishanth Menon <nm@ti.com>, Vignesh Raghavendra <vigneshr@ti.com>,
Tero Kristo <kristo@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Santosh Shilimkar <ssantosh@kernel.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Andrew Davis <afd@ti.com>
Subject: Re: [PATCH v3 0/2] Add AM62P silicon revision detection via NVMEM
Date: Wed, 6 May 2026 13:09:20 +0200 [thread overview]
Message-ID: <20260506110920.GA53971@francesco-nb> (raw)
In-Reply-To: <20260209172330.53623-1-jm@ti.com>
Hello Judith,
On Mon, Feb 09, 2026 at 11:23:28AM -0600, Judith Mendez wrote:
...
> - NVMEM support is fully optional - the driver continues to work without
> it and falls back to SR1.0 for AM62P devices
Is this correct? Just wanted to be sure, given the issue we had with TI
6.18 kernel on this very specific topic.
Francesco
next prev parent reply other threads:[~2026-05-06 11:09 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-09 17:23 [PATCH v3 0/2] Add AM62P silicon revision detection via NVMEM Judith Mendez
2026-02-09 17:23 ` [PATCH v3 1/2] dt-bindings: hwinfo: ti,k3-socinfo: Add nvmem-cells support Judith Mendez
2026-02-09 17:23 ` [PATCH v3 2/2] soc: ti: k3-socinfo: Add support for AM62P variants via NVMEM Judith Mendez
2026-05-05 13:59 ` [PATCH v3 0/2] Add AM62P silicon revision detection " Nishanth Menon
2026-05-06 11:09 ` Francesco Dolcini [this message]
2026-05-06 14:09 ` Andrew Davis
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