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From: Bjorn Helgaas <helgaas@kernel.org>
To: Thierry Reding <thierry.reding@kernel.org>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Karthikeyan Mitran" <m.karthikeyan@mobiveil.co.in>,
	"Hou Zhiqiang" <Zhiqiang.Hou@nxp.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Pali Rohár" <pali@kernel.org>,
	"Michal Simek" <michal.simek@amd.com>,
	"Kevin Xie" <kevin.xie@starfivetech.com>,
	"Aksh Garg" <a-garg7@ti.com>,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	"Thierry Reding" <treding@nvidia.com>
Subject: Re: [PATCH v7 1/4] dt-bindings: pci: Strictly distinguish C0 from C1-C5
Date: Tue, 30 Jun 2026 15:13:55 -0500	[thread overview]
Message-ID: <20260630201355.GA233513@bhelgaas> (raw)
In-Reply-To: <20260617-tegra264-pcie-v7-1-eae7ae964629@nvidia.com>

On Wed, Jun 17, 2026 at 06:01:28PM +0200, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> Instead of using the ECAM registers as the first entry, strictly make a
> distinction between C0 and C1-C5. This is needed because otherwise the
> unit address doesn't match the first "reg" entry. We also cannot change
> the ordering of these nodes to follow the ECAM addresses because that
> would put them outside of their "control bus" hierarchy since the ECAM
> address space is a global one outside of any of the control busses.

Can you make the subject line a little more specific?  Something like:

  dt-bindings: PCI: tegra264: Strictly ...

would match the history of
Documentation/devicetree/bindings/pci/nvidia*

We can do while merging if there's no v8.


  parent reply	other threads:[~2026-06-30 20:14 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-17 16:01 [PATCH v7 0/4] PCI: tegra: Add Tegra264 support Thierry Reding
2026-06-17 16:01 ` [PATCH v7 1/4] dt-bindings: pci: Strictly distinguish C0 from C1-C5 Thierry Reding
2026-06-30 13:54   ` Rob Herring (Arm)
2026-06-30 20:13   ` Bjorn Helgaas [this message]
2026-06-17 16:01 ` [PATCH v7 2/4] PCI: Use standard wait times for PCIe link monitoring Thierry Reding
2026-06-18  5:19   ` Aksh Garg
2026-06-17 16:01 ` [PATCH v7 3/4] PCI: tegra: Add Tegra264 support Thierry Reding
2026-06-18  7:26   ` Manivannan Sadhasivam
2026-06-24 12:35     ` Thierry Reding
2026-06-30  8:03       ` Manivannan Sadhasivam
2026-06-30  8:21         ` Manikanta Maddireddy
2026-06-30  6:24   ` Manikanta Maddireddy
2026-06-17 16:01 ` [PATCH v7 4/4] arm64: tegra: Reorder reg and reg-names to match bindings Thierry Reding
2026-06-18  7:27   ` Manivannan Sadhasivam

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